archives/linux
1
0
Fork 0
mirror of https://github.com/torvalds/linux.git synced 2026-03-07 23:04:33 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions

Networking changes for 7.0

Browse source 
Core & protocols
 ----------------
 
  - A significant effort all around the stack to guide the compiler to
    make the right choice when inlining code, to avoid unneeded calls for
    small helper and stack canary overhead in the fast-path. This
    generates better and faster code with very small or no text size
    increases, as in many cases the call generated more code than the
    actual inlined helper.
 
  - Extend AccECN implementation so that is now functionally complete,
    also allow the user-space enabling it on a per network namespace
    basis.
 
  - Add support for memory providers with large (above 4K) rx buffer.
    Paired with hw-gro, larger rx buffer sizes reduce the number of
    buffers traversing the stack, dincreasing single stream CPU usage by
    up to ~30%.
 
  - Do not add HBH header to Big TCP GSO packets. This simplifies the RX
    path, the TX path and the NIC drivers, and is possible because
    user-space taps can now interpret correctly such packets without the
    HBH hint.
 
  - Allow IPv6 routes to be configured with a gateway address that is
    resolved out of a different interface than the one specified, aligning
    IPv6 to IPv4 behavior.
 
  - Multi-queue aware sch_cake. This makes it possible to scale the rate
    shaper of sch_cake across multiple CPUs, while still enforcing a
    single global rate on the interface.
 
  - Add support for the nbcon (new buffer console) infrastructure to
    netconsole, enabling lock-free, priority-based console operations that
    are safer in crash scenarios.
 
  - Improve the TCP ipv6 output path to cache the flow information, saving
    cpu cycles, reducing cache line misses and stack use.
 
  - Improve netfilter packet tracker to resolve clashes for most protocols,
    avoiding unneeded drops on rare occasions.
 
  - Add IP6IP6 tunneling acceleration to the flowtable infrastructure.
 
  - Reduce tcp socket size by one cache line.
 
  - Notify neighbour changes atomically, avoiding inconsistencies between
    the notification sequence and the actual states sequence.
 
  - Add vsock namespace support, allowing complete isolation of vsocks
    across different network namespaces.
 
  - Improve xsk generic performances with cache-alignment-oriented
    optimizations.
 
  - Support netconsole automatic target recovery, allowing netconsole
    to reestablish targets when underlying low-level interface comes back
    online.
 
 Driver API
 ----------
 
  - Support for switching the working mode (automatic vs manual) of a DPLL
    device via netlink.
 
  - Introduce PHY ports representation to expose multiple front-facing
    media ports over a single MAC.
 
  - Introduce "rx-polarity" and "tx-polarity" device tree properties, to
    generalize polarity inversion requirements for differential signaling.
 
  - Add helper to create, prepare and enable managed clocks.
 
 Device drivers
 --------------
 
  - Add Huawei hinic3 PF etherner driver.
 
  - Add DWMAC glue driver for Motorcomm YT6801 PCIe ethernet controller.
 
  - Add ethernet driver for MaxLinear MxL862xx switches
 
  - Remove parallel-port Ethernet driver.
 
  - Convert existing driver timestamp configuration reporting to
    hwtstamp_get and remove legacy ioctl().
 
  - Convert existing drivers to .get_rx_ring_count(), simplifing the RX
    ring count retrieval. Also remove the legacy fallback path.
 
  - Ethernet high-speed NICs:
    - Broadcom (bnxt, bng):
      - bnxt: add FW interface update to support FEC stats histogram and
        NVRAM defragmentation
      - bng: add TSO and H/W GRO support
    - nVidia/Mellanox (mlx5):
      - improve latency of channel restart operations, reducing the used
        H/W resources
      - add TSO support for UDP over GRE over VLAN
      - add flow counters support for hardware steering (HWS) rules
      - use a static memory area to store headers for H/W GRO, leading to
        12% RX tput improvement
    - Intel (100G, ice, idpf):
      - ice: reorganizes layout of Tx and Rx rings for cacheline
        locality and utilizes __cacheline_group* macros on the new layouts
      - ice: introduces Synchronous Ethernet (SyncE) support
    - Meta (fbnic):
      - adds debugfs for firmware mailbox and tx/rx rings vectors
 
  - Ethernet virtual:
    - geneve: introduce GRO/GSO support for double UDP encapsulation
 
  - Ethernet NICs consumer, and embedded:
    - Synopsys (stmmac):
      - some code refactoring and cleanups
    - RealTek (r8169):
      - add support for RTL8127ATF (10G Fiber SFP)
      - add dash and LTR support
    - Airoha:
      - AN8811HB 2.5 Gbps phy support
    - Freescale (fec):
      - add XDP zero-copy support
    - Thunderbolt:
      - add get link setting support to allow bonding
    - Renesas:
      - add support for RZ/G3L GBETH SoC
 
  - Ethernet switches:
    - Maxlinear:
      - support R(G)MII slow rate configuration
      - add support for Intel GSW150
    - Motorcomm (yt921x):
      - add DCB/QoS support
    - TI:
      - icssm-prueth: support bridging (STP/RSTP) via the switchdev
        framework
 
  - Ethernet PHYs:
    - Realtek:
      - enable SGMII and 2500Base-X in-band auto-negotiation
      - simplify and reunify C22/C45 drivers
    - Micrel: convert bindings to DT schema
 
  - CAN:
    - move skb headroom content into skb extensions, making CAN metadata
      access more robust
 
  - CAN drivers:
    - rcar_canfd:
      - add support for FD-only mode
      - add support for the RZ/T2H SoC
    - sja1000: cleanup the CAN state handling
 
  - WiFi:
    - implement EPPKE/802.1X over auth frames support
    - split up drop reasons better, removing generic RX_DROP
    - additional FTM capabilities: 6 GHz support, supported number of
      spatial streams and supported number of LTF repetitions
    - better mac80211 iterators to enumerate resources
    - initial UHR (Wi-Fi 8) support for cfg80211/mac80211
 
  - WiFi drivers:
    - Qualcomm/Atheros:
      - ath11k: support for Channel Frequency Response measurement
      - ath12k: a significant driver refactor to support
        multi-wiphy devices and and pave the way for future device support
        in the same driver (rather than splitting to ath13k)
      - ath12k: support for the QCC2072 chipset
    - Intel:
      - iwlwifi: partial Neighbor Awareness Networking (NAN) support
      - iwlwifi: initial support for U-NII-9 and IEEE 802.11bn
    - RealTek (rtw89):
      - preparations for RTL8922DE support
 
  - Bluetooth:
    - implement setsockopt(BT_PHY) to set the connection packet type/PHY
    - set link_policy on incoming ACL connections
 
  - Bluetooth drivers:
    - btusb: add support for MediaTek7920, Realtek RTL8761BU and 8851BE
    - btqca: add WCN6855 firmware priority selection feature
 
 Signed-off-by: Paolo Abeni <pabeni@redhat.com>
 -----BEGIN PGP SIGNATURE-----
 
 iQJGBAABCgAwFiEEg1AjqC77wbdLX2LbKSR5jcyPE6QFAmmMum4SHHBhYmVuaUBy
 ZWRoYXQuY29tAAoJECkkeY3MjxOkDnMP/3bpHAGj+gylTid3Xsj0TjJ8AkPsQs+W
 uvSMiCB1TvGCTD9kK36Vr+qPoIgJY10UxYMMjt5Gs0A9TvGDDfYnUOVoUIkfkWCH
 grqSdp6dVkyaJVfyLEcuOVQQG2HwEnhC4c3ZOhOxaKNAnsLCP142lYsMR9ktGRuA
 4vDGtz1+y7t8qBk/lyfXDM71KRrtq0HWJZIhmhz8QXTBsgPDfSejbTPNxXQOJoeO
 sKeArsHr/Cmvf89ZtLZ63vbfr4BKDm4PeXqPYR3PrQs2Yu6I1EK4lehygTY2yE2O
 I3MEPlvpa/tiVLxqXNNwEFbYIkMPY6FXS9x05hTxNZM65A6aB3vvdkqPVnVmAlXE
 f+4PYg9paI13lbzZOeQbGfZ5HgPpzQvnginaaX6s9Fp12K3Ll1FkwWdUznFWhzVn
 5LSrGyecR00CdKJByTIw9JGg/1ptz5a57pa8OQmcKRx3WhQ1XeV5TIJQF4QcPgHw
 ApyjmeGDTQMQMzha1fsaVr+i6BK2zgZvKK9uGDTX90xn2JUw/M75tyOlsTtGlnuM
 sZgj0KVGQlG2wLwBB/+D4S9Oi9YlPG00rkCs0E4jk5C/G4NBmMgpEPQg6azkb57h
 Uiy0paohxfwcZ3qbGA9In091ClGqIwOiCBaq+uXRq1ro88Neo6PWkjz5ItNrsD8t
 Ttgd5AVAQyPT
 =O31Y
 -----END PGP SIGNATURE-----

Merge tag 'net-next-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next

Pull networking updates from Paolo Abeni:
 "Core & protocols:

   - A significant effort all around the stack to guide the compiler to
     make the right choice when inlining code, to avoid unneeded calls
     for small helper and stack canary overhead in the fast-path.

     This generates better and faster code with very small or no text
     size increases, as in many cases the call generated more code than
     the actual inlined helper.

   - Extend AccECN implementation so that is now functionally complete,
     also allow the user-space enabling it on a per network namespace
     basis.

   - Add support for memory providers with large (above 4K) rx buffer.
     Paired with hw-gro, larger rx buffer sizes reduce the number of
     buffers traversing the stack, dincreasing single stream CPU usage
     by up to ~30%.

   - Do not add HBH header to Big TCP GSO packets. This simplifies the
     RX path, the TX path and the NIC drivers, and is possible because
     user-space taps can now interpret correctly such packets without
     the HBH hint.

   - Allow IPv6 routes to be configured with a gateway address that is
     resolved out of a different interface than the one specified,
     aligning IPv6 to IPv4 behavior.

   - Multi-queue aware sch_cake. This makes it possible to scale the
     rate shaper of sch_cake across multiple CPUs, while still enforcing
     a single global rate on the interface.

   - Add support for the nbcon (new buffer console) infrastructure to
     netconsole, enabling lock-free, priority-based console operations
     that are safer in crash scenarios.

   - Improve the TCP ipv6 output path to cache the flow information,
     saving cpu cycles, reducing cache line misses and stack use.

   - Improve netfilter packet tracker to resolve clashes for most
     protocols, avoiding unneeded drops on rare occasions.

   - Add IP6IP6 tunneling acceleration to the flowtable infrastructure.

   - Reduce tcp socket size by one cache line.

   - Notify neighbour changes atomically, avoiding inconsistencies
     between the notification sequence and the actual states sequence.

   - Add vsock namespace support, allowing complete isolation of vsocks
     across different network namespaces.

   - Improve xsk generic performances with cache-alignment-oriented
     optimizations.

   - Support netconsole automatic target recovery, allowing netconsole
     to reestablish targets when underlying low-level interface comes
     back online.

  Driver API:

   - Support for switching the working mode (automatic vs manual) of a
     DPLL device via netlink.

   - Introduce PHY ports representation to expose multiple front-facing
     media ports over a single MAC.

   - Introduce "rx-polarity" and "tx-polarity" device tree properties,
     to generalize polarity inversion requirements for differential
     signaling.

   - Add helper to create, prepare and enable managed clocks.

  Device drivers:

   - Add Huawei hinic3 PF etherner driver.

   - Add DWMAC glue driver for Motorcomm YT6801 PCIe ethernet
     controller.

   - Add ethernet driver for MaxLinear MxL862xx switches

   - Remove parallel-port Ethernet driver.

   - Convert existing driver timestamp configuration reporting to
     hwtstamp_get and remove legacy ioctl().

   - Convert existing drivers to .get_rx_ring_count(), simplifing the RX
     ring count retrieval. Also remove the legacy fallback path.

   - Ethernet high-speed NICs:
      - Broadcom (bnxt, bng):
         - bnxt: add FW interface update to support FEC stats histogram
           and NVRAM defragmentation
         - bng: add TSO and H/W GRO support
      - nVidia/Mellanox (mlx5):
         - improve latency of channel restart operations, reducing the
           used H/W resources
         - add TSO support for UDP over GRE over VLAN
         - add flow counters support for hardware steering (HWS) rules
         - use a static memory area to store headers for H/W GRO,
           leading to 12% RX tput improvement
      - Intel (100G, ice, idpf):
         - ice: reorganizes layout of Tx and Rx rings for cacheline
           locality and utilizes __cacheline_group* macros on the new
           layouts
         - ice: introduces Synchronous Ethernet (SyncE) support
      - Meta (fbnic):
         - adds debugfs for firmware mailbox and tx/rx rings vectors

   - Ethernet virtual:
      - geneve: introduce GRO/GSO support for double UDP encapsulation

   - Ethernet NICs consumer, and embedded:
      - Synopsys (stmmac):
         - some code refactoring and cleanups
      - RealTek (r8169):
         - add support for RTL8127ATF (10G Fiber SFP)
         - add dash and LTR support
      - Airoha:
         - AN8811HB 2.5 Gbps phy support
      - Freescale (fec):
         - add XDP zero-copy support
      - Thunderbolt:
         - add get link setting support to allow bonding
      - Renesas:
         - add support for RZ/G3L GBETH SoC

   - Ethernet switches:
      - Maxlinear:
         - support R(G)MII slow rate configuration
         - add support for Intel GSW150
      - Motorcomm (yt921x):
         - add DCB/QoS support
      - TI:
         - icssm-prueth: support bridging (STP/RSTP) via the switchdev
           framework

   - Ethernet PHYs:
      - Realtek:
         - enable SGMII and 2500Base-X in-band auto-negotiation
         - simplify and reunify C22/C45 drivers
      - Micrel: convert bindings to DT schema

   - CAN:
      - move skb headroom content into skb extensions, making CAN
        metadata access more robust

   - CAN drivers:
      - rcar_canfd:
         - add support for FD-only mode
         - add support for the RZ/T2H SoC
      - sja1000: cleanup the CAN state handling

   - WiFi:
      - implement EPPKE/802.1X over auth frames support
      - split up drop reasons better, removing generic RX_DROP
      - additional FTM capabilities: 6 GHz support, supported number of
        spatial streams and supported number of LTF repetitions
      - better mac80211 iterators to enumerate resources
      - initial UHR (Wi-Fi 8) support for cfg80211/mac80211

   - WiFi drivers:
      - Qualcomm/Atheros:
         - ath11k: support for Channel Frequency Response measurement
         - ath12k: a significant driver refactor to support multi-wiphy
           devices and and pave the way for future device support in the
           same driver (rather than splitting to ath13k)
         - ath12k: support for the QCC2072 chipset
      - Intel:
         - iwlwifi: partial Neighbor Awareness Networking (NAN) support
         - iwlwifi: initial support for U-NII-9 and IEEE 802.11bn
      - RealTek (rtw89):
         - preparations for RTL8922DE support

   - Bluetooth:
      - implement setsockopt(BT_PHY) to set the connection packet type/PHY
      - set link_policy on incoming ACL connections

   - Bluetooth drivers:
      - btusb: add support for MediaTek7920, Realtek RTL8761BU and 8851BE
      - btqca: add WCN6855 firmware priority selection feature"

* tag 'net-next-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net-next: (1254 commits)
  bnge/bng_re: Add a new HSI
  net: macb: Fix tx/rx malfunction after phy link down and up
  af_unix: Fix memleak of newsk in unix_stream_connect().
  net: ti: icssg-prueth: Add optional dependency on HSR
  net: dsa: add basic initial driver for MxL862xx switches
  net: mdio: add unlocked mdiodev C45 bus accessors
  net: dsa: add tag format for MxL862xx switches
  dt-bindings: net: dsa: add MaxLinear MxL862xx
  selftests: drivers: net: hw: Modify toeplitz.c to poll for packets
  octeontx2-pf: Unregister devlink on probe failure
  net: renesas: rswitch: fix forwarding offload statemachine
  ionic: Rate limit unknown xcvr type messages
  tcp: inet6_csk_xmit() optimization
  tcp: populate inet->cork.fl.u.ip6 in tcp_v6_syn_recv_sock()
  tcp: populate inet->cork.fl.u.ip6 in tcp_v6_connect()
  ipv6: inet6_csk_xmit() and inet6_csk_update_pmtu() use inet->cork.fl.u.ip6
  ipv6: use inet->cork.fl.u.ip6 and np->final in ip6_datagram_dst_update()
  ipv6: use np->final in inet6_sk_rebuild_header()
  ipv6: add daddr/final storage in struct ipv6_pinfo
  net: stmmac: qcom-ethqos: fix qcom_ethqos_serdes_powerup()
  ...
This commit is contained in:
Linus Torvalds 2026-02-11 19:31:52 -08:00
commit 37a93dd5c4
1252 changed files with 94751 additions and 48968 deletions
Download patch file Download diff file Expand all files Collapse all files

8
CREDITS
View file

@ -2663,6 +2663,10 @@ S: 3404 E. Harmony Road
S: Fort Collins, CO 80528
S: USA
N: Jon Mason
E: jdmason@kudzu.us
D: Neterion 10GbE drivers (s2io/vxge)
N: Torben Mathiasen
E: torben.mathiasen@compaq.com
E: torben@kernel.dk
@ -3810,6 +3814,10 @@ S: Post Office Box 500
S: Batavia, Illinois 60510
S: USA
N: Jes Sorensen
E: jes@trained-monkey.org
D: HIPPI support and Essential RoadRunner driver
N: Leo Spiekman
E: leo@netlabs.net
W: http://www.netlabs.net/hp/leo/

1
Documentation/.renames.txt
View file

@ -819,7 +819,6 @@ networking/device_drivers/intel/ixgbe networking/device_drivers/ethernet/intel/i
networking/device_drivers/intel/ixgbevf networking/device_drivers/ethernet/intel/ixgbevf
networking/device_drivers/marvell/octeontx2 networking/device_drivers/ethernet/marvell/octeontx2
networking/device_drivers/microsoft/netvsc networking/device_drivers/ethernet/microsoft/netvsc
networking/device_drivers/neterion/s2io networking/device_drivers/ethernet/neterion/s2io
networking/device_drivers/netronome/nfp networking/device_drivers/ethernet/netronome/nfp
networking/device_drivers/pensando/ionic networking/device_drivers/ethernet/pensando/ionic
networking/device_drivers/qualcomm/rmnet networking/device_drivers/cellular/qualcomm/rmnet

1
Documentation/PCI/pci-error-recovery.rst
View file

@ -460,7 +460,6 @@ That is, the recovery API only requires that:
- drivers/net/e1000e
- drivers/net/ixgbe
- drivers/net/cxgb3
- drivers/net/s2io.c
The cor_error_detected() callback is invoked in handle_error_source() when
the error severity is "correctable". The callback is optional and allows

13
Documentation/admin-guide/sysctl/net.rst
View file

@ -314,21 +314,22 @@ Default: 1000
netdev_rss_key
--------------
RSS (Receive Side Scaling) enabled drivers use a 40 bytes host key that is
randomly generated.
RSS (Receive Side Scaling) enabled drivers use a host key that
is randomly generated.
Some user space might need to gather its content even if drivers do not
provide ethtool -x support yet.
::
myhost:~# cat /proc/sys/net/core/netdev_rss_key
84:50:f4:00:a8:15:d1:a7:e9:7f:1d:60:35:c7:47:25:42:97:74:ca:56:bb:b6:a1:d8: ... (52 bytes total)
84:50:f4:00:a8:15:d1:a7:e9:7f:1d:60:35:c7:47:25:42:97:74:ca:56:bb:b6:a1:d8: ... (256 bytes total)
File contains nul bytes if no driver ever called netdev_rss_key_fill() function.
File contains all nul bytes if no driver ever called netdev_rss_key_fill()
function.
Note:
/proc/sys/net/core/netdev_rss_key contains 52 bytes of key,
but most drivers only use 40 bytes of it.
/proc/sys/net/core/netdev_rss_key contains 256 bytes of key,
but many drivers only use 40 or 52 bytes of it.
::

14
Documentation/devicetree/bindings/net/adi,adin.yaml
View file

@ -52,6 +52,20 @@ properties:
description: Enable 25MHz reference clock output on CLK25_REF pin.
type: boolean
adi,low-cmode-impedance:
description: |
Configure PHY for the lowest common-mode impedance on the receive pair
for 100BASE-TX. This is suited for capacitive coupled applications and
other applications where there may be a path for high common-mode noise
to reach the PHY.
If not present, by default the PHY is configured for normal termination
(zero-power termination) mode.
Note: There is a trade-off of 12 mW increased power consumption with
the lowest common-mode impedance setting, but in all cases the
differential impedance is 100 ohms.
type: boolean
unevaluatedProperties: false
examples:

28
Documentation/devicetree/bindings/net/airoha,en7581-npu.yaml
View file

@ -42,14 +42,13 @@ properties:
- description: wlan irq line5
memory-region:
oneOf:
- items:
- description: NPU firmware binary region
- items:
- description: NPU firmware binary region
- description: NPU wlan offload RX buffers region
- description: NPU wlan offload TX buffers region
- description: NPU wlan offload TX packet identifiers region
items:
- description: NPU firmware binary region
- description: NPU wlan offload RX buffers region
- description: NPU wlan offload TX buffers region
- description: NPU wlan offload TX packet identifiers region
- description: NPU wlan Block Ack buffers region
minItems: 1
memory-region-names:
items:
@ -57,6 +56,13 @@ properties:
- const: pkt
- const: tx-pkt
- const: tx-bufid
- const: ba
minItems: 1
firmware-name:
items:
- description: Firmware name of RiscV core
- description: Firmware name of Data section
required:
- compatible
@ -93,7 +99,9 @@ examples:
<GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
memory-region = <&npu_firmware>, <&npu_pkt>, <&npu_txpkt>,
<&npu_txbufid>;
memory-region-names = "firmware", "pkt", "tx-pkt", "tx-bufid";
<&npu_txbufid>, <&npu_ba>;
memory-region-names = "firmware", "pkt", "tx-pkt", "tx-bufid", "ba";
firmware-name = "airoha/en7581_npu_rv32.bin",
"airoha/en7581_npu_data.bin";
};
};

11
Documentation/devicetree/bindings/net/airoha,en8811h.yaml
View file

@ -16,6 +16,7 @@ description:
allOf:
- $ref: ethernet-phy.yaml#
- $ref: /schemas/phy/phy-common-props.yaml#
properties:
compatible:
@ -30,12 +31,18 @@ properties:
description:
Reverse rx polarity of the SERDES. This is the receiving
side of the lines from the MAC towards the EN881H.
This property is deprecated, for details please refer to
Documentation/devicetree/bindings/phy/phy-common-props.yaml
deprecated: true
airoha,pnswap-tx:
type: boolean
description:
Reverse tx polarity of SERDES. This is the transmitting
side of the lines from EN8811H towards the MAC.
This property is deprecated, for details please refer to
Documentation/devicetree/bindings/phy/phy-common-props.yaml
deprecated: true
required:
- reg
@ -44,6 +51,8 @@ unevaluatedProperties: false
examples:
- |
#include <dt-bindings/phy/phy.h>
mdio {
#address-cells = <1>;
#size-cells = <0>;
@ -51,6 +60,6 @@ examples:
ethernet-phy@1 {
compatible = "ethernet-phy-id03a2.a411";
reg = <1>;
airoha,pnswap-rx;
rx-polarity = <PHY_POL_INVERT>;
};
};

25
Documentation/devicetree/bindings/net/bluetooth/qcom,bluetooth-common.yaml Normal file
View file

@ -0,0 +1,25 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/bluetooth/qcom,bluetooth-common.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Bluetooth Common Properties
maintainers:
- Balakrishna Godavarthi <quic_bgodavar@quicinc.com>
- Rocky Liao <quic_rjliao@quicinc.com>
properties:
firmware-name:
minItems: 1
items:
- description: specify the name of nvm firmware to load
- description: specify the name of rampatch firmware to load
qcom,local-bd-address-broken:
type: boolean
description:
boot firmware is incorrectly passing the address in big-endian order
additionalProperties: true

49
Documentation/devicetree/bindings/net/bluetooth/qcom,qca2066-bt.yaml Normal file
View file

@ -0,0 +1,49 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/bluetooth/qcom,qca2066-bt.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm QCA2006 Bluetooth
maintainers:
- Balakrishna Godavarthi <quic_bgodavar@quicinc.com>
- Rocky Liao <quic_rjliao@quicinc.com>
properties:
compatible:
enum:
- qcom,qca2066-bt
- qcom,qca6174-bt
clocks:
items:
- description: External low-power 32.768 kHz clock input
enable-gpios:
maxItems: 1
required:
- compatible
- clocks
- enable-gpios
allOf:
- $ref: bluetooth-controller.yaml#
- $ref: qcom,bluetooth-common.yaml
- $ref: /schemas/serial/serial-peripheral-props.yaml#
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
serial {
bluetooth {
compatible = "qcom,qca6174-bt";
clocks = <&divclk4>;
enable-gpios = <&pm8994_gpios 19 GPIO_ACTIVE_HIGH>;
firmware-name = "nvm_00440302.bin";
};
};

64
Documentation/devicetree/bindings/net/bluetooth/qcom,qca6390-bt.yaml Normal file
View file

@ -0,0 +1,64 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/bluetooth/qcom,qca6390-bt.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm QCA6390 Bluetooth
maintainers:
- Balakrishna Godavarthi <quic_bgodavar@quicinc.com>
- Rocky Liao <quic_rjliao@quicinc.com>
properties:
compatible:
enum:
- qcom,qca6390-bt
vddaon-supply:
description: VDD_AON supply regulator handle
vddbtcmx-supply:
description: VDD_BT_CMX supply regulator handle
vddrfa0p8-supply:
description: VDD_RFA_0P8 supply regulator handle
vddrfa1p2-supply:
description: VDD_RFA_1P2 supply regulator handle
vddrfa1p7-supply:
description: VDD_RFA_1P7 supply regulator handle
vddrfacmn-supply:
description: VDD_RFA_CMN supply regulator handle
required:
- compatible
- vddaon-supply
- vddbtcmx-supply
- vddrfa0p8-supply
- vddrfa1p2-supply
- vddrfa1p7-supply
- vddrfacmn-supply
allOf:
- $ref: bluetooth-controller.yaml#
- $ref: qcom,bluetooth-common.yaml
- $ref: /schemas/serial/serial-peripheral-props.yaml#
unevaluatedProperties: false
examples:
- |
serial {
bluetooth {
compatible = "qcom,qca6390-bt";
vddaon-supply = <&vreg_pmu_aon_0p59>;
vddbtcmx-supply = <&vreg_pmu_btcmx_0p85>;
vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>;
vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>;
vddrfa1p7-supply = <&vreg_pmu_rfa_1p7>;
vddrfacmn-supply = <&vreg_pmu_rfa_cmn>;
};
};

58
Documentation/devicetree/bindings/net/bluetooth/qcom,qca9377-bt.yaml Normal file
View file

@ -0,0 +1,58 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/bluetooth/qcom,qca9377-bt.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm QCA9377 Bluetooth
maintainers:
- Balakrishna Godavarthi <quic_bgodavar@quicinc.com>
- Rocky Liao <quic_rjliao@quicinc.com>
properties:
compatible:
enum:
- qcom,qca9377-bt
clocks:
items:
- description: External low-power 32.768 kHz clock input
enable-gpios:
maxItems: 1
vddio-supply:
description: VDD_IO supply regulator handle
vddxo-supply:
description: VDD_XO supply regulator handle
required:
- compatible
- clocks
- enable-gpios
allOf:
- $ref: bluetooth-controller.yaml#
- $ref: qcom,bluetooth-common.yaml
- $ref: /schemas/serial/serial-peripheral-props.yaml#
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
serial {
bluetooth {
compatible = "qcom,qca9377-bt";
clocks = <&rk809 1>;
enable-gpios = <&gpio3 5 GPIO_ACTIVE_HIGH>;
max-speed = <2000000>;
pinctrl-names = "default";
pinctrl-0 = <&bt_enable>;
vddio-supply = <&vcc_1v8>;
vddxo-supply = <&vcc3v3_sys>;
};
};

67
Documentation/devicetree/bindings/net/bluetooth/qcom,wcn3950-bt.yaml Normal file
View file

@ -0,0 +1,67 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/bluetooth/qcom,wcn3950-bt.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm WCN3950/WCN3988 Bluetooth
maintainers:
- Balakrishna Godavarthi <quic_bgodavar@quicinc.com>
- Rocky Liao <quic_rjliao@quicinc.com>
properties:
compatible:
enum:
- qcom,wcn3950-bt
- qcom,wcn3988-bt
enable-gpios:
maxItems: 1
swctrl-gpios:
maxItems: 1
description: gpio specifier is used to find status
of clock supply to SoC
vddch0-supply:
description: VDD_CH0 supply regulator handle
vddio-supply:
description: VDD_IO supply regulator handle
vddrf-supply:
description: VDD_RF supply regulator handle
vddxo-supply:
description: VDD_XO supply regulator handle
required:
- compatible
- vddch0-supply
- vddio-supply
- vddrf-supply
- vddxo-supply
allOf:
- $ref: bluetooth-controller.yaml#
- $ref: qcom,bluetooth-common.yaml
- $ref: /schemas/serial/serial-peripheral-props.yaml#
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/gpio/gpio.h>
serial {
bluetooth {
compatible = "qcom,wcn3950-bt";
enable-gpios = <&tlmm 87 GPIO_ACTIVE_HIGH>;
max-speed = <3200000>;
vddch0-supply = <&pm4125_l22>;
vddio-supply = <&pm4125_l15>;
vddrf-supply = <&pm4125_l10>;
vddxo-supply = <&pm4125_l13>;
};
};

66
Documentation/devicetree/bindings/net/bluetooth/qcom,wcn3990-bt.yaml Normal file
View file

@ -0,0 +1,66 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/bluetooth/qcom,wcn3990-bt.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm WCN3990/WCN3991/WCN3998 Bluetooth
maintainers:
- Balakrishna Godavarthi <quic_bgodavar@quicinc.com>
- Rocky Liao <quic_rjliao@quicinc.com>
properties:
compatible:
enum:
- qcom,wcn3990-bt
- qcom,wcn3991-bt
- qcom,wcn3998-bt
clocks:
items:
- description: External low-power 32.768 kHz clock input
vddch0-supply:
description: VDD_CH0 supply regulator handle
vddch1-supply:
description: VDD_CH1 supply regulator handle
vddio-supply:
description: VDD_IO supply regulator handle
vddrf-supply:
description: VDD_RF supply regulator handle
vddxo-supply:
description: VDD_XO supply regulator handle
required:
- compatible
- vddch0-supply
- vddio-supply
- vddrf-supply
- vddxo-supply
allOf:
- $ref: bluetooth-controller.yaml#
- $ref: qcom,bluetooth-common.yaml
- $ref: /schemas/serial/serial-peripheral-props.yaml#
unevaluatedProperties: false
examples:
- |
serial {
bluetooth {
compatible = "qcom,wcn3990-bt";
firmware-name = "crnv21.bin";
max-speed = <3200000>;
vddio-supply = <&vreg_s4a_1p8>;
vddch0-supply = <&vreg_l25a_3p3>;
vddch1-supply = <&vreg_l23a_3p3>;
vddrf-supply = <&vreg_l17a_1p3>;
vddxo-supply = <&vreg_l7a_1p8>;
};
};

91
Documentation/devicetree/bindings/net/bluetooth/qcom,wcn6750-bt.yaml Normal file
View file

@ -0,0 +1,91 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/bluetooth/qcom,wcn6750-bt.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm WCN6750 Bluetooth
maintainers:
- Balakrishna Godavarthi <quic_bgodavar@quicinc.com>
- Rocky Liao <quic_rjliao@quicinc.com>
properties:
compatible:
enum:
- qcom,wcn6750-bt
enable-gpios:
maxItems: 1
deprecated: true
swctrl-gpios:
maxItems: 1
description: gpio specifier is used to find status
of clock supply to SoC
deprecated: true
vddaon-supply:
description: VDD_AON supply regulator handle
vddasd-supply:
description: VDD_ASD supply regulator handle
deprecated: true
vddbtcmx-supply:
description: VDD_BT_CMX supply regulator handle
vddbtcxmx-supply:
description: VDD_BT_CXMX supply regulator handle
deprecated: true
vddio-supply:
description: VDD_IO supply regulator handle
deprecated: true
vddrfa0p8-supply:
description: VDD_RFA_0P8 supply regulator handle
vddrfa1p2-supply:
description: VDD_RFA_1P2 supply regulator handle
vddrfa1p7-supply:
description: VDD_RFA_1P7 supply regulator handle
vddrfa2p2-supply:
description: VDD_RFA_2P2 supply regulator handle
vddrfacmn-supply:
description: VDD_RFA_CMN supply regulator handle
required:
- compatible
- vddaon-supply
- vddrfa0p8-supply
- vddrfa1p2-supply
- vddrfa1p7-supply
- vddrfacmn-supply
allOf:
- $ref: bluetooth-controller.yaml#
- $ref: qcom,bluetooth-common.yaml
- $ref: /schemas/serial/serial-peripheral-props.yaml#
unevaluatedProperties: false
examples:
- |
serial {
bluetooth {
compatible = "qcom,wcn6750-bt";
firmware-name = "msnv11.bin";
max-speed = <3200000>;
vddaon-supply = <&vreg_pmu_aon_0p59>;
vddbtcmx-supply = <&vreg_pmu_btcmx_0p85>;
vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>;
vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>;
vddrfa1p7-supply = <&vreg_pmu_rfa_1p7>;
vddrfacmn-supply = <&vreg_pmu_rfa_cmn>;
};
};

99
Documentation/devicetree/bindings/net/bluetooth/qcom,wcn6855-bt.yaml Normal file
View file

@ -0,0 +1,99 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/bluetooth/qcom,wcn6855-bt.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm WCN6855 Bluetooth
maintainers:
- Bartosz Golaszewski <brgl@bgdev.pl>
- Balakrishna Godavarthi <quic_bgodavar@quicinc.com>
- Rocky Liao <quic_rjliao@quicinc.com>
properties:
compatible:
enum:
- qcom,wcn6855-bt
enable-gpios:
maxItems: 1
deprecated: true
swctrl-gpios:
maxItems: 1
description: gpio specifier is used to find status
of clock supply to SoC
deprecated: true
vddaon-supply:
description: VDD_AON supply regulator handle
vddbtcmx-supply:
description: VDD_BT_CMX supply regulator handle
vddbtcxmx-supply:
description: VDD_BT_CXMX supply regulator handle
deprecated: true
vddio-supply:
description: VDD_IO supply regulator handle
deprecated: true
vddrfa0p8-supply:
description: VDD_RFA_0P8 supply regulator handle
vddrfa1p2-supply:
description: VDD_RFA_1P2 supply regulator handle
vddrfa1p7-supply:
description: VDD_RFA_1P7 supply regulator handle
deprecated: true
vddrfa1p8-supply:
description: VDD_RFA_1P8 supply regulator handle
vddrfacmn-supply:
description: VDD_RFA_CMN supply regulator handle
vddwlcx-supply:
description: VDD_WLCX supply regulator handle
vddwlmx-supply:
description: VDD_WLMX supply regulator handle
required:
- compatible
- vddaon-supply
- vddbtcmx-supply
- vddrfa0p8-supply
- vddrfa1p2-supply
- vddrfa1p8-supply
- vddrfacmn-supply
- vddwlcx-supply
- vddwlmx-supply
allOf:
- $ref: bluetooth-controller.yaml#
- $ref: qcom,bluetooth-common.yaml
- $ref: /schemas/serial/serial-peripheral-props.yaml#
unevaluatedProperties: false
examples:
- |
serial {
bluetooth {
compatible = "qcom,wcn6855-bt";
max-speed = <3000000>;
vddaon-supply = <&vreg_pmu_aon_0p8>;
vddbtcmx-supply = <&vreg_pmu_btcmx_0p8>;
vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>;
vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>;
vddrfa1p8-supply = <&vreg_pmu_rfa_1p7>;
vddrfacmn-supply = <&vreg_pmu_rfa_cmn_0p8>;
vddwlcx-supply = <&vreg_pmu_wlcx_0p8>;
vddwlmx-supply = <&vreg_pmu_wlmx_0p8>;
};
};

94
Documentation/devicetree/bindings/net/bluetooth/qcom,wcn7850-bt.yaml Normal file
View file

@ -0,0 +1,94 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/bluetooth/qcom,wcn7850-bt.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm WCN7850 Bluetooth
maintainers:
- Bartosz Golaszewski <brgl@bgdev.pl>
- Balakrishna Godavarthi <quic_bgodavar@quicinc.com>
- Rocky Liao <quic_rjliao@quicinc.com>
properties:
compatible:
enum:
- qcom,wcn7850-bt
enable-gpios:
maxItems: 1
deprecated: true
swctrl-gpios:
maxItems: 1
description: gpio specifier is used to find status
of clock supply to SoC
deprecated: true
vddaon-supply:
description: VDD_AON supply regulator handle
vdddig-supply:
description: VDD_DIG supply regulator handle
deprecated: true
vddio-supply:
description: VDD_IO supply regulator handle
deprecated: true
vddrfa0p8-supply:
description: VDD_RFA_0P8 supply regulator handle
vddrfa1p2-supply:
description: VDD_RFA_1P2 supply regulator handle
vddrfa1p8-supply:
description: VDD_RFA_1P8 supply regulator handle
vddrfa1p9-supply:
description: VDD_RFA_1P9 supply regulator handle
deprecated: true
vddrfacmn-supply:
description: VDD_RFA_CMN supply regulator handle
vddwlcx-supply:
description: VDD_WLCX supply regulator handle
vddwlmx-supply:
description: VDD_WLMX supply regulator handle
required:
- compatible
- vddrfacmn-supply
- vddaon-supply
- vddwlcx-supply
- vddwlmx-supply
- vddrfa0p8-supply
- vddrfa1p2-supply
- vddrfa1p8-supply
allOf:
- $ref: bluetooth-controller.yaml#
- $ref: qcom,bluetooth-common.yaml
- $ref: /schemas/serial/serial-peripheral-props.yaml#
unevaluatedProperties: false
examples:
- |
serial {
bluetooth {
compatible = "qcom,wcn7850-bt";
max-speed = <3200000>;
vddaon-supply = <&vreg_pmu_aon_0p59>;
vddrfa0p8-supply = <&vreg_pmu_rfa_0p8>;
vddrfa1p2-supply = <&vreg_pmu_rfa_1p2>;
vddrfa1p8-supply = <&vreg_pmu_rfa_1p8>;
vddrfacmn-supply = <&vreg_pmu_rfa_cmn>;
vddwlcx-supply = <&vreg_pmu_wlcx_0p8>;
vddwlmx-supply = <&vreg_pmu_wlmx_0p85>;
};
};

259
Documentation/devicetree/bindings/net/bluetooth/qualcomm-bluetooth.yaml
View file

@ -1,259 +0,0 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/bluetooth/qualcomm-bluetooth.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Bluetooth Chips
maintainers:
- Balakrishna Godavarthi <quic_bgodavar@quicinc.com>
- Rocky Liao <quic_rjliao@quicinc.com>
description:
This binding describes Qualcomm UART-attached bluetooth chips.
properties:
compatible:
enum:
- qcom,qca2066-bt
- qcom,qca6174-bt
- qcom,qca9377-bt
- qcom,wcn3950-bt
- qcom,wcn3988-bt
- qcom,wcn3990-bt
- qcom,wcn3991-bt
- qcom,wcn3998-bt
- qcom,qca6390-bt
- qcom,wcn6750-bt
- qcom,wcn6855-bt
- qcom,wcn7850-bt
enable-gpios:
maxItems: 1
description: gpio specifier used to enable chip
swctrl-gpios:
maxItems: 1
description: gpio specifier is used to find status
of clock supply to SoC
clocks:
maxItems: 1
description: clock provided to the controller (SUSCLK_32KHZ)
vddio-supply:
description: VDD_IO supply regulator handle
vddxo-supply:
description: VDD_XO supply regulator handle
vddrf-supply:
description: VDD_RF supply regulator handle
vddch0-supply:
description: VDD_CH0 supply regulator handle
vddch1-supply:
description: VDD_CH1 supply regulator handle
vddaon-supply:
description: VDD_AON supply regulator handle
vdddig-supply:
description: VDD_DIG supply regulator handle
vddbtcmx-supply:
description: VDD_BT_CMX supply regulator handle
vddbtcxmx-supply:
description: VDD_BT_CXMX supply regulator handle
vddrfacmn-supply:
description: VDD_RFA_CMN supply regulator handle
vddrfa0p8-supply:
description: VDD_RFA_0P8 supply regulator handle
vddrfa1p7-supply:
description: VDD_RFA_1P7 supply regulator handle
vddrfa1p8-supply:
description: VDD_RFA_1P8 supply regulator handle
vddrfa1p2-supply:
description: VDD_RFA_1P2 supply regulator handle
vddrfa1p9-supply:
description: VDD_RFA_1P9 supply regulator handle
vddrfa2p2-supply:
description: VDD_RFA_2P2 supply regulator handle
vddasd-supply:
description: VDD_ASD supply regulator handle
vddwlcx-supply:
description: VDD_WLCX supply regulator handle
vddwlmx-supply:
description: VDD_WLMX supply regulator handle
max-speed: true
firmware-name:
minItems: 1
items:
- description: specify the name of nvm firmware to load
- description: specify the name of rampatch firmware to load
local-bd-address: true
qcom,local-bd-address-broken:
type: boolean
description:
boot firmware is incorrectly passing the address in big-endian order
required:
- compatible
additionalProperties: false
allOf:
- $ref: bluetooth-controller.yaml#
- $ref: /schemas/serial/serial-peripheral-props.yaml#
- if:
properties:
compatible:
contains:
enum:
- qcom,qca2066-bt
- qcom,qca6174-bt
then:
required:
- enable-gpios
- clocks
- if:
properties:
compatible:
contains:
enum:
- qcom,wcn3950-bt
- qcom,wcn3988-bt
- qcom,wcn3990-bt
- qcom,wcn3991-bt
- qcom,wcn3998-bt
then:
required:
- vddio-supply
- vddxo-supply
- vddrf-supply
- vddch0-supply
- if:
properties:
compatible:
contains:
enum:
- qcom,wcn6750-bt
then:
required:
- vddaon-supply
- vddrfacmn-supply
- vddrfa0p8-supply
- vddrfa1p7-supply
- vddrfa1p2-supply
- if:
properties:
compatible:
contains:
enum:
- qcom,wcn6855-bt
then:
required:
- vddrfacmn-supply
- vddaon-supply
- vddwlcx-supply
- vddwlmx-supply
- vddbtcmx-supply
- vddrfa0p8-supply
- vddrfa1p2-supply
- vddrfa1p8-supply
- if:
properties:
compatible:
contains:
enum:
- qcom,wcn7850-bt
then:
required:
- vddrfacmn-supply
- vddaon-supply
- vddwlcx-supply
- vddwlmx-supply
- vddrfa0p8-supply
- vddrfa1p2-supply
- vddrfa1p8-supply
- if:
properties:
compatible:
contains:
enum:
- qcom,qca6390-bt
then:
required:
- vddrfacmn-supply
- vddaon-supply
- vddbtcmx-supply
- vddrfa0p8-supply
- vddrfa1p2-supply
- vddrfa1p7-supply
examples:
- |
#include <dt-bindings/gpio/gpio.h>
serial {
bluetooth {
compatible = "qcom,qca6174-bt";
enable-gpios = <&pm8994_gpios 19 GPIO_ACTIVE_HIGH>;
clocks = <&divclk4>;
firmware-name = "nvm_00440302.bin";
};
};
- |
serial {
bluetooth {
compatible = "qcom,wcn3990-bt";
vddio-supply = <&vreg_s4a_1p8>;
vddxo-supply = <&vreg_l7a_1p8>;
vddrf-supply = <&vreg_l17a_1p3>;
vddch0-supply = <&vreg_l25a_3p3>;
max-speed = <3200000>;
firmware-name = "crnv21.bin";
};
};
- |
serial {
bluetooth {
compatible = "qcom,wcn6750-bt";
pinctrl-names = "default";
pinctrl-0 = <&bt_en_default>;
enable-gpios = <&tlmm 85 GPIO_ACTIVE_HIGH>;
swctrl-gpios = <&tlmm 86 GPIO_ACTIVE_HIGH>;
vddio-supply = <&vreg_l19b_1p8>;
vddaon-supply = <&vreg_s7b_0p9>;
vddbtcxmx-supply = <&vreg_s7b_0p9>;
vddrfacmn-supply = <&vreg_s7b_0p9>;
vddrfa0p8-supply = <&vreg_s7b_0p9>;
vddrfa1p7-supply = <&vreg_s1b_1p8>;
vddrfa1p2-supply = <&vreg_s8b_1p2>;
vddrfa2p2-supply = <&vreg_s1c_2p2>;
vddasd-supply = <&vreg_l11c_2p8>;
max-speed = <3200000>;
firmware-name = "msnv11.bin";
};
};

117
Documentation/devicetree/bindings/net/can/renesas,rcar-canfd.yaml
View file

@ -12,6 +12,10 @@ maintainers:
properties:
compatible:
oneOf:
- enum:
- renesas,r9a09g047-canfd # RZ/G3E
- renesas,r9a09g077-canfd # RZ/T2H
- items:
- enum:
- renesas,r8a774a1-canfd # RZ/G2M
@ -42,7 +46,15 @@ properties:
- renesas,r9a07g054-canfd # RZ/V2L
- const: renesas,rzg2l-canfd # RZ/G2L family
- const: renesas,r9a09g047-canfd # RZ/G3E
- items:
- enum:
- renesas,r9a09g056-canfd # RZ/V2N
- renesas,r9a09g057-canfd # RZ/V2H(P)
- const: renesas,r9a09g047-canfd
- items:
- const: renesas,r9a09g087-canfd # RZ/N2H
- const: renesas,r9a09g077-canfd
reg:
maxItems: 1
@ -122,12 +134,25 @@ properties:
resets: true
reset-names:
items:
- const: rstp_n
- const: rstc_n
renesas,no-can-fd:
$ref: /schemas/types.yaml#/definitions/flag
description:
The controller can operate in either CAN FD only mode (default) or
Classical CAN only mode. The mode is global to all channels.
Specify this property to put the controller in Classical CAN only mode.
The controller can operate in either CAN-FD mode (default) or FD-Only
mode (RZ/{G2L,G3E} and R-Car Gen4) or Classical CAN mode. Specify this
property to put the controller in Classical CAN mode.
renesas,fd-only:
$ref: /schemas/types.yaml#/definitions/flag
description:
The CANFD on RZ/{G2L,G3E} and R-Car Gen4 SoCs support 3 modes FD-Only
mode, Classical CAN mode and CAN-FD mode (default). In FD-Only mode,
communication in Classical CAN frame format is disabled. Specify this
property to put the controller in FD-Only mode.
assigned-clocks:
description:
@ -160,7 +185,6 @@ required:
- clocks
- clock-names
- power-domains
- resets
- assigned-clocks
- assigned-clock-rates
- channel0
@ -187,13 +211,6 @@ allOf:
minItems: 2
maxItems: 2
reset-names:
minItems: 2
maxItems: 2
required:
- reset-names
- if:
properties:
compatible:
@ -231,18 +248,25 @@ allOf:
minItems: 2
maxItems: 2
reset-names:
minItems: 2
maxItems: 2
- if:
properties:
compatible:
contains:
const: renesas,r9a09g077-canfd
then:
properties:
interrupts:
maxItems: 8
required:
- reset-names
interrupt-names:
maxItems: 8
- if:
properties:
compatible:
contains:
enum:
- renesas,r9a09g077-canfd
- renesas,rcar-gen3-canfd
- renesas,rzg2l-canfd
then:
@ -267,6 +291,65 @@ allOf:
patternProperties:
"^channel[6-7]$": false
- if:
properties:
compatible:
contains:
enum:
- renesas,rcar-gen3-canfd
then:
properties:
renesas,fd-only: false
- if:
required:
- renesas,no-can-fd
then:
properties:
renesas,fd-only: false
- if:
required:
- renesas,fd-only
then:
properties:
renesas,no-can-fd: false
- if:
properties:
compatible:
contains:
const: renesas,r9a09g077-canfd
then:
properties:
resets: false
reset-names: false
- if:
properties:
compatible:
contains:
enum:
- renesas,r9a09g047-canfd
- renesas,rzg2l-canfd
then:
required:
- resets
- reset-names
- if:
properties:
compatible:
contains:
enum:
- renesas,rcar-gen3-canfd
- renesas,rcar-gen4-canfd
then:
required:
- resets
properties:
reset-names: false
unevaluatedProperties: false
examples:

32
Documentation/devicetree/bindings/net/dsa/lantiq,gswip.yaml
View file

@ -19,6 +19,8 @@ maintainers:
properties:
compatible:
enum:
- intel,gsw150
- lantiq,peb7084
- lantiq,xrx200-gswip
- lantiq,xrx300-gswip
- lantiq,xrx330-gswip
@ -103,9 +105,33 @@ patternProperties:
patternProperties:
"^(ethernet-)?port@[0-6]$":
$ref: dsa-port.yaml#
allOf:
- $ref: /schemas/phy/phy-common-props.yaml#
unevaluatedProperties: false
properties:
maxlinear,slew-rate-txc:
$ref: /schemas/types.yaml#/definitions/uint32
enum: [0, 1]
description: |
RMII/RGMII TX Clock Slew Rate:
0: Normal
1: Slow
If not present, the configuration made by the switch bootloader is
preserved.
maxlinear,slew-rate-txd:
$ref: /schemas/types.yaml#/definitions/uint32
enum: [0, 1]
description: |
RMII/RGMII TX Non-Clock PAD Slew Rate:
0: Normal
1: Slow
If not present, the configuration made by the switch bootloader is
preserved.
maxlinear,rmii-refclk-out:
type: boolean
description:
@ -264,6 +290,7 @@ examples:
- |
#include <dt-bindings/leds/common.h>
#include <dt-bindings/phy/phy.h>
mdio {
#address-cells = <1>;
@ -296,6 +323,7 @@ examples:
label = "wan";
phy-mode = "1000base-x";
managed = "in-band-status";
tx-polarity = <PHY_POL_INVERT>;
};
port@5 {
@ -316,7 +344,7 @@ examples:
#address-cells = <1>;
#size-cells = <0>;
switchphy0: switchphy@0 {
switchphy0: ethernet-phy@0 {
reg = <0>;
leds {
@ -331,7 +359,7 @@ examples:
};
};
switchphy1: switchphy@1 {
switchphy1: ethernet-phy@1 {
reg = <1>;
leds {

2
Documentation/devicetree/bindings/net/dsa/marvell,mv88e6xxx.yaml
View file

@ -72,7 +72,7 @@ properties:
'#interrupt-cells':
description: The internal interrupt controller only supports triggering
on active high level interrupts so the second cell must alway be set to
on active high level interrupts so the second cell must always be set to
IRQ_TYPE_LEVEL_HIGH.
const: 2

161
Documentation/devicetree/bindings/net/dsa/maxlinear,mxl862xx.yaml Normal file
View file

@ -0,0 +1,161 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/dsa/maxlinear,mxl862xx.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: MaxLinear MxL862xx Ethernet Switch Family
maintainers:
- Daniel Golle <daniel@makrotopia.org>
description:
The MaxLinear MxL862xx switch family are multi-port Ethernet switches with
integrated 2.5GE PHYs. The MxL86252 has five PHY ports and the MxL86282
has eight PHY ports. Both models come with two 10 Gigabit/s SerDes
interfaces to be used to connect external PHYs or SFP cages, or as CPU
port.
allOf:
- $ref: dsa.yaml#/$defs/ethernet-ports
properties:
compatible:
enum:
- maxlinear,mxl86252
- maxlinear,mxl86282
reg:
maxItems: 1
description: MDIO address of the switch
mdio:
$ref: /schemas/net/mdio.yaml#
unevaluatedProperties: false
required:
- compatible
- mdio
- reg
unevaluatedProperties: false
examples:
- |
mdio {
#address-cells = <1>;
#size-cells = <0>;
switch@0 {
compatible = "maxlinear,mxl86282";
reg = <0>;
ethernet-ports {
#address-cells = <1>;
#size-cells = <0>;
/* Microcontroller port */
port@0 {
reg = <0>;
status = "disabled";
};
port@1 {
reg = <1>;
phy-handle = <&phy0>;
phy-mode = "internal";
};
port@2 {
reg = <2>;
phy-handle = <&phy1>;
phy-mode = "internal";
};
port@3 {
reg = <3>;
phy-handle = <&phy2>;
phy-mode = "internal";
};
port@4 {
reg = <4>;
phy-handle = <&phy3>;
phy-mode = "internal";
};
port@5 {
reg = <5>;
phy-handle = <&phy4>;
phy-mode = "internal";
};
port@6 {
reg = <6>;
phy-handle = <&phy5>;
phy-mode = "internal";
};
port@7 {
reg = <7>;
phy-handle = <&phy6>;
phy-mode = "internal";
};
port@8 {
reg = <8>;
phy-handle = <&phy7>;
phy-mode = "internal";
};
port@9 {
reg = <9>;
label = "cpu";
ethernet = <&gmac0>;
phy-mode = "usxgmii";
fixed-link {
speed = <10000>;
full-duplex;
};
};
};
mdio {
#address-cells = <1>;
#size-cells = <0>;
phy0: ethernet-phy@0 {
reg = <0>;
};
phy1: ethernet-phy@1 {
reg = <1>;
};
phy2: ethernet-phy@2 {
reg = <2>;
};
phy3: ethernet-phy@3 {
reg = <3>;
};
phy4: ethernet-phy@4 {
reg = <4>;
};
phy5: ethernet-phy@5 {
reg = <5>;
};
phy6: ethernet-phy@6 {
reg = <6>;
};
phy7: ethernet-phy@7 {
reg = <7>;
};
};
};
};

3
Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml
View file

@ -40,6 +40,7 @@ properties:
- const: reset
description:
Used during reset for strap configuration.
minItems: 1
reset-gpios:
description:
@ -153,6 +154,8 @@ allOf:
const: microchip,ksz8463
then:
properties:
pinctrl-names:
minItems: 2
straps-rxd-gpios:
description:
RXD0 and RXD1 pins, used to select SPI as bus interface.

56
Documentation/devicetree/bindings/net/ethernet-connector.yaml Normal file
View file

@ -0,0 +1,56 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/ethernet-connector.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Generic Ethernet Connector
maintainers:
- Maxime Chevallier <maxime.chevallier@bootlin.com>
description:
An Ethernet Connector represents the output of a network component such as
a PHY, an Ethernet controller with no PHY, or an SFP module.
properties:
pairs:
description:
Defines the number of BaseT pairs that are used on the connector.
$ref: /schemas/types.yaml#/definitions/uint32
enum: [1, 2, 4]
media:
description:
The mediums, as defined in 802.3, that can be used on the port.
enum:
- BaseT
- BaseK
- BaseS
- BaseC
- BaseL
- BaseD
- BaseE
- BaseF
- BaseV
- BaseMLD
required:
- media
allOf:
- if:
properties:
media:
const: BaseT
then:
required:
- pairs
else:
properties:
pairs: false
additionalProperties: true
...

18
Documentation/devicetree/bindings/net/ethernet-phy.yaml
View file

@ -281,6 +281,17 @@ properties:
additionalProperties: false
mdi:
type: object
patternProperties:
'^connector-[0-9]+$':
$ref: /schemas/net/ethernet-connector.yaml#
unevaluatedProperties: false
additionalProperties: false
required:
- reg
@ -317,5 +328,12 @@ examples:
default-state = "keep";
};
};
/* Fast Ethernet port, with only 2 pairs wired */
mdi {
connector-0 {
pairs = <2>;
media = "BaseT";
};
};
};
};

253
Documentation/devicetree/bindings/net/micrel,gigabit.yaml Normal file
View file

@ -0,0 +1,253 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/micrel,gigabit.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Micrel series Gigabit Ethernet PHYs
maintainers:
- Andrew Lunn <andrew@lunn.ch>
- Stefan Eichenberger <eichest@gmail.com>
description:
Some boards require special skew tuning values, particularly when it comes
to clock delays. These values can be specified in the device tree using
the properties listed here.
properties:
compatible:
enum:
- ethernet-phy-id0022.1610 # KSZ9021
- ethernet-phy-id0022.1611 # KSZ9021RLRN
- ethernet-phy-id0022.1620 # KSZ9031
- ethernet-phy-id0022.1631 # KSZ9477
- ethernet-phy-id0022.1640 # KSZ9131
- ethernet-phy-id0022.1650 # LAN8841
- ethernet-phy-id0022.1660 # LAN8814
- ethernet-phy-id0022.1670 # LAN8804
micrel,force-master:
type: boolean
description: |
Force phy to master mode. Only set this option if the phy reference
clock provided at CLK125_NDO pin is used as MAC reference clock
because the clock jitter in slave mode is too high (errata#2).
Attention: The link partner must be configurable as slave otherwise
no link will be established.
coma-mode-gpios:
maxItems: 1
description: |
If present the given gpio will be deasserted when the PHY is probed.
Some PHYs have a COMA mode input pin which puts the PHY into
isolate and power-down mode. On some boards this input is connected
to a GPIO of the SoC.
micrel,led-mode:
$ref: /schemas/types.yaml#/definitions/uint32
description: |
LED mode value to set for PHYs with configurable LEDs.
Configure the LED mode with single value. The list of PHYs and the
bits that are currently supported:
LAN8814: register EP5.0, bit 6
See the respective PHY datasheet for the mode values.
minimum: 0
maximum: 1
patternProperties:
'^([rt]xc)-skew-psec$':
$ref: /schemas/types.yaml#/definitions/int32
description:
Skew control of the pad in picoseconds.
minimum: -700
maximum: 2400
multipleOf: 100
default: 0
'^([rt]xd[0-3]|rxdv|txen)-skew-psec$':
$ref: /schemas/types.yaml#/definitions/int32
description: |
Skew control of the pad in picoseconds.
minimum: -700
maximum: 800
multipleOf: 100
default: 0
allOf:
- $ref: ethernet-phy.yaml#
- if:
properties:
compatible:
contains:
enum:
- ethernet-phy-id0022.1610
- ethernet-phy-id0022.1611
then:
patternProperties:
'^([rt]xd[0-3]|[rt]xc|rxdv|txen)-skew-ps$':
description: |
Skew control of the pad in picoseconds.
The actual increment on the chip is 120ps ranging from -840ps to
960ps, this mismatch comes from a documentation error before
datasheet revision 1.2 (Feb 2014).
The device tree value to delay mapping looks as follows:
Device Tree Value Delay
--------------------------
0 -840ps
200 -720ps
400 -600ps
600 -480ps
800 -360ps
1000 -240ps
1200 -120ps
1400 0ps
1600 120ps
1800 240ps
2000 360ps
2200 480ps
2400 600ps
2600 720ps
2800 840ps
3000 960ps
minimum: 0
maximum: 3000
multipleOf: 200
default: 1400
- if:
properties:
compatible:
contains:
const: ethernet-phy-id0022.1620
then:
patternProperties:
'^([rt]xc)-skew-ps$':
description: |
Skew control of the pad in picoseconds.
The device tree value to delay mapping is as follows:
Device Tree Value Delay
--------------------------
0 -900ps
60 -840ps
120 -780ps
180 -720ps
240 -660ps
300 -600ps
360 -540ps
420 -480ps
480 -420ps
540 -360ps
600 -300ps
660 -240ps
720 -180ps
780 -120ps
840 -60ps
900 0ps
960 60ps
1020 120ps
1080 180ps
1140 240ps
1200 300ps
1260 360ps
1320 420ps
1380 480ps
1440 540ps
1500 600ps
1560 660ps
1620 720ps
1680 780ps
1740 840ps
1800 900ps
1860 960ps
minimum: 0
maximum: 1860
multipleOf: 60
default: 900
'^([rt]xd[0-3]|rxdv|txen)-skew-ps$':
description: |
Skew control of the pad in picoseconds.
The device tree value to delay mapping is as follows:
Device Tree Value Delay
--------------------------
0 -420ps
60 -360ps
120 -300ps
180 -240ps
240 -180ps
300 -120ps
360 -60ps
420 0ps
480 60ps
540 120ps
600 180ps
660 240ps
720 300ps
780 360ps
840 420ps
900 480ps
minimum: 0
maximum: 900
multipleOf: 60
default: 420
- if:
not:
properties:
compatible:
contains:
enum:
- ethernet-phy-id0022.1640
- ethernet-phy-id0022.1650
then:
patternProperties:
'^([rt]xd[0-3]|[rt]xc|rxdv|txen)-skew-psec$': false
- if:
not:
properties:
compatible:
contains:
const: ethernet-phy-id0022.1620
then:
properties:
micrel,force-master: false
- if:
not:
properties:
compatible:
contains:
const: ethernet-phy-id0022.1660
then:
properties:
coma-mode-gpios: false
micrel,led-mode: false
unevaluatedProperties: false
examples:
- |
mdio {
#address-cells = <1>;
#size-cells = <0>;
ethernet-phy@7 {
compatible = "ethernet-phy-id0022.1610";
reg = <7>;
rxc-skew-ps = <3000>;
rxdv-skew-ps = <0>;
txc-skew-ps = <3000>;
txen-skew-ps = <0>;
};
ethernet-phy@9 {
compatible = "ethernet-phy-id0022.1640";
reg = <9>;
rxc-skew-psec = <(-100)>;
txc-skew-psec = <(-100)>;
};
};

228
Documentation/devicetree/bindings/net/micrel-ksz90x1.txt
View file

@ -1,228 +0,0 @@
Micrel KSZ9021/KSZ9031/KSZ9131 Gigabit Ethernet PHY
Some boards require special tuning values, particularly when it comes
to clock delays. You can specify clock delay values in the PHY OF
device node. Deprecated, but still supported, these properties can
also be added to an Ethernet OF device node.
Note that these settings are applied after any phy-specific fixup from
phy_fixup_list (see phy_init_hw() from drivers/net/phy/phy_device.c),
and therefore may overwrite them.
KSZ9021:
All skew control options are specified in picoseconds. The minimum
value is 0, the maximum value is 3000, and it can be specified in 200ps
steps, *but* these values are in no way what you get because this chip's
skew values actually increase in 120ps steps, starting from -840ps. The
incorrect values came from an error in the original KSZ9021 datasheet
before it was corrected in revision 1.2 (Feb 2014), but it is too late to
change the driver now because of the many existing device trees that have
been created using values that go up in increments of 200.
The following table shows the actual skew delay you will get for each of the
possible devicetree values, and the number that will be programmed into the
corresponding pad skew register:
Device Tree Value Delay Pad Skew Register Value
-----------------------------------------------------
0 -840ps 0000
200 -720ps 0001
400 -600ps 0010
600 -480ps 0011
800 -360ps 0100
1000 -240ps 0101
1200 -120ps 0110
1400 0ps 0111
1600 120ps 1000
1800 240ps 1001
2000 360ps 1010
2200 480ps 1011
2400 600ps 1100
2600 720ps 1101
2800 840ps 1110
3000 960ps 1111
Optional properties:
- rxc-skew-ps : Skew control of RXC pad
- rxdv-skew-ps : Skew control of RX CTL pad
- txc-skew-ps : Skew control of TXC pad
- txen-skew-ps : Skew control of TX CTL pad
- rxd0-skew-ps : Skew control of RX data 0 pad
- rxd1-skew-ps : Skew control of RX data 1 pad
- rxd2-skew-ps : Skew control of RX data 2 pad
- rxd3-skew-ps : Skew control of RX data 3 pad
- txd0-skew-ps : Skew control of TX data 0 pad
- txd1-skew-ps : Skew control of TX data 1 pad
- txd2-skew-ps : Skew control of TX data 2 pad
- txd3-skew-ps : Skew control of TX data 3 pad
KSZ9031:
All skew control options are specified in picoseconds. The minimum
value is 0, and the maximum is property-dependent. The increment
step is 60ps. The default value is the neutral setting, so setting
rxc-skew-ps=<0> actually results in -900 picoseconds adjustment.
The KSZ9031 hardware supports a range of skew values from negative to
positive, where the specific range is property dependent. All values
specified in the devicetree are offset by the minimum value so they
can be represented as positive integers in the devicetree since it's
difficult to represent a negative number in the devictree.
The following 5-bit values table apply to rxc-skew-ps and txc-skew-ps.
Pad Skew Value Delay (ps) Devicetree Value
------------------------------------------------------
0_0000 -900ps 0
0_0001 -840ps 60
0_0010 -780ps 120
0_0011 -720ps 180
0_0100 -660ps 240
0_0101 -600ps 300
0_0110 -540ps 360
0_0111 -480ps 420
0_1000 -420ps 480
0_1001 -360ps 540
0_1010 -300ps 600
0_1011 -240ps 660
0_1100 -180ps 720
0_1101 -120ps 780
0_1110 -60ps 840
0_1111 0ps 900
1_0000 60ps 960
1_0001 120ps 1020
1_0010 180ps 1080
1_0011 240ps 1140
1_0100 300ps 1200
1_0101 360ps 1260
1_0110 420ps 1320
1_0111 480ps 1380
1_1000 540ps 1440
1_1001 600ps 1500
1_1010 660ps 1560
1_1011 720ps 1620
1_1100 780ps 1680
1_1101 840ps 1740
1_1110 900ps 1800
1_1111 960ps 1860
The following 4-bit values table apply to the txdX-skew-ps, rxdX-skew-ps
data pads, and the rxdv-skew-ps, txen-skew-ps control pads.
Pad Skew Value Delay (ps) Devicetree Value
------------------------------------------------------
0000 -420ps 0
0001 -360ps 60
0010 -300ps 120
0011 -240ps 180
0100 -180ps 240
0101 -120ps 300
0110 -60ps 360
0111 0ps 420
1000 60ps 480
1001 120ps 540
1010 180ps 600
1011 240ps 660
1100 300ps 720
1101 360ps 780
1110 420ps 840
1111 480ps 900
Optional properties:
Maximum value of 1860, default value 900:
- rxc-skew-ps : Skew control of RX clock pad
- txc-skew-ps : Skew control of TX clock pad
Maximum value of 900, default value 420:
- rxdv-skew-ps : Skew control of RX CTL pad
- txen-skew-ps : Skew control of TX CTL pad
- rxd0-skew-ps : Skew control of RX data 0 pad
- rxd1-skew-ps : Skew control of RX data 1 pad
- rxd2-skew-ps : Skew control of RX data 2 pad
- rxd3-skew-ps : Skew control of RX data 3 pad
- txd0-skew-ps : Skew control of TX data 0 pad
- txd1-skew-ps : Skew control of TX data 1 pad
- txd2-skew-ps : Skew control of TX data 2 pad
- txd3-skew-ps : Skew control of TX data 3 pad
- micrel,force-master:
Boolean, force phy to master mode. Only set this option if the phy
reference clock provided at CLK125_NDO pin is used as MAC reference
clock because the clock jitter in slave mode is too high (errata#2).
Attention: The link partner must be configurable as slave otherwise
no link will be established.
KSZ9131:
LAN8841:
All skew control options are specified in picoseconds. The increment
step is 100ps. Unlike KSZ9031, the values represent picoseccond delays.
A negative value can be assigned as rxc-skew-psec = <(-100)>;.
Optional properties:
Range of the value -700 to 2400, default value 0:
- rxc-skew-psec : Skew control of RX clock pad
- txc-skew-psec : Skew control of TX clock pad
Range of the value -700 to 800, default value 0:
- rxdv-skew-psec : Skew control of RX CTL pad
- txen-skew-psec : Skew control of TX CTL pad
- rxd0-skew-psec : Skew control of RX data 0 pad
- rxd1-skew-psec : Skew control of RX data 1 pad
- rxd2-skew-psec : Skew control of RX data 2 pad
- rxd3-skew-psec : Skew control of RX data 3 pad
- txd0-skew-psec : Skew control of TX data 0 pad
- txd1-skew-psec : Skew control of TX data 1 pad
- txd2-skew-psec : Skew control of TX data 2 pad
- txd3-skew-psec : Skew control of TX data 3 pad
Examples:
/* Attach to an Ethernet device with autodetected PHY */
&enet {
rxc-skew-ps = <1800>;
rxdv-skew-ps = <0>;
txc-skew-ps = <1800>;
txen-skew-ps = <0>;
status = "okay";
};
/* Attach to an explicitly-specified PHY */
mdio {
phy0: ethernet-phy@0 {
rxc-skew-ps = <1800>;
rxdv-skew-ps = <0>;
txc-skew-ps = <1800>;
txen-skew-ps = <0>;
reg = <0>;
};
};
ethernet@70000 {
phy = <&phy0>;
phy-mode = "rgmii-id";
};
References
Micrel ksz9021rl/rn Data Sheet, Revision 1.2. Dated 2/13/2014.
http://www.micrel.com/_PDF/Ethernet/datasheets/ksz9021rl-rn_ds.pdf
Micrel ksz9031rnx Data Sheet, Revision 2.1. Dated 11/20/2014.
http://www.micrel.com/_PDF/Ethernet/datasheets/KSZ9031RNX.pdf
Notes:
Note that a previous version of the Micrel ksz9021rl/rn Data Sheet
was missing extended register 106 (transmit data pad skews), and
incorrectly specified the ps per step as 200ps/step instead of
120ps/step. The latest update to this document reflects the latest
revision of the Micrel specification even though usage in the kernel
still reflects that incorrect document.

57
Documentation/devicetree/bindings/net/micrel.txt
View file

@ -1,57 +0,0 @@
Micrel PHY properties.
These properties cover the base properties Micrel PHYs.
Optional properties:
- micrel,led-mode : LED mode value to set for PHYs with configurable LEDs.
Configure the LED mode with single value. The list of PHYs and the
bits that are currently supported:
KSZ8001: register 0x1e, bits 15..14
KSZ8041: register 0x1e, bits 15..14
KSZ8021: register 0x1f, bits 5..4
KSZ8031: register 0x1f, bits 5..4
KSZ8051: register 0x1f, bits 5..4
KSZ8081: register 0x1f, bits 5..4
KSZ8091: register 0x1f, bits 5..4
LAN8814: register EP5.0, bit 6
See the respective PHY datasheet for the mode values.
- micrel,rmii-reference-clock-select-25-mhz: RMII Reference Clock Select
bit selects 25 MHz mode
Setting the RMII Reference Clock Select bit enables 25 MHz rather
than 50 MHz clock mode.
Note that this option is only needed for certain PHY revisions with a
non-standard, inverted function of this configuration bit.
Specifically, a clock reference ("rmii-ref" below) is always needed to
actually select a mode.
- clocks, clock-names: contains clocks according to the common clock bindings.
supported clocks:
- KSZ8021, KSZ8031, KSZ8081, KSZ8091: "rmii-ref": The RMII reference
input clock. Used to determine the XI input clock.
- micrel,fiber-mode: If present the PHY is configured to operate in fiber mode
Some PHYs, such as the KSZ8041FTL variant, support fiber mode, enabled
by the FXEN boot strapping pin. It can't be determined from the PHY
registers whether the PHY is in fiber mode, so this boolean device tree
property can be used to describe it.
In fiber mode, auto-negotiation is disabled and the PHY can only work in
100base-fx (full and half duplex) modes.
- coma-mode-gpios: If present the given gpio will be deasserted when the
PHY is probed.
Some PHYs have a COMA mode input pin which puts the PHY into
isolate and power-down mode. On some boards this input is connected
to a GPIO of the SoC.
Supported on the LAN8814.

131
Documentation/devicetree/bindings/net/micrel.yaml Normal file
View file

@ -0,0 +1,131 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/micrel.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Micrel KSZ series PHYs and switches
maintainers:
- Andrew Lunn <andrew@lunn.ch>
- Stefan Eichenberger <eichest@gmail.com>
description:
The Micrel KSZ series contains different network phys and switches.
properties:
compatible:
enum:
- ethernet-phy-id000e.7237 # KSZ8873MLL
- ethernet-phy-id0022.1430 # KSZ886X
- ethernet-phy-id0022.1435 # KSZ8863
- ethernet-phy-id0022.1510 # KSZ8041
- ethernet-phy-id0022.1537 # KSZ8041RNLI
- ethernet-phy-id0022.1550 # KSZ8051
- ethernet-phy-id0022.1555 # KSZ8021
- ethernet-phy-id0022.1556 # KSZ8031
- ethernet-phy-id0022.1560 # KSZ8081, KSZ8091
- ethernet-phy-id0022.1570 # KSZ8061
- ethernet-phy-id0022.161a # KSZ8001
- ethernet-phy-id0022.1720 # KS8737
micrel,fiber-mode:
type: boolean
description: |
If present the PHY is configured to operate in fiber mode.
The KSZ8041FTL variant supports fiber mode, enabled by the FXEN
boot strapping pin. It can't be determined from the PHY registers
whether the PHY is in fiber mode, so this boolean device tree
property can be used to describe it.
In fiber mode, auto-negotiation is disabled and the PHY can only
work in 100base-fx (full and half duplex) modes.
micrel,led-mode:
$ref: /schemas/types.yaml#/definitions/uint32
description: |
LED mode value to set for PHYs with configurable LEDs.
Configure the LED mode with single value. The list of PHYs and the
bits that are currently supported:
KSZ8001: register 0x1e, bits 15..14
KSZ8041: register 0x1e, bits 15..14
KSZ8021: register 0x1f, bits 5..4
KSZ8031: register 0x1f, bits 5..4
KSZ8051: register 0x1f, bits 5..4
KSZ8081: register 0x1f, bits 5..4
KSZ8091: register 0x1f, bits 5..4
See the respective PHY datasheet for the mode values.
minimum: 0
maximum: 3
allOf:
- $ref: ethernet-phy.yaml#
- if:
not:
properties:
compatible:
contains:
const: ethernet-phy-id0022.1510
then:
properties:
micrel,fiber-mode: false
- if:
not:
properties:
compatible:
contains:
enum:
- ethernet-phy-id0022.1510
- ethernet-phy-id0022.1555
- ethernet-phy-id0022.1556
- ethernet-phy-id0022.1550
- ethernet-phy-id0022.1560
- ethernet-phy-id0022.161a
then:
properties:
micrel,led-mode: false
- if:
properties:
compatible:
contains:
enum:
- ethernet-phy-id0022.1555
- ethernet-phy-id0022.1556
- ethernet-phy-id0022.1560
then:
properties:
clock-names:
const: rmii-ref
description:
The RMII reference input clock. Used to determine the XI input
clock.
micrel,rmii-reference-clock-select-25-mhz:
type: boolean
description: |
RMII Reference Clock Select bit selects 25 MHz mode
Setting the RMII Reference Clock Select bit enables 25 MHz rather
than 50 MHz clock mode.
dependentRequired:
micrel,rmii-reference-clock-select-25-mhz: [ clock-names ]
unevaluatedProperties: false
examples:
- |
mdio {
#address-cells = <1>;
#size-cells = <0>;
ethernet-phy@5 {
compatible = "ethernet-phy-id0022.1510";
reg = <5>;
micrel,led-mode = <2>;
micrel,fiber-mode;
};
};

15
Documentation/devicetree/bindings/net/microchip,sparx5-switch.yaml
View file

@ -151,10 +151,23 @@ properties:
required:
- reg
- phys
- phy-mode
- microchip,bandwidth
if:
not:
properties:
phy-mode:
contains:
enum:
- rgmii
- rgmii-id
- rgmii-rxid
- rgmii-txid
then:
required:
- phys
oneOf:
- required:
- phy-handle

11
Documentation/devicetree/bindings/net/mscc,miim.yaml
View file

@ -14,9 +14,14 @@ allOf:
properties:
compatible:
enum:
- mscc,ocelot-miim
- microchip,lan966x-miim
oneOf:
- enum:
- mscc,ocelot-miim
- microchip,lan966x-miim
- items:
- enum:
- microchip,lan9691-miim
- const: mscc,ocelot-miim
"#address-cells":
const: 1

13
Documentation/devicetree/bindings/net/nxp,s32-dwmac.yaml
View file

@ -32,6 +32,18 @@ properties:
- description: Main GMAC registers
- description: GMAC PHY mode control register
nxp,phy-sel:
$ref: /schemas/types.yaml#/definitions/phandle-array
items:
- items:
- description: phandle to the GPR syscon node
- description: offset of PHY selection register
description:
This phandle points to the GMAC_0_CTRL_STS register which controls the
GMAC_0 configuration options. The register lets you select the PHY
interface and the PHY mode. It also controls if the FTM_0 or FTM_1
FlexTimer Modules connect to GMAC_0.
interrupts:
maxItems: 1
@ -74,6 +86,7 @@ examples:
compatible = "nxp,s32g2-dwmac";
reg = <0x0 0x4033c000 0x0 0x2000>, /* gmac IP */
<0x0 0x4007c004 0x0 0x4>; /* GMAC_0_CTRL_STS */
nxp,phy-sel = <&gpr 0x4>;
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq";

7
Documentation/devicetree/bindings/net/pcs/mediatek,sgmiisys.yaml
View file

@ -39,12 +39,17 @@ properties:
const: 1
mediatek,pnswap:
description: Invert polarity of the SGMII data lanes
description:
Invert polarity of the SGMII data lanes.
This property is deprecated, for details please refer to
Documentation/devicetree/bindings/phy/phy-common-props.yaml.
type: boolean
deprecated: true
pcs:
type: object
description: MediaTek LynxI HSGMII PCS
$ref: /schemas/phy/phy-common-props.yaml#
properties:
compatible:
const: mediatek,mt7988-sgmii

7
Documentation/devicetree/bindings/net/pcs/renesas,rzn1-miic.yaml
View file

@ -86,6 +86,13 @@ patternProperties:
and include/dt-bindings/net/renesas,r9a09g077-pcs-miic.h for RZ/N2H, RZ/T2H SoCs.
$ref: /schemas/types.yaml#/definitions/uint32
renesas,miic-phy-link-active-low:
type: boolean
description: Indicates that the PHY-link signal provided by the Ethernet switch,
EtherCAT, or SERCOS3 interface is active low. When present, this property
sets the corresponding signal polarity to active low. When omitted, the signal
defaults to active high.
required:
- reg
- renesas,miic-input

81
Documentation/devicetree/bindings/net/renesas,rzv2h-gbeth.yaml
View file

@ -26,6 +26,9 @@ select:
properties:
compatible:
oneOf:
- items:
- const: renesas,r9a08g046-gbeth # RZ/G3L
- const: snps,dwmac-5.30a
- items:
- enum:
- renesas,r9a09g047-gbeth # RZ/G3E
@ -47,13 +50,19 @@ properties:
clocks:
oneOf:
- items:
- description: CSR clock
- description: AXI system clock
- description: CSR/Register access clock
- description: AXI system/Main clock
- description: PTP clock
- description: TX clock
- description: RX clock
- description: TX clock phase-shifted by 180 degrees
- description: RX clock phase-shifted by 180 degrees
- description: RMII clock
- description: RMII TX clock
- description: RMII RX clock
minItems: 7
- items:
- description: CSR clock
- description: AXI system clock
@ -69,6 +78,12 @@ properties:
- const: rx
- const: tx-180
- const: rx-180
- const: rmii
- const: rmii_tx
- const: rmii_rx
minItems: 7
- items:
- const: stmmaceth
- const: pclk
@ -88,6 +103,22 @@ properties:
- const: tx-queue-1
- const: tx-queue-2
- const: tx-queue-3
- items:
- const: macirq
- const: eth_wake_irq
- const: eth_lpi
- const: rx-queue-0
- const: rx-queue-1
- const: rx-queue-2
- const: rx-queue-3
- const: tx-queue-0
- const: tx-queue-1
- const: tx-queue-2
- const: tx-queue-3
- const: ptp-pps-0
- const: ptp-pps-1
- const: ptp-pps-2
- const: ptp-pps-3
- items:
- const: macirq
- const: eth_wake_irq
@ -135,6 +166,27 @@ required:
allOf:
- $ref: snps,dwmac.yaml#
- if:
properties:
compatible:
contains:
const: renesas,r9a08g046-gbeth
then:
properties:
clocks:
minItems: 10
clock-names:
minItems: 10
interrupts:
minItems: 15
maxItems: 15
interrupt-names:
minItems: 15
maxItems: 15
- if:
properties:
compatible:
@ -163,12 +215,26 @@ allOf:
required:
- reset-names
else:
properties:
resets:
maxItems: 1
pcs-handle: false
reset-names: false
- if:
properties:
compatible:
contains:
const: renesas,rzv2h-gbeth
then:
properties:
clocks:
minItems: 7
maxItems: 7
clock-names:
minItems: 7
maxItems: 7
interrupts:
minItems: 11
@ -178,13 +244,6 @@ allOf:
minItems: 11
maxItems: 11
resets:
maxItems: 1
pcs-handle: false
reset-names: false
unevaluatedProperties: false
examples:

2
Documentation/devicetree/bindings/net/rockchip-dwmac.yaml
View file

@ -85,6 +85,8 @@ properties:
- clk_mac_refout
- clk_mac_speed
dma-coherent: true
clock_in_out:
description:
For RGMII, it must be "input", means main clock(125MHz)

3
Documentation/devicetree/bindings/net/snps,dwmac.yaml
View file

@ -75,6 +75,7 @@ properties:
- qcom,sc8280xp-ethqos
- qcom,sm8150-ethqos
- renesas,r9a06g032-gmac
- renesas,r9a08g046-gbeth
- renesas,r9a09g077-gbeth
- renesas,rzn1-gmac
- renesas,rzv2h-gbeth
@ -142,6 +143,8 @@ properties:
pattern: '^rx-queue-[0-7]$'
- description: Per channel transmit completion interrupt
pattern: '^tx-queue-[0-7]$'
- description: PPS interrupt
pattern: '^ptp-pps-[0-3]$'
clocks:
minItems: 1

9
Documentation/devicetree/bindings/net/ti,dp83822.yaml
View file

@ -47,6 +47,9 @@ properties:
is disabled.
In fiber mode, auto-negotiation is disabled and the PHY can only work in
100base-fx (full and half duplex) modes.
This property is deprecated, for details please refer to
Documentation/devicetree/bindings/net/ethernet-connector.yaml
deprecated: true
rx-internal-delay-ps:
description: |
@ -141,7 +144,11 @@ examples:
tx-internal-delay-ps = <1>;
ti,gpio2-clk-out = "xi";
mac-termination-ohms = <43>;
mdi {
connector-0 {
media = "BaseF";
};
};
};
};
...

1
Documentation/devicetree/bindings/net/wireless/qcom,ath11k-pci.yaml
View file

@ -37,6 +37,7 @@ properties:
firmware-name:
maxItems: 1
deprecated: true
description:
If present, a board or platform specific string used to lookup
usecase-specific firmware files for the device.

9
Documentation/devicetree/bindings/net/wireless/qcom,ath11k.yaml
View file

@ -214,15 +214,6 @@ allOf:
- const: wbm2host-tx-completions-ring2
- const: wbm2host-tx-completions-ring1
- const: tcl2host-status-ring
- if:
properties:
compatible:
contains:
enum:
- qcom,ipq8074-wifi
- qcom,ipq6018-wifi
then:
required:
- interrupt-names

157
Documentation/devicetree/bindings/phy/phy-common-props.yaml Normal file
View file

@ -0,0 +1,157 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/phy/phy-common-props.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Common PHY and network PCS properties
description:
Common PHY and network PCS properties, such as peak-to-peak transmit
amplitude.
maintainers:
- Marek Behún <kabel@kernel.org>
$defs:
protocol-names:
description:
Names of the PHY modes. If a value of 'default' is provided, the system
should use it for any PHY mode that is otherwise not defined here. If
'default' is not provided, the system should use manufacturer default value.
minItems: 1
maxItems: 16
uniqueItems: true
items:
enum:
- default
# ethernet modes
- sgmii
- qsgmii
- xgmii
- 1000base-x
- 2500base-x
- 5gbase-r
- rxaui
- xaui
- 10gbase-kr
- usxgmii
- 10gbase-r
- 25gbase-r
# PCIe modes
- pcie
- pcie1
- pcie2
- pcie3
- pcie4
- pcie5
- pcie6
# USB modes
- usb
- usb-ls
- usb-fs
- usb-hs
- usb-ss
- usb-ss+
- usb-4
# storage modes
- sata
- ufs-hs
- ufs-hs-a
- ufs-hs-b
# display modes
- lvds
- dp
- dp-rbr
- dp-hbr
- dp-hbr2
- dp-hbr3
- dp-uhbr-10
- dp-uhbr-13.5
- dp-uhbr-20
# camera modes
- mipi-dphy
- mipi-dphy-univ
- mipi-dphy-v2.5-univ
properties:
tx-p2p-microvolt:
description:
Transmit amplitude voltages in microvolts, peak-to-peak. If this property
contains multiple values for various PHY modes, the
'tx-p2p-microvolt-names' property must be provided and contain
corresponding mode names.
tx-p2p-microvolt-names:
description:
Names of the modes corresponding to voltages in the 'tx-p2p-microvolt'
property. Required only if multiple voltages are provided.
$ref: "#/$defs/protocol-names"
rx-polarity:
description:
An array of values indicating whether the differential receiver's
polarity is inverted. Each value can be one of
PHY_POL_NORMAL (0) which means the negative signal is decoded from the
RXN input, and the positive signal from the RXP input;
PHY_POL_INVERT (1) which means the negative signal is decoded from the
RXP input, and the positive signal from the RXN input;
PHY_POL_AUTO (2) which means the receiver performs automatic polarity
detection and correction, which is a mandatory part of link training for
some protocols (PCIe, USB SS).
The values are defined in <dt-bindings/phy/phy.h>. If the property is
absent, the default value is undefined.
Note that the RXP and RXN inputs refer to the block that this property is
under, and do not necessarily directly translate to external pins.
If this property contains multiple values for various protocols, the
'rx-polarity-names' property must be provided.
$ref: /schemas/types.yaml#/definitions/uint32-array
minItems: 1
maxItems: 16
items:
enum: [0, 1, 2]
rx-polarity-names:
$ref: '#/$defs/protocol-names'
tx-polarity:
description:
Like 'rx-polarity', except it applies to differential transmitters,
and only the values of PHY_POL_NORMAL and PHY_POL_INVERT are possible.
$ref: /schemas/types.yaml#/definitions/uint32-array
minItems: 1
maxItems: 16
items:
enum: [0, 1]
tx-polarity-names:
$ref: '#/$defs/protocol-names'
dependencies:
tx-p2p-microvolt-names: [ tx-p2p-microvolt ]
rx-polarity-names: [ rx-polarity ]
tx-polarity-names: [ tx-polarity ]
additionalProperties: true
examples:
- |
#include <dt-bindings/phy/phy.h>
phy: phy {
#phy-cells = <1>;
tx-p2p-microvolt = <915000>, <1100000>, <1200000>;
tx-p2p-microvolt-names = "2500base-x", "usb-hs", "usb-ss";
rx-polarity = <PHY_POL_AUTO>, <PHY_POL_NORMAL>;
rx-polarity-names = "usb-ss", "default";
tx-polarity = <PHY_POL_INVERT>;
};

103
Documentation/devicetree/bindings/phy/transmit-amplitude.yaml
View file

@ -1,103 +0,0 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/phy/transmit-amplitude.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Common PHY and network PCS transmit amplitude property
description:
Binding describing the peak-to-peak transmit amplitude for common PHYs
and network PCSes.
maintainers:
- Marek Behún <kabel@kernel.org>
properties:
tx-p2p-microvolt:
description:
Transmit amplitude voltages in microvolts, peak-to-peak. If this property
contains multiple values for various PHY modes, the
'tx-p2p-microvolt-names' property must be provided and contain
corresponding mode names.
tx-p2p-microvolt-names:
description: |
Names of the modes corresponding to voltages in the 'tx-p2p-microvolt'
property. Required only if multiple voltages are provided.
If a value of 'default' is provided, the system should use it for any PHY
mode that is otherwise not defined here. If 'default' is not provided, the
system should use manufacturer default value.
minItems: 1
maxItems: 16
items:
enum:
- default
# ethernet modes
- sgmii
- qsgmii
- xgmii
- 1000base-x
- 2500base-x
- 5gbase-r
- rxaui
- xaui
- 10gbase-kr
- usxgmii
- 10gbase-r
- 25gbase-r
# PCIe modes
- pcie
- pcie1
- pcie2
- pcie3
- pcie4
- pcie5
- pcie6
# USB modes
- usb
- usb-ls
- usb-fs
- usb-hs
- usb-ss
- usb-ss+
- usb-4
# storage modes
- sata
- ufs-hs
- ufs-hs-a
- ufs-hs-b
# display modes
- lvds
- dp
- dp-rbr
- dp-hbr
- dp-hbr2
- dp-hbr3
- dp-uhbr-10
- dp-uhbr-13.5
- dp-uhbr-20
# camera modes
- mipi-dphy
- mipi-dphy-univ
- mipi-dphy-v2.5-univ
dependencies:
tx-p2p-microvolt-names: [ tx-p2p-microvolt ]
additionalProperties: true
examples:
- |
phy: phy {
#phy-cells = <1>;
tx-p2p-microvolt = <915000>, <1100000>, <1200000>;
tx-p2p-microvolt-names = "2500base-x", "usb-hs", "usb-ss";
};

46
Documentation/devicetree/bindings/ptp/amazon,vmclock.yaml Normal file
View file

@ -0,0 +1,46 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/ptp/amazon,vmclock.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Virtual Machine Clock
maintainers:
- David Woodhouse <dwmw2@infradead.org>
description:
The vmclock device provides a precise clock source and allows for
accurate timekeeping across live migration and snapshot/restore
operations. The full specification of the shared data structure is
available at https://uapi-group.org/specifications/specs/vmclock/
properties:
compatible:
const: amazon,vmclock
reg:
description:
Specifies the shared memory region containing the vmclock_abi structure.
maxItems: 1
interrupts:
description:
Interrupt used to notify when the contents of the vmclock_abi structure
have been updated.
maxItems: 1
required:
- compatible
- reg
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
ptp@80000000 {
compatible = "amazon,vmclock";
reg = <0x80000000 0x1000>;
interrupts = <GIC_SPI 36 IRQ_TYPE_EDGE_RISING>;
};

12
Documentation/netlink/specs/dpll.yaml
View file

@ -446,6 +446,16 @@ attribute-sets:
doc: |
Granularity of phase adjustment, in picoseconds. The value of
phase adjustment must be a multiple of this granularity.
-
name: fractional-frequency-offset-ppt
type: sint
doc: |
The FFO (Fractional Frequency Offset) of the pin with respect to
the nominal frequency.
Value = (frequency_measured - frequency_nominal) / frequency_nominal
Value is in PPT (parts per trillion, 10^-12).
Note: This attribute provides higher resolution than the standard
fractional-frequency-offset (which is in PPM).
-
name: pin-parent-device
@ -550,6 +560,7 @@ operations:
request:
attributes:
- id
- mode
- phase-offset-monitor
- phase-offset-avg-factor
-
@ -627,6 +638,7 @@ operations:
- phase-adjust-max
- phase-adjust
- fractional-frequency-offset
- fractional-frequency-offset-ppt
- esync-frequency
- esync-frequency-supported
- esync-pulse

1
Documentation/netlink/specs/mptcp_pm.yaml
View file

@ -15,6 +15,7 @@ definitions:
type: enum
name: event-type
enum-name: mptcp-event-type
doc: Netlink MPTCP event types
name-prefix: mptcp-event-
entries:
-

3
Documentation/netlink/specs/rt-link.yaml
View file

@ -1914,6 +1914,9 @@ attribute-sets:
name: port-range
type: binary
struct: ifla-geneve-port-range
-
name: gro-hint
type: flag
-
name: linkinfo-hsr-attrs
name-prefix: ifla-hsr-

3
Documentation/netlink/specs/tc.yaml
View file

@ -2207,6 +2207,9 @@ attribute-sets:
-
name: blue-timer-us
type: s32
-
name: active-queues
type: u32
-
name: cake-tin-stats-attrs
name-prefix: tca-cake-tin-stats-

1
Documentation/networking/device_drivers/ethernet/index.rst
View file

@ -48,7 +48,6 @@ Contents:
meta/fbnic
microsoft/netvsc
mucse/rnpgbe
neterion/s2io
netronome/nfp
pensando/ionic
pensando/ionic_rdma

196
Documentation/networking/device_drivers/ethernet/neterion/s2io.rst
View file

@ -1,196 +0,0 @@
.. SPDX-License-Identifier: GPL-2.0
=========================================================
Neterion's (Formerly S2io) Xframe I/II PCI-X 10GbE driver
=========================================================
Release notes for Neterion's (Formerly S2io) Xframe I/II PCI-X 10GbE driver.
.. Contents
- 1. Introduction
- 2. Identifying the adapter/interface
- 3. Features supported
- 4. Command line parameters
- 5. Performance suggestions
- 6. Available Downloads
1. Introduction
===============
This Linux driver supports Neterion's Xframe I PCI-X 1.0 and
Xframe II PCI-X 2.0 adapters. It supports several features
such as jumbo frames, MSI/MSI-X, checksum offloads, TSO, UFO and so on.
See below for complete list of features.
All features are supported for both IPv4 and IPv6.
2. Identifying the adapter/interface
====================================
a. Insert the adapter(s) in your system.
b. Build and load driver::
# insmod s2io.ko
c. View log messages::
# dmesg | tail -40
You will see messages similar to::
eth3: Neterion Xframe I 10GbE adapter (rev 3), Version 2.0.9.1, Intr type INTA
eth4: Neterion Xframe II 10GbE adapter (rev 2), Version 2.0.9.1, Intr type INTA
eth4: Device is on 64 bit 133MHz PCIX(M1) bus
The above messages identify the adapter type(Xframe I/II), adapter revision,
driver version, interface name(eth3, eth4), Interrupt type(INTA, MSI, MSI-X).
In case of Xframe II, the PCI/PCI-X bus width and frequency are displayed
as well.
To associate an interface with a physical adapter use "ethtool -p <ethX>".
The corresponding adapter's LED will blink multiple times.
3. Features supported
=====================
a. Jumbo frames. Xframe I/II supports MTU up to 9600 bytes,
modifiable using ip command.
b. Offloads. Supports checksum offload(TCP/UDP/IP) on transmit
and receive, TSO.
c. Multi-buffer receive mode. Scattering of packet across multiple
buffers. Currently driver supports 2-buffer mode which yields
significant performance improvement on certain platforms(SGI Altix,
IBM xSeries).
d. MSI/MSI-X. Can be enabled on platforms which support this feature
resulting in noticeable performance improvement (up to 7% on certain
platforms).
e. Statistics. Comprehensive MAC-level and software statistics displayed
using "ethtool -S" option.
f. Multi-FIFO/Ring. Supports up to 8 transmit queues and receive rings,
with multiple steering options.
4. Command line parameters
==========================
a. tx_fifo_num
Number of transmit queues
Valid range: 1-8
Default: 1
b. rx_ring_num
Number of receive rings
Valid range: 1-8
Default: 1
c. tx_fifo_len
Size of each transmit queue
Valid range: Total length of all queues should not exceed 8192
Default: 4096
d. rx_ring_sz
Size of each receive ring(in 4K blocks)
Valid range: Limited by memory on system
Default: 30
e. intr_type
Specifies interrupt type. Possible values 0(INTA), 2(MSI-X)
Valid values: 0, 2
Default: 2
5. Performance suggestions
==========================
General:
a. Set MTU to maximum(9000 for switch setup, 9600 in back-to-back configuration)
b. Set TCP windows size to optimal value.
For instance, for MTU=1500 a value of 210K has been observed to result in
good performance::
# sysctl -w net.ipv4.tcp_rmem="210000 210000 210000"
# sysctl -w net.ipv4.tcp_wmem="210000 210000 210000"
For MTU=9000, TCP window size of 10 MB is recommended::
# sysctl -w net.ipv4.tcp_rmem="10000000 10000000 10000000"
# sysctl -w net.ipv4.tcp_wmem="10000000 10000000 10000000"
Transmit performance:
a. By default, the driver respects BIOS settings for PCI bus parameters.
However, you may want to experiment with PCI bus parameters
max-split-transactions(MOST) and MMRBC (use setpci command).
A MOST value of 2 has been found optimal for Opterons and 3 for Itanium.
It could be different for your hardware.
Set MMRBC to 4K**.
For example you can set
For opteron::
#setpci -d 17d5:* 62=1d
For Itanium::
#setpci -d 17d5:* 62=3d
For detailed description of the PCI registers, please see Xframe User Guide.
b. Ensure Transmit Checksum offload is enabled. Use ethtool to set/verify this
parameter.
c. Turn on TSO(using "ethtool -K")::
# ethtool -K <ethX> tso on
Receive performance:
a. By default, the driver respects BIOS settings for PCI bus parameters.
However, you may want to set PCI latency timer to 248::
#setpci -d 17d5:* LATENCY_TIMER=f8
For detailed description of the PCI registers, please see Xframe User Guide.
b. Use 2-buffer mode. This results in large performance boost on
certain platforms(eg. SGI Altix, IBM xSeries).
c. Ensure Receive Checksum offload is enabled. Use "ethtool -K ethX" command to
set/verify this option.
d. Enable NAPI feature(in kernel configuration Device Drivers ---> Network
device support ---> Ethernet (10000 Mbit) ---> S2IO 10Gbe Xframe NIC) to
bring down CPU utilization.
.. note::
For AMD opteron platforms with 8131 chipset, MMRBC=1 and MOST=1 are
recommended as safe parameters.
For more information, please review the AMD8131 errata at
http://vip.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/
26310_AMD-8131_HyperTransport_PCI-X_Tunnel_Revision_Guide_rev_3_18.pdf
6. Support
==========
For further support please contact either your 10GbE Xframe NIC vendor (IBM,
HP, SGI etc.)

1
Documentation/networking/index.rst
View file

@ -96,6 +96,7 @@ Contents:
packet_mmap
phonet
phy-link-topology
phy-port
pktgen
plip
ppp_generic

20
Documentation/networking/iou-zcrx.rst
View file

@ -196,6 +196,26 @@ Return buffers back to the kernel to be used again::
rqe->len = cqe->res;
IO_URING_WRITE_ONCE(*refill_ring.ktail, ++refill_ring.rq_tail);
Area chunking
-------------
zcrx splits the memory area into fixed-length physically contiguous chunks.
This limits the maximum buffer size returned in a single io_uring CQE. Users
can provide a hint to the kernel to use larger chunks by setting the
``rx_buf_len`` field of ``struct io_uring_zcrx_ifq_reg`` to the desired length
during registration. If this field is set to zero, the kernel defaults to
the system page size.
To use larger sizes, the memory area must be backed by physically contiguous
ranges whose sizes are multiples of ``rx_buf_len``. It also requires kernel
and hardware support. If registration fails, users are generally expected to
fall back to defaults by setting ``rx_buf_len`` to zero.
Larger chunks don't give any additional guarantees about buffer sizes returned
in CQEs, and they can vary depending on many factors like traffic pattern,
hardware offload, etc. It doesn't require any application changes beyond zcrx
registration.
Testing
=======

4
Documentation/networking/ip-sysctl.rst
View file

@ -482,7 +482,9 @@ tcp_ecn_option - INTEGER
1 Send AccECN option sparingly according to the minimum option
rules outlined in draft-ietf-tcpm-accurate-ecn.
2 Send AccECN option on every packet whenever it fits into TCP
option space.
option space except when AccECN fallback is triggered.
3 Send AccECN option on every packet whenever it fits into TCP
option space even when AccECN fallback is triggered.
= ============================================================
Default: 2

1
Documentation/networking/net_cachelines/tcp_sock.rst
View file

@ -105,6 +105,7 @@ u32 received_ce read_mostly read_w
u32[3] received_ecn_bytes read_mostly read_write
u8:4 received_ce_pending read_mostly read_write
u32[3] delivered_ecn_bytes read_write
u16 pkts_acked_ewma read_write
u8:2 syn_ect_snt write_mostly read_write
u8:2 syn_ect_rcv read_mostly read_write
u8:2 accecn_minlen write_mostly read_write

4
Documentation/networking/netdevices.rst
View file

@ -80,7 +80,7 @@ unregister_netdev() closes the device and waits for all users to be done
with it. The memory of struct net_device itself may still be referenced
by sysfs but all operations on that device will fail.
free_netdev() can be called after unregister_netdev() returns on when
free_netdev() can be called after unregister_netdev() returns or when
register_netdev() failed.
Device management under RTNL
@ -333,7 +333,7 @@ In the future, there will be an option for individual
drivers to opt out of using ``rtnl_lock`` and instead perform their control
operations directly under the netdev instance lock.
Devices drivers are encouraged to rely on the instance lock where possible.
Device drivers are encouraged to rely on the instance lock where possible.
For the (mostly software) drivers that need to interact with the core stack,
there are two sets of interfaces: ``dev_xxx``/``netdev_xxx`` and ``netif_xxx``

111
Documentation/networking/phy-port.rst Normal file
View file

@ -0,0 +1,111 @@
.. SPDX-License-Identifier: GPL-2.0
.. _phy_port:
=================
Ethernet ports
=================
This document is a basic description of the phy_port infrastructure,
introduced to represent physical interfaces of Ethernet devices.
Without phy_port, we already have quite a lot of information about what the
media-facing interface of a NIC can do and looks like, through the
:c:type:`struct ethtool_link_ksettings <ethtool_link_ksettings>` attributes,
which includes :
- What the NIC can do through the :c:member:`supported` field
- What the Link Partner advertises through :c:member:`lp_advertising`
- Which features we're advertising through :c:member:`advertising`
We also have info about the number of pairs and the PORT type. These settings
are built by aggregating together information reported by various devices that
are sitting on the link :
- The NIC itself, through the :c:member:`get_link_ksettings` callback
- Precise information from the MAC and PCS by using phylink in the MAC driver
- Information reported by the PHY device
- Information reported by an SFP module (which can itself include a PHY)
This model however starts showing its limitations when we consider devices that
have more than one media interface. In such a case, only information about the
actively used interface is reported, and it's not possible to know what the
other interfaces can do. In fact, we have very little information about whether
or not there are any other media interfaces.
The goal of the phy_port representation is to provide a way of representing a
physical interface of a NIC, regardless of what is driving the port (NIC through
a firmware, SFP module, Ethernet PHY).
Multi-port interfaces examples
==============================
Several cases of multi-interface NICs have been observed so far :
Internal MII Mux::
+------------------+
| SoC |
| +-----+ | +-----+
| +-----+ | |-------------| PHY |
| | MAC |--| Mux | | +-----+ +-----+
| +-----+ | |-----| SFP |
| +-----+ | +-----+
+------------------+
Internal Mux with internal PHY::
+------------------------+
| SoC |
| +-----+ +-----+
| +-----+ | |-| PHY |
| | MAC |--| Mux | +-----+ +-----+
| +-----+ | |-----------| SFP |
| +-----+ | +-----+
+------------------------+
External Mux::
+---------+
| SoC | +-----+ +-----+
| | | |--| PHY |
| +-----+ | | | +-----+
| | MAC |----| Mux | +-----+
| +-----+ | | |--| PHY |
| | +-----+ +-----+
| | |
| GPIO-------+
+---------+
Double-port PHY::
+---------+
| SoC | +-----+
| | | |--- RJ45
| +-----+ | | |
| | MAC |---| PHY | +-----+
| +-----+ | | |---| SFP |
+---------+ +-----+ +-----+
phy_port aims at providing a path to support all the above topologies, by
representing the media interfaces in a way that's agnostic to what's driving
the interface. the struct phy_port object has its own set of callback ops, and
will eventually be able to report its own ksettings::
_____ +------+
( )-----| Port |
+-----+ ( ) +------+
| MAC |--( ??? )
+-----+ ( ) +------+
(_____)-----| Port |
+------+
Next steps
==========
As of writing this documentation, only ports controlled by PHY devices are
supported. The next steps will be to add the Netlink API to expose these
to userspace and add support for raw ports (controlled by some firmware, and directly
managed by the NIC driver).
Another parallel task is the introduction of a MII muxing framework to allow the
control of non-PHY driver multi-port setups.

22
Documentation/networking/phy.rst
View file

@ -524,33 +524,13 @@ When a match is found, the PHY layer will invoke the run function associated
with the fixup. This function is passed a pointer to the phy_device of
interest. It should therefore only operate on that PHY.
The platform code can either register the fixup using phy_register_fixup()::
int phy_register_fixup(const char *phy_id,
u32 phy_uid, u32 phy_uid_mask,
int (*run)(struct phy_device *));
Or using one of the two stubs, phy_register_fixup_for_uid() and
phy_register_fixup_for_id()::
The platform code can register the fixup using one of::
int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
int (*run)(struct phy_device *));
int phy_register_fixup_for_id(const char *phy_id,
int (*run)(struct phy_device *));
The stubs set one of the two matching criteria, and set the other one to
match anything.
When phy_register_fixup() or \*_for_uid()/\*_for_id() is called at module load
time, the module needs to unregister the fixup and free allocated memory when
it's unloaded.
Call one of following function before unloading module::
int phy_unregister_fixup(const char *phy_id, u32 phy_uid, u32 phy_uid_mask);
int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask);
int phy_register_fixup_for_id(const char *phy_id);
Standards
=========

12
Documentation/networking/scaling.rst
View file

@ -38,11 +38,15 @@ that is not the focus of these techniques.
The filter used in RSS is typically a hash function over the network
and/or transport layer headers-- for example, a 4-tuple hash over
IP addresses and TCP ports of a packet. The most common hardware
implementation of RSS uses a 128-entry indirection table where each entry
implementation of RSS uses an indirection table where each entry
stores a queue number. The receive queue for a packet is determined
by masking out the low order seven bits of the computed hash for the
packet (usually a Toeplitz hash), taking this number as a key into the
indirection table and reading the corresponding value.
by indexing the indirection table with the low order bits of the
computed hash for the packet (usually a Toeplitz hash).
The indirection table helps even out the traffic distribution when queue
count is not a power of two. NICs should provide an indirection table
at least 4 times larger than the queue count. 4x table results in ~16%
imbalance between the queues, which is acceptable for most applications.
Some NICs support symmetric RSS hashing where, if the IP (source address,
destination address) and TCP/UDP (source port, destination port) tuples

7
Documentation/networking/timestamping.rst
View file

@ -627,10 +627,9 @@ ioctl(SIOCSHWTSTAMP). However, this has not been implemented in all drivers.
--------------------------------------------------------
A driver which supports hardware time stamping must support the
ndo_hwtstamp_set NDO or the legacy SIOCSHWTSTAMP ioctl and update the
supplied struct hwtstamp_config with the actual values as described in
the section on SIOCSHWTSTAMP. It should also support ndo_hwtstamp_get or
the legacy SIOCGHWTSTAMP.
ndo_hwtstamp_set NDO and update the supplied struct hwtstamp_config with
the actual values as described in the section on SIOCSHWTSTAMP. It
should also support ndo_hwtstamp_get NDO to retrieve configuration.
Time stamps for received packets must be stored in the skb. To get a pointer
to the shared time stamp structure of the skb call skb_hwtstamps(). Then

30
Documentation/networking/tls-offload.rst
View file

@ -318,6 +318,36 @@ is restarted.
When the header is matched the device sends a confirmation request
to the kernel, asking if the guessed location is correct (if a TLS record
really starts there), and which record sequence number the given header had.
The asynchronous resync process is coordinated on the kernel side using
struct tls_offload_resync_async, which tracks and manages the resync request.
Helper functions to manage struct tls_offload_resync_async:
``tls_offload_rx_resync_async_request_start()``
Initializes an asynchronous resync attempt by specifying the sequence range to
monitor and resetting internal state in the struct.
``tls_offload_rx_resync_async_request_end()``
Retains the device's guessed TCP sequence number for comparison with current or
future logged ones. It also clears the RESYNC_REQ_ASYNC flag from the resync
request, indicating that the device has submitted its guessed sequence number.
``tls_offload_rx_resync_async_request_cancel()``
Cancels any in-progress resync attempt, clearing the request state.
When the kernel processes an RX segment that begins a new TLS record, it
examines the current status of the asynchronous resynchronization request.
If the device is still waiting to provide its guessed TCP sequence number
(the async state), the kernel records the sequence number of this segment so
that it can later be compared once the device's guess becomes available.
If the device has already submitted its guessed sequence number (the non-async
state), the kernel now tries to match that guess against the sequence numbers of
all TLS record headers that have been logged since the resync request
started.
The kernel confirms the guessed location was correct and tells the device
the record sequence number. Meanwhile, the device had been parsing
and counting all records since the just-confirmed one, it adds the number

61
MAINTAINERS
View file

@ -5185,6 +5185,7 @@ M: Vikas Gupta <vikas.gupta@broadcom.com>
L: netdev@vger.kernel.org
S: Maintained
F: drivers/net/ethernet/broadcom/bnge/
F: include/linux/bnge/hsi.h
BROADCOM BRCM80211 IEEE802.11 WIRELESS DRIVERS
M: Arend van Spriel <arend.vanspriel@broadcom.com>
@ -5685,6 +5686,7 @@ F: Documentation/networking/iso15765-2.rst
F: include/linux/can/can-ml.h
F: include/linux/can/core.h
F: include/linux/can/skb.h
F: include/net/can.h
F: include/net/netns/can.h
F: include/uapi/linux/can.h
F: include/uapi/linux/can/bcm.h
@ -9479,9 +9481,11 @@ R: Russell King <linux@armlinux.org.uk>
L: netdev@vger.kernel.org
S: Maintained
F: Documentation/ABI/testing/sysfs-class-net-phydev
F: Documentation/devicetree/bindings/net/ethernet-connector.yaml
F: Documentation/devicetree/bindings/net/ethernet-phy.yaml
F: Documentation/devicetree/bindings/net/mdio*
F: Documentation/devicetree/bindings/net/qca,ar803x.yaml
F: Documentation/networking/phy-port.rst
F: Documentation/networking/phy.rst
F: drivers/net/mdio/
F: drivers/net/mdio/acpi_mdio.c
@ -9501,6 +9505,7 @@ F: include/linux/phy_link_topology.h
F: include/linux/phylib_stubs.h
F: include/linux/platform_data/mdio-bcm-unimac.h
F: include/linux/platform_data/mdio-gpio.h
F: include/net/phy/
F: include/trace/events/mdio.h
F: include/uapi/linux/mdio.h
F: include/uapi/linux/mii.h
@ -11404,14 +11409,6 @@ S: Maintained
F: Documentation/devicetree/bindings/input/touchscreen/himax,hx852es.yaml
F: drivers/input/touchscreen/himax_hx852x.c
HIPPI
M: Jes Sorensen <jes@trained-monkey.org>
S: Maintained
F: drivers/net/hippi/
F: include/linux/hippidevice.h
F: include/uapi/linux/if_hippi.h
F: net/802/hippi.c
HIRSCHMANN HELLCREEK ETHERNET SWITCH DRIVER
M: Kurt Kanzenbach <kurt@linutronix.de>
L: netdev@vger.kernel.org
@ -11687,6 +11684,7 @@ HSR NETWORK PROTOCOL
L: netdev@vger.kernel.org
S: Orphan
F: net/hsr/
F: tools/testing/selftests/net/hsr/
HT16K33 LED CONTROLLER DRIVER
M: Robin van der Gracht <robin@protonic.nl>
@ -15741,6 +15739,14 @@ S: Supported
F: drivers/net/phy/mxl-86110.c
F: drivers/net/phy/mxl-gpy.c
MAXLINEAR MXL862XX SWITCH DRIVER
M: Daniel Golle <daniel@makrotopia.org>
L: netdev@vger.kernel.org
S: Maintained
F: Documentation/devicetree/bindings/net/dsa/maxlinear,mxl862xx.yaml
F: drivers/net/dsa/mxl862xx/
F: net/dsa/tag_mxl862xx.c
MCAN DEVICE DRIVER
M: Markus Schneider-Pargmann <msp@baylibre.com>
L: linux-can@vger.kernel.org
@ -17786,6 +17792,12 @@ F: drivers/most/
F: drivers/staging/most/
F: include/linux/most.h
MOTORCOMM DWMAC GLUE DRIVER
M: Yao Zi <me@ziyao.cc>
L: netdev@vger.kernel.org
S: Maintained
F: drivers/net/ethernet/stmicro/stmmac/dwmac-motorcomm.c
MOTORCOMM PHY DRIVER
M: Frank <Frank.Sae@motor-comm.com>
L: netdev@vger.kernel.org
@ -18144,7 +18156,7 @@ S: Maintained
F: Documentation/networking/netconsole.rst
F: drivers/net/netconsole.c
F: tools/testing/selftests/drivers/net/lib/sh/lib_netcons.sh
F: tools/testing/selftests/drivers/net/netcons\*
F: tools/testing/selftests/drivers/net/netconsole/
NETDEVSIM
M: Jakub Kicinski <kuba@kernel.org>
@ -18158,13 +18170,6 @@ L: netdev@vger.kernel.org
S: Maintained
F: net/sched/sch_netem.c
NETERION 10GbE DRIVERS (s2io)
M: Jon Mason <jdmason@kudzu.us>
L: netdev@vger.kernel.org
S: Maintained
F: Documentation/networking/device_drivers/ethernet/neterion/s2io.rst
F: drivers/net/ethernet/neterion/
NETFILTER
M: Pablo Neira Ayuso <pablo@netfilter.org>
M: Florian Westphal <fw@strlen.de>
@ -18256,7 +18261,6 @@ F: include/linux/etherdevice.h
F: include/linux/ethtool_netlink.h
F: include/linux/fcdevice.h
F: include/linux/fddidevice.h
F: include/linux/hippidevice.h
F: include/linux/if_*
F: include/linux/inetdevice.h
F: include/linux/netdev*
@ -18344,6 +18348,14 @@ F: drivers/net/phy/phy_link_topology.c
F: include/linux/phy_link_topology.h
F: net/ethtool/phy.c
NETWORKING [ETHTOOL PHY PORT]
M: Maxime Chevallier <maxime.chevallier@bootlin.com>
F: Documentation/devicetree/bindings/net/ethernet-connector.yaml
F: Documentation/networking/phy-port.rst
F: drivers/net/phy/phy_port.c
F: include/linux/phy_port.h
K: struct\s+phy_port|phy_port_
NETWORKING [GENERAL]
M: "David S. Miller" <davem@davemloft.net>
M: Eric Dumazet <edumazet@google.com>
@ -20673,6 +20685,16 @@ L: linux-mtd@lists.infradead.org
S: Maintained
F: drivers/mtd/devices/phram.c
PHY COMMON PROPERTIES
M: Vladimir Oltean <vladimir.oltean@nxp.com>
L: netdev@vger.kernel.org
S: Maintained
Q: https://patchwork.kernel.org/project/netdevbpf/list/
F: Documentation/devicetree/bindings/phy/phy-common-props.yaml
F: drivers/phy/phy-common-props-test.c
F: drivers/phy/phy-common-props.c
F: include/linux/phy/phy-common-props.h
PICOLCD HID DRIVER
M: Bruno Prémont <bonbons@linux-vserver.org>
L: linux-input@vger.kernel.org
@ -21187,6 +21209,7 @@ PTP VMCLOCK SUPPORT
M: David Woodhouse <dwmw2@infradead.org>
L: netdev@vger.kernel.org
S: Maintained
F: Documentation/devicetree/bindings/ptp/amazon,vmclock.yaml
F: drivers/ptp/ptp_vmclock.c
F: include/uapi/linux/vmclock-abi.h
@ -21527,6 +21550,7 @@ QUALCOMM BLUETOOTH DRIVER
M: Bartosz Golaszewski <brgl@kernel.org>
L: linux-arm-msm@vger.kernel.org
S: Maintained
F: Documentation/devicetree/bindings/net/bluetooth/qcom,*
F: drivers/bluetooth/btqca.[ch]
F: drivers/bluetooth/btqcomsmd.c
F: drivers/bluetooth/hci_qca.c
@ -25659,12 +25683,12 @@ F: kernel/taskstats.c
TC subsystem
M: Jamal Hadi Salim <jhs@mojatatu.com>
M: Cong Wang <xiyou.wangcong@gmail.com>
M: Jiri Pirko <jiri@resnulli.us>
L: netdev@vger.kernel.org
S: Maintained
F: include/net/pkt_cls.h
F: include/net/pkt_sched.h
F: include/net/sch_priv.h
F: include/net/tc_act/
F: include/uapi/linux/pkt_cls.h
F: include/uapi/linux/pkt_sched.h
@ -27741,6 +27765,7 @@ L: netdev@vger.kernel.org
S: Maintained
F: drivers/vhost/vsock.c
F: include/linux/virtio_vsock.h
F: include/net/netns/vsock.h
F: include/uapi/linux/virtio_vsock.h
F: net/vmw_vsock/virtio_transport.c
F: net/vmw_vsock/virtio_transport_common.c

1
arch/mips/configs/ip27_defconfig
View file

@ -143,7 +143,6 @@ CONFIG_ATL1C=m
CONFIG_B44=m
CONFIG_BNX2X=m
CONFIG_ENIC=m
CONFIG_DNET=m
CONFIG_BE2NET=m
CONFIG_E1000E=m
CONFIG_IGB=m

1
arch/mips/configs/loongson2k_defconfig
View file

@ -161,7 +161,6 @@ CONFIG_IXGBE=y
# CONFIG_NET_VENDOR_MICROSEMI is not set
# CONFIG_NET_VENDOR_MYRI is not set
# CONFIG_NET_VENDOR_NATSEMI is not set
# CONFIG_NET_VENDOR_NETERION is not set
# CONFIG_NET_VENDOR_NETRONOME is not set
# CONFIG_NET_VENDOR_NI is not set
# CONFIG_NET_VENDOR_NVIDIA is not set

3
arch/mips/configs/mtx1_defconfig
View file

@ -283,7 +283,6 @@ CONFIG_MYRI10GE=m
CONFIG_FEALNX=m
CONFIG_NATSEMI=m
CONFIG_NS83820=m
CONFIG_S2IO=m
CONFIG_PCMCIA_AXNET=m
CONFIG_NE2K_PCI=m
CONFIG_PCMCIA_PCNET=m
@ -310,8 +309,6 @@ CONFIG_PCMCIA_XIRC2PS=m
CONFIG_FDDI=y
CONFIG_DEFXX=m
CONFIG_SKFP=m
CONFIG_HIPPI=y
CONFIG_ROADRUNNER=m
CONFIG_CICADA_PHY=m
CONFIG_DAVICOM_PHY=m
CONFIG_LXT_PHY=m

1
arch/powerpc/configs/powernv_defconfig
View file

@ -166,7 +166,6 @@ CONFIG_BNX2X=m
# CONFIG_CAVIUM_PTP is not set
CONFIG_CHELSIO_T1=m
CONFIG_BE2NET=m
CONFIG_S2IO=m
CONFIG_E100=y
CONFIG_E1000=y
CONFIG_E1000E=y

1
arch/powerpc/configs/ppc64_defconfig
View file

@ -221,7 +221,6 @@ CONFIG_IXGBE=m
CONFIG_I40E=m
CONFIG_MLX4_EN=m
CONFIG_MYRI10GE=m
CONFIG_S2IO=m
CONFIG_PASEMI_MAC=y
CONFIG_NETXEN_NIC=m
CONFIG_SUNGEM=y

1
arch/powerpc/configs/ppc6xx_defconfig
View file

@ -434,7 +434,6 @@ CONFIG_ULI526X=m
CONFIG_PCMCIA_XIRCOM=m
CONFIG_DL2K=m
CONFIG_SUNDANCE=m
CONFIG_S2IO=m
CONFIG_FEC_MPC52xx=m
CONFIG_GIANFAR=m
CONFIG_PCMCIA_FMVJ18X=m

1
arch/powerpc/configs/skiroot_defconfig
View file

@ -160,7 +160,6 @@ CONFIG_MLX5_CORE_EN=y
# CONFIG_NET_VENDOR_MICROSEMI is not set
CONFIG_MYRI10GE=m
# CONFIG_NET_VENDOR_NATSEMI is not set
CONFIG_S2IO=m
# CONFIG_NET_VENDOR_NETRONOME is not set
# CONFIG_NET_VENDOR_NI is not set
# CONFIG_NET_VENDOR_NVIDIA is not set

1
arch/s390/configs/debug_defconfig
View file

@ -561,7 +561,6 @@ CONFIG_MLX5_SF=y
# CONFIG_NET_VENDOR_MYRI is not set
# CONFIG_NET_VENDOR_NI is not set
# CONFIG_NET_VENDOR_NATSEMI is not set
# CONFIG_NET_VENDOR_NETERION is not set
# CONFIG_NET_VENDOR_NETRONOME is not set
# CONFIG_NET_VENDOR_NVIDIA is not set
# CONFIG_NET_VENDOR_OKI is not set

1
arch/s390/configs/defconfig
View file

@ -551,7 +551,6 @@ CONFIG_MLX5_SF=y
# CONFIG_NET_VENDOR_MYRI is not set
# CONFIG_NET_VENDOR_NI is not set
# CONFIG_NET_VENDOR_NATSEMI is not set
# CONFIG_NET_VENDOR_NETERION is not set
# CONFIG_NET_VENDOR_NETRONOME is not set
# CONFIG_NET_VENDOR_NVIDIA is not set
# CONFIG_NET_VENDOR_OKI is not set

4
drivers/atm/idt77252.c
View file

@ -1844,7 +1844,6 @@ add_rx_skb(struct idt77252_dev *card, int queue,
{
struct sk_buff *skb;
dma_addr_t paddr;
u32 handle;
while (count--) {
skb = dev_alloc_skb(size);
@ -1876,8 +1875,7 @@ outunmap:
skb_end_pointer(skb) - skb->data, DMA_FROM_DEVICE);
outpoolrm:
handle = IDT77252_PRV_POOL(skb);
card->sbpool[POOL_QUEUE(handle)].skb[POOL_INDEX(handle)] = NULL;
sb_pool_remove(card, skb);
outfree:
dev_kfree_skb(skb);

3
drivers/bluetooth/btintel_pcie.c
View file

@ -1190,8 +1190,7 @@ static int btintel_pcie_recv_frame(struct btintel_pcie_data *data,
skb = NULL; /* skb is freed in the callee */
exit_error:
if (skb)
kfree_skb(skb);
kfree_skb(skb);
if (ret)
hdev->stat.err_rx++;

8
drivers/bluetooth/btmtksdio.c
View file

@ -1472,7 +1472,6 @@ static void btmtksdio_remove(struct sdio_func *func)
hci_free_dev(hdev);
}
#ifdef CONFIG_PM
static int btmtksdio_runtime_suspend(struct device *dev)
{
struct sdio_func *func = dev_to_sdio_func(dev);
@ -1542,18 +1541,13 @@ static const struct dev_pm_ops btmtksdio_pm_ops = {
RUNTIME_PM_OPS(btmtksdio_runtime_suspend, btmtksdio_runtime_resume, NULL)
};
#define BTMTKSDIO_PM_OPS (&btmtksdio_pm_ops)
#else /* CONFIG_PM */
#define BTMTKSDIO_PM_OPS NULL
#endif /* CONFIG_PM */
static struct sdio_driver btmtksdio_driver = {
.name = "btmtksdio",
.probe = btmtksdio_probe,
.remove = btmtksdio_remove,
.id_table = btmtksdio_table,
.drv = {
.pm = BTMTKSDIO_PM_OPS,
.pm = pm_ptr(&btmtksdio_pm_ops),
}
};

6
drivers/bluetooth/btnxpuart.c
View file

@ -1947,8 +1947,7 @@ static void nxp_serdev_remove(struct serdev_device *serdev)
hci_free_dev(hdev);
}
#ifdef CONFIG_PM_SLEEP
static int nxp_serdev_suspend(struct device *dev)
static int __maybe_unused nxp_serdev_suspend(struct device *dev)
{
struct btnxpuart_dev *nxpdev = dev_get_drvdata(dev);
struct ps_data *psdata = &nxpdev->psdata;
@ -1962,7 +1961,7 @@ static int nxp_serdev_suspend(struct device *dev)
return 0;
}
static int nxp_serdev_resume(struct device *dev)
static int __maybe_unused nxp_serdev_resume(struct device *dev)
{
struct btnxpuart_dev *nxpdev = dev_get_drvdata(dev);
struct ps_data *psdata = &nxpdev->psdata;
@ -1975,7 +1974,6 @@ static int nxp_serdev_resume(struct device *dev)
ps_control(psdata->hdev, PS_STATE_AWAKE);
return 0;
}
#endif
#ifdef CONFIG_DEV_COREDUMP
static void nxp_serdev_coredump(struct device *dev)

58
drivers/bluetooth/btqca.c
View file

@ -581,28 +581,11 @@ static int qca_download_firmware(struct hci_dev *hdev,
ret = request_firmware(&fw, config->fwname, &hdev->dev);
if (ret) {
/* For WCN6750, if mbn file is not present then check for
* tlv file.
*/
if (soc_type == QCA_WCN6750 && config->type == ELF_TYPE_PATCH) {
bt_dev_dbg(hdev, "QCA Failed to request file: %s (%d)",
config->fwname, ret);
config->type = TLV_TYPE_PATCH;
snprintf(config->fwname, sizeof(config->fwname),
"qca/msbtfw%02x.tlv", rom_ver);
bt_dev_info(hdev, "QCA Downloading %s", config->fwname);
ret = request_firmware(&fw, config->fwname, &hdev->dev);
if (ret) {
bt_dev_err(hdev, "QCA Failed to request file: %s (%d)",
config->fwname, ret);
return ret;
}
}
/* If the board-specific file is missing, try loading the default
* one, unless that was attempted already.
*/
else if (config->type == TLV_TYPE_NVM &&
qca_get_alt_nvm_file(config->fwname, sizeof(config->fwname))) {
if (config->type == TLV_TYPE_NVM &&
qca_get_alt_nvm_file(config->fwname, sizeof(config->fwname))) {
bt_dev_info(hdev, "QCA Downloading %s", config->fwname);
ret = request_firmware(&fw, config->fwname, &hdev->dev);
if (ret) {
@ -847,8 +830,12 @@ int qca_uart_setup(struct hci_dev *hdev, uint8_t baudrate,
"qca/msbtfw%02x.mbn", rom_ver);
break;
case QCA_WCN6855:
/* Due to historical reasons, WCN685x chip has been using firmware
* without the "wcn" prefix. The mapping between the chip and its
* corresponding firmware has now been corrected.
*/
snprintf(config.fwname, sizeof(config.fwname),
"qca/hpbtfw%02x.tlv", rom_ver);
"qca/wcnhpbtfw%02x.tlv", rom_ver);
break;
case QCA_WCN7850:
snprintf(config.fwname, sizeof(config.fwname),
@ -861,8 +848,26 @@ int qca_uart_setup(struct hci_dev *hdev, uint8_t baudrate,
}
err = qca_download_firmware(hdev, &config, soc_type, rom_ver);
/* For WCN6750, if mbn file is not present then check for
* tlv file.
*/
if (err < 0 && soc_type == QCA_WCN6750) {
bt_dev_dbg(hdev, "QCA Failed to request file: %s (%d)",
config.fwname, err);
config.type = TLV_TYPE_PATCH;
snprintf(config.fwname, sizeof(config.fwname),
"qca/msbtfw%02x.tlv", rom_ver);
bt_dev_info(hdev, "QCA Downloading %s", config.fwname);
err = qca_download_firmware(hdev, &config, soc_type, rom_ver);
} else if (err < 0 && !rampatch_name && soc_type == QCA_WCN6855) {
snprintf(config.fwname, sizeof(config.fwname),
"qca/hpbtfw%02x.tlv", rom_ver);
err = qca_download_firmware(hdev, &config, soc_type, rom_ver);
}
if (err < 0) {
bt_dev_err(hdev, "QCA Failed to download patch (%d)", err);
bt_dev_err(hdev, "QCA Failed to request file: %s (%d)",
config.fwname, err);
return err;
}
@ -923,7 +928,7 @@ int qca_uart_setup(struct hci_dev *hdev, uint8_t baudrate,
case QCA_WCN6855:
qca_read_fw_board_id(hdev, &boardid);
qca_get_nvm_name_by_board(config.fwname, sizeof(config.fwname),
"hpnv", soc_type, ver, rom_ver, boardid);
"wcnhpnv", soc_type, ver, rom_ver, boardid);
break;
case QCA_WCN7850:
qca_get_nvm_name_by_board(config.fwname, sizeof(config.fwname),
@ -936,8 +941,15 @@ int qca_uart_setup(struct hci_dev *hdev, uint8_t baudrate,
}
err = qca_download_firmware(hdev, &config, soc_type, rom_ver);
if (err < 0 && !firmware_name && soc_type == QCA_WCN6855) {
qca_get_nvm_name_by_board(config.fwname, sizeof(config.fwname),
"hpnv", soc_type, ver, rom_ver, boardid);
err = qca_download_firmware(hdev, &config, soc_type, rom_ver);
}
if (err < 0) {
bt_dev_err(hdev, "QCA Failed to download NVM (%d)", err);
bt_dev_err(hdev, "QCA Failed to request file: %s (%d)",
config.fwname, err);
return err;
}

26
drivers/bluetooth/btusb.c
View file

@ -521,12 +521,16 @@ static const struct usb_device_id quirks_table[] = {
{ USB_DEVICE(0x0bda, 0xb850), .driver_info = BTUSB_REALTEK },
{ USB_DEVICE(0x13d3, 0x3600), .driver_info = BTUSB_REALTEK },
{ USB_DEVICE(0x13d3, 0x3601), .driver_info = BTUSB_REALTEK },
{ USB_DEVICE(0x0489, 0xe112), .driver_info = BTUSB_REALTEK |
BTUSB_WIDEBAND_SPEECH },
/* Realtek 8851BU Bluetooth devices */
{ USB_DEVICE(0x3625, 0x010b), .driver_info = BTUSB_REALTEK |
BTUSB_WIDEBAND_SPEECH },
{ USB_DEVICE(0x2001, 0x332a), .driver_info = BTUSB_REALTEK |
BTUSB_WIDEBAND_SPEECH },
{ USB_DEVICE(0x7392, 0xe611), .driver_info = BTUSB_REALTEK |
BTUSB_WIDEBAND_SPEECH },
/* Realtek 8852AE Bluetooth devices */
{ USB_DEVICE(0x0bda, 0x2852), .driver_info = BTUSB_REALTEK |
@ -557,6 +561,8 @@ static const struct usb_device_id quirks_table[] = {
BTUSB_WIDEBAND_SPEECH },
{ USB_DEVICE(0x13d3, 0x3592), .driver_info = BTUSB_REALTEK |
BTUSB_WIDEBAND_SPEECH },
{ USB_DEVICE(0x13d3, 0x3612), .driver_info = BTUSB_REALTEK |
BTUSB_WIDEBAND_SPEECH },
{ USB_DEVICE(0x0489, 0xe122), .driver_info = BTUSB_REALTEK |
BTUSB_WIDEBAND_SPEECH },
@ -577,8 +583,6 @@ static const struct usb_device_id quirks_table[] = {
BTUSB_WIDEBAND_SPEECH },
{ USB_DEVICE(0x13d3, 0x3591), .driver_info = BTUSB_REALTEK |
BTUSB_WIDEBAND_SPEECH },
{ USB_DEVICE(0x13d3, 0x3618), .driver_info = BTUSB_REALTEK |
BTUSB_WIDEBAND_SPEECH },
{ USB_DEVICE(0x0489, 0xe123), .driver_info = BTUSB_REALTEK |
BTUSB_WIDEBAND_SPEECH },
{ USB_DEVICE(0x0489, 0xe125), .driver_info = BTUSB_REALTEK |
@ -637,6 +641,8 @@ static const struct usb_device_id quirks_table[] = {
BTUSB_WIDEBAND_SPEECH },
{ USB_DEVICE(0x13d3, 0x3622), .driver_info = BTUSB_MEDIATEK |
BTUSB_WIDEBAND_SPEECH },
{ USB_DEVICE(0x0489, 0xe158), .driver_info = BTUSB_MEDIATEK |
BTUSB_WIDEBAND_SPEECH },
/* Additional MediaTek MT7921 Bluetooth devices */
{ USB_DEVICE(0x0489, 0xe0c8), .driver_info = BTUSB_MEDIATEK |
@ -773,6 +779,7 @@ static const struct usb_device_id quirks_table[] = {
/* Additional Realtek 8723BU Bluetooth devices */
{ USB_DEVICE(0x7392, 0xa611), .driver_info = BTUSB_REALTEK },
{ USB_DEVICE(0x2c0a, 0x8761), .driver_info = BTUSB_REALTEK },
/* Additional Realtek 8723DE Bluetooth devices */
{ USB_DEVICE(0x0bda, 0xb009), .driver_info = BTUSB_REALTEK },
@ -4462,17 +4469,17 @@ static void btusb_disconnect(struct usb_interface *intf)
kfree(data);
}
#ifdef CONFIG_PM
static int btusb_suspend(struct usb_interface *intf, pm_message_t message)
{
struct btusb_data *data = usb_get_intfdata(intf);
BT_DBG("intf %p", intf);
/* Don't auto-suspend if there are connections; external suspend calls
* shall never fail.
/* Don't auto-suspend if there are connections or discovery in
* progress; external suspend calls shall never fail.
*/
if (PMSG_IS_AUTO(message) && hci_conn_count(data->hdev))
if (PMSG_IS_AUTO(message) &&
(hci_conn_count(data->hdev) || hci_discovery_active(data->hdev)))
return -EBUSY;
if (data->suspend_count++)
@ -4616,7 +4623,6 @@ done:
return err;
}
#endif
#ifdef CONFIG_DEV_COREDUMP
static void btusb_coredump(struct device *dev)
@ -4633,10 +4639,8 @@ static struct usb_driver btusb_driver = {
.name = "btusb",
.probe = btusb_probe,
.disconnect = btusb_disconnect,
#ifdef CONFIG_PM
.suspend = btusb_suspend,
.resume = btusb_resume,
#endif
.suspend = pm_ptr(btusb_suspend),
.resume = pm_ptr(btusb_resume),
.id_table = btusb_table,
.supports_autosuspend = 1,
.disable_hub_initiated_lpm = 1,

11
drivers/bluetooth/hci_bcm4377.c
View file

@ -2416,8 +2416,9 @@ static int bcm4377_probe(struct pci_dev *pdev, const struct pci_device_id *id)
hdev);
}
static int bcm4377_suspend(struct pci_dev *pdev, pm_message_t state)
static int bcm4377_suspend(struct device *dev)
{
struct pci_dev *pdev = to_pci_dev(dev);
struct bcm4377_data *bcm4377 = pci_get_drvdata(pdev);
int ret;
@ -2431,8 +2432,9 @@ static int bcm4377_suspend(struct pci_dev *pdev, pm_message_t state)
return 0;
}
static int bcm4377_resume(struct pci_dev *pdev)
static int bcm4377_resume(struct device *dev)
{
struct pci_dev *pdev = to_pci_dev(dev);
struct bcm4377_data *bcm4377 = pci_get_drvdata(pdev);
iowrite32(BCM4377_BAR0_SLEEP_CONTROL_UNQUIESCE,
@ -2441,6 +2443,8 @@ static int bcm4377_resume(struct pci_dev *pdev)
return hci_resume_dev(bcm4377->hdev);
}
static DEFINE_SIMPLE_DEV_PM_OPS(bcm4377_ops, bcm4377_suspend, bcm4377_resume);
static const struct dmi_system_id bcm4377_dmi_board_table[] = {
{
.matches = {
@ -2541,8 +2545,7 @@ static struct pci_driver bcm4377_pci_driver = {
.name = "hci_bcm4377",
.id_table = bcm4377_devid_table,
.probe = bcm4377_probe,
.suspend = bcm4377_suspend,
.resume = bcm4377_resume,
.driver.pm = &bcm4377_ops,
};
module_pci_driver(bcm4377_pci_driver);

10
drivers/bluetooth/hci_intel.c
View file

@ -126,7 +126,6 @@ static int intel_wait_booting(struct hci_uart *hu)
return err;
}
#ifdef CONFIG_PM
static int intel_wait_lpm_transaction(struct hci_uart *hu)
{
struct intel_data *intel = hu->priv;
@ -237,7 +236,6 @@ static int intel_lpm_resume(struct hci_uart *hu)
return 0;
}
#endif /* CONFIG_PM */
static int intel_lpm_host_wake(struct hci_uart *hu)
{
@ -1066,7 +1064,6 @@ static const struct acpi_device_id intel_acpi_match[] = {
MODULE_DEVICE_TABLE(acpi, intel_acpi_match);
#endif
#ifdef CONFIG_PM
static int intel_suspend_device(struct device *dev)
{
struct intel_device *idev = dev_get_drvdata(dev);
@ -1090,10 +1087,8 @@ static int intel_resume_device(struct device *dev)
return 0;
}
#endif
#ifdef CONFIG_PM_SLEEP
static int intel_suspend(struct device *dev)
static int __maybe_unused intel_suspend(struct device *dev)
{
struct intel_device *idev = dev_get_drvdata(dev);
@ -1103,7 +1098,7 @@ static int intel_suspend(struct device *dev)
return intel_suspend_device(dev);
}
static int intel_resume(struct device *dev)
static int __maybe_unused intel_resume(struct device *dev)
{
struct intel_device *idev = dev_get_drvdata(dev);
@ -1112,7 +1107,6 @@ static int intel_resume(struct device *dev)
return intel_resume_device(dev);
}
#endif
static const struct dev_pm_ops intel_pm_ops = {
SET_SYSTEM_SLEEP_PM_OPS(intel_suspend, intel_resume)

52
drivers/bluetooth/hci_qca.c
View file

@ -87,6 +87,7 @@ enum qca_flags {
enum qca_capabilities {
QCA_CAP_WIDEBAND_SPEECH = BIT(0),
QCA_CAP_VALID_LE_STATES = BIT(1),
QCA_CAP_HFP_HW_OFFLOAD = BIT(2),
};
/* HCI_IBS transmit side sleep protocol states */
@ -229,6 +230,7 @@ struct qca_serdev {
u32 init_speed;
u32 oper_speed;
bool bdaddr_property_broken;
bool support_hfp_hw_offload;
const char *firmware_name[2];
};
@ -1653,6 +1655,39 @@ static void qca_hw_error(struct hci_dev *hdev, u8 code)
skb_queue_purge(&qca->rx_memdump_q);
}
/*
* If the BT chip's bt_en pin is connected to a 3.3V power supply via
* hardware and always stays high, driver cannot control the bt_en pin.
* As a result, during SSR (SubSystem Restart), QCA_SSR_TRIGGERED and
* QCA_IBS_DISABLED flags cannot be cleared, which leads to a reset
* command timeout.
* Add an msleep delay to ensure controller completes the SSR process.
*
* Host will not download the firmware after SSR, controller to remain
* in the IBS_WAKE state, and the host needs to synchronize with it
*
* Since the bluetooth chip has been reset, clear the memdump state.
*/
if (!hci_test_quirk(hu->hdev, HCI_QUIRK_NON_PERSISTENT_SETUP)) {
/*
* When the SSR (SubSystem Restart) duration exceeds 2 seconds,
* it triggers host tx_idle_delay, which sets host TX state
* to sleep. Reset tx_idle_timer after SSR to prevent
* host enter TX IBS_Sleep mode.
*/
mod_timer(&qca->tx_idle_timer, jiffies +
msecs_to_jiffies(qca->tx_idle_delay));
/* Controller reset completion time is 50ms */
msleep(50);
clear_bit(QCA_SSR_TRIGGERED, &qca->flags);
clear_bit(QCA_IBS_DISABLED, &qca->flags);
qca->tx_ibs_state = HCI_IBS_TX_AWAKE;
qca->memdump_state = QCA_MEMDUMP_IDLE;
}
clear_bit(QCA_HW_ERROR_EVENT, &qca->flags);
}
@ -1879,7 +1914,7 @@ static int qca_setup(struct hci_uart *hu)
const char *rampatch_name = qca_get_rampatch_name(hu);
int ret;
struct qca_btsoc_version ver;
struct qca_serdev *qcadev;
struct qca_serdev *qcadev = serdev_device_get_drvdata(hu->serdev);
const char *soc_name;
ret = qca_check_speeds(hu);
@ -1943,7 +1978,6 @@ retry:
case QCA_WCN6750:
case QCA_WCN6855:
case QCA_WCN7850:
qcadev = serdev_device_get_drvdata(hu->serdev);
if (qcadev->bdaddr_property_broken)
hci_set_quirk(hdev, HCI_QUIRK_BDADDR_PROPERTY_BROKEN);
@ -2033,7 +2067,7 @@ out:
else
hu->hdev->set_bdaddr = qca_set_bdaddr;
if (soc_type == QCA_QCA2066)
if (qcadev->support_hfp_hw_offload)
qca_configure_hfp_offload(hdev);
qca->fw_version = le16_to_cpu(ver.patch_ver);
@ -2117,7 +2151,8 @@ static const struct qca_device_data qca_soc_data_wcn3998 __maybe_unused = {
static const struct qca_device_data qca_soc_data_qca2066 __maybe_unused = {
.soc_type = QCA_QCA2066,
.num_vregs = 0,
.capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES,
.capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES |
QCA_CAP_HFP_HW_OFFLOAD,
};
static const struct qca_device_data qca_soc_data_qca6390 __maybe_unused = {
@ -2153,7 +2188,8 @@ static const struct qca_device_data qca_soc_data_wcn6855 __maybe_unused = {
{ "vddrfa1p2", 257000 },
},
.num_vregs = 6,
.capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES,
.capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES |
QCA_CAP_HFP_HW_OFFLOAD,
};
static const struct qca_device_data qca_soc_data_wcn7850 __maybe_unused = {
@ -2167,7 +2203,8 @@ static const struct qca_device_data qca_soc_data_wcn7850 __maybe_unused = {
{ "vddrfa1p9", 302000 },
},
.num_vregs = 6,
.capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES,
.capabilities = QCA_CAP_WIDEBAND_SPEECH | QCA_CAP_VALID_LE_STATES |
QCA_CAP_HFP_HW_OFFLOAD,
};
static void qca_power_shutdown(struct hci_uart *hu)
@ -2502,6 +2539,9 @@ static int qca_serdev_probe(struct serdev_device *serdev)
if (!(data->capabilities & QCA_CAP_VALID_LE_STATES))
hci_set_quirk(hdev, HCI_QUIRK_BROKEN_LE_STATES);
if (data->capabilities & QCA_CAP_HFP_HW_OFFLOAD)
qcadev->support_hfp_hw_offload = true;
}
return 0;

50
drivers/clk/clk-devres.c
View file

@ -179,6 +179,56 @@ int __must_check devm_clk_bulk_get_optional(struct device *dev, int num_clks,
}
EXPORT_SYMBOL_GPL(devm_clk_bulk_get_optional);
static void devm_clk_bulk_release_enable(struct device *dev, void *res)
{
struct clk_bulk_devres *devres = res;
clk_bulk_disable_unprepare(devres->num_clks, devres->clks);
clk_bulk_put(devres->num_clks, devres->clks);
}
static int __devm_clk_bulk_get_enable(struct device *dev, int num_clks,
struct clk_bulk_data *clks, bool optional)
{
struct clk_bulk_devres *devres;
int ret;
devres = devres_alloc(devm_clk_bulk_release_enable,
sizeof(*devres), GFP_KERNEL);
if (!devres)
return -ENOMEM;
if (optional)
ret = clk_bulk_get_optional(dev, num_clks, clks);
else
ret = clk_bulk_get(dev, num_clks, clks);
if (ret)
goto err_clk_get;
ret = clk_bulk_prepare_enable(num_clks, clks);
if (ret)
goto err_clk_prepare;
devres->clks = clks;
devres->num_clks = num_clks;
devres_add(dev, devres);
return 0;
err_clk_prepare:
clk_bulk_put(num_clks, clks);
err_clk_get:
devres_free(devres);
return ret;
}
int __must_check devm_clk_bulk_get_optional_enable(struct device *dev, int num_clks,
struct clk_bulk_data *clks)
{
return __devm_clk_bulk_get_enable(dev, num_clks, clks, true);
}
EXPORT_SYMBOL_GPL(devm_clk_bulk_get_optional_enable);
static void devm_clk_bulk_release_all(struct device *dev, void *res)
{
struct clk_bulk_devres *devres = res;

15
drivers/dpll/Kconfig
View file

@ -8,6 +8,21 @@ menu "DPLL device support"
config DPLL
bool
config DPLL_REFCNT_TRACKER
bool "DPLL reference count tracking"
depends on DEBUG_KERNEL && STACKTRACE_SUPPORT && DPLL
select REF_TRACKER
help
Enable reference count tracking for DPLL devices and pins.
This helps debugging reference leaks and use-after-free bugs
by recording stack traces for each get/put operation.
The tracking information is exposed via debugfs at:
/sys/kernel/debug/ref_tracker/dpll_device_*
/sys/kernel/debug/ref_tracker/dpll_pin_*
If unsure, say N.
source "drivers/dpll/zl3073x/Kconfig"
endmenu

288
drivers/dpll/dpll_core.c
View file

@ -10,6 +10,8 @@
#include <linux/device.h>
#include <linux/err.h>
#include <linux/idr.h>
#include <linux/property.h>
#include <linux/slab.h>
#include <linux/string.h>
@ -22,6 +24,9 @@ DEFINE_MUTEX(dpll_lock);
DEFINE_XARRAY_FLAGS(dpll_device_xa, XA_FLAGS_ALLOC);
DEFINE_XARRAY_FLAGS(dpll_pin_xa, XA_FLAGS_ALLOC);
static RAW_NOTIFIER_HEAD(dpll_notifier_chain);
static DEFINE_IDA(dpll_pin_idx_ida);
static u32 dpll_device_xa_id;
static u32 dpll_pin_xa_id;
@ -36,6 +41,7 @@ struct dpll_device_registration {
struct list_head list;
const struct dpll_device_ops *ops;
void *priv;
dpll_tracker tracker;
};
struct dpll_pin_registration {
@ -43,8 +49,117 @@ struct dpll_pin_registration {
const struct dpll_pin_ops *ops;
void *priv;
void *cookie;
dpll_tracker tracker;
};
static int call_dpll_notifiers(unsigned long action, void *info)
{
lockdep_assert_held(&dpll_lock);
return raw_notifier_call_chain(&dpll_notifier_chain, action, info);
}
void dpll_device_notify(struct dpll_device *dpll, unsigned long action)
{
struct dpll_device_notifier_info info = {
.dpll = dpll,
.id = dpll->id,
.idx = dpll->device_idx,
.clock_id = dpll->clock_id,
.type = dpll->type,
};
call_dpll_notifiers(action, &info);
}
void dpll_pin_notify(struct dpll_pin *pin, unsigned long action)
{
struct dpll_pin_notifier_info info = {
.pin = pin,
.id = pin->id,
.idx = pin->pin_idx,
.clock_id = pin->clock_id,
.fwnode = pin->fwnode,
.prop = &pin->prop,
};
call_dpll_notifiers(action, &info);
}
static void dpll_device_tracker_alloc(struct dpll_device *dpll,
dpll_tracker *tracker)
{
#ifdef CONFIG_DPLL_REFCNT_TRACKER
ref_tracker_alloc(&dpll->refcnt_tracker, tracker, GFP_KERNEL);
#endif
}
static void dpll_device_tracker_free(struct dpll_device *dpll,
dpll_tracker *tracker)
{
#ifdef CONFIG_DPLL_REFCNT_TRACKER
ref_tracker_free(&dpll->refcnt_tracker, tracker);
#endif
}
static void __dpll_device_hold(struct dpll_device *dpll, dpll_tracker *tracker)
{
dpll_device_tracker_alloc(dpll, tracker);
refcount_inc(&dpll->refcount);
}
static void __dpll_device_put(struct dpll_device *dpll, dpll_tracker *tracker)
{
dpll_device_tracker_free(dpll, tracker);
if (refcount_dec_and_test(&dpll->refcount)) {
ASSERT_DPLL_NOT_REGISTERED(dpll);
WARN_ON_ONCE(!xa_empty(&dpll->pin_refs));
xa_destroy(&dpll->pin_refs);
xa_erase(&dpll_device_xa, dpll->id);
WARN_ON(!list_empty(&dpll->registration_list));
ref_tracker_dir_exit(&dpll->refcnt_tracker);
kfree(dpll);
}
}
static void dpll_pin_tracker_alloc(struct dpll_pin *pin, dpll_tracker *tracker)
{
#ifdef CONFIG_DPLL_REFCNT_TRACKER
ref_tracker_alloc(&pin->refcnt_tracker, tracker, GFP_KERNEL);
#endif
}
static void dpll_pin_tracker_free(struct dpll_pin *pin, dpll_tracker *tracker)
{
#ifdef CONFIG_DPLL_REFCNT_TRACKER
ref_tracker_free(&pin->refcnt_tracker, tracker);
#endif
}
static void __dpll_pin_hold(struct dpll_pin *pin, dpll_tracker *tracker)
{
dpll_pin_tracker_alloc(pin, tracker);
refcount_inc(&pin->refcount);
}
static void dpll_pin_idx_free(u32 pin_idx);
static void dpll_pin_prop_free(struct dpll_pin_properties *prop);
static void __dpll_pin_put(struct dpll_pin *pin, dpll_tracker *tracker)
{
dpll_pin_tracker_free(pin, tracker);
if (refcount_dec_and_test(&pin->refcount)) {
xa_erase(&dpll_pin_xa, pin->id);
xa_destroy(&pin->dpll_refs);
xa_destroy(&pin->parent_refs);
xa_destroy(&pin->ref_sync_pins);
dpll_pin_prop_free(&pin->prop);
fwnode_handle_put(pin->fwnode);
dpll_pin_idx_free(pin->pin_idx);
ref_tracker_dir_exit(&pin->refcnt_tracker);
kfree_rcu(pin, rcu);
}
}
struct dpll_device *dpll_device_get_by_id(int id)
{
if (xa_get_mark(&dpll_device_xa, id, DPLL_REGISTERED))
@ -114,6 +229,7 @@ dpll_xa_ref_pin_add(struct xarray *xa_pins, struct dpll_pin *pin,
reg->ops = ops;
reg->priv = priv;
reg->cookie = cookie;
__dpll_pin_hold(pin, &reg->tracker);
if (ref_exists)
refcount_inc(&ref->refcount);
list_add_tail(&reg->list, &ref->registration_list);
@ -136,6 +252,7 @@ static int dpll_xa_ref_pin_del(struct xarray *xa_pins, struct dpll_pin *pin,
if (WARN_ON(!reg))
return -EINVAL;
list_del(&reg->list);
__dpll_pin_put(pin, &reg->tracker);
kfree(reg);
if (refcount_dec_and_test(&ref->refcount)) {
xa_erase(xa_pins, i);
@ -193,6 +310,7 @@ dpll_xa_ref_dpll_add(struct xarray *xa_dplls, struct dpll_device *dpll,
reg->ops = ops;
reg->priv = priv;
reg->cookie = cookie;
__dpll_device_hold(dpll, &reg->tracker);
if (ref_exists)
refcount_inc(&ref->refcount);
list_add_tail(&reg->list, &ref->registration_list);
@ -215,6 +333,7 @@ dpll_xa_ref_dpll_del(struct xarray *xa_dplls, struct dpll_device *dpll,
if (WARN_ON(!reg))
return;
list_del(&reg->list);
__dpll_device_put(dpll, &reg->tracker);
kfree(reg);
if (refcount_dec_and_test(&ref->refcount)) {
xa_erase(xa_dplls, i);
@ -256,6 +375,7 @@ dpll_device_alloc(const u64 clock_id, u32 device_idx, struct module *module)
return ERR_PTR(ret);
}
xa_init_flags(&dpll->pin_refs, XA_FLAGS_ALLOC);
ref_tracker_dir_init(&dpll->refcnt_tracker, 128, "dpll_device");
return dpll;
}
@ -265,6 +385,7 @@ dpll_device_alloc(const u64 clock_id, u32 device_idx, struct module *module)
* @clock_id: clock_id of creator
* @device_idx: idx given by device driver
* @module: reference to registering module
* @tracker: tracking object for the acquired reference
*
* Get existing object of a dpll device, unique for given arguments.
* Create new if doesn't exist yet.
@ -275,7 +396,8 @@ dpll_device_alloc(const u64 clock_id, u32 device_idx, struct module *module)
* * ERR_PTR(X) - error
*/
struct dpll_device *
dpll_device_get(u64 clock_id, u32 device_idx, struct module *module)
dpll_device_get(u64 clock_id, u32 device_idx, struct module *module,
dpll_tracker *tracker)
{
struct dpll_device *dpll, *ret = NULL;
unsigned long index;
@ -285,13 +407,17 @@ dpll_device_get(u64 clock_id, u32 device_idx, struct module *module)
if (dpll->clock_id == clock_id &&
dpll->device_idx == device_idx &&
dpll->module == module) {
__dpll_device_hold(dpll, tracker);
ret = dpll;
refcount_inc(&ret->refcount);
break;
}
}
if (!ret)
if (!ret) {
ret = dpll_device_alloc(clock_id, device_idx, module);
if (!IS_ERR(ret))
dpll_device_tracker_alloc(ret, tracker);
}
mutex_unlock(&dpll_lock);
return ret;
@ -301,22 +427,16 @@ EXPORT_SYMBOL_GPL(dpll_device_get);
/**
* dpll_device_put - decrease the refcount and free memory if possible
* @dpll: dpll_device struct pointer
* @tracker: tracking object for the acquired reference
*
* Context: Acquires a lock (dpll_lock)
* Drop reference for a dpll device, if all references are gone, delete
* dpll device object.
*/
void dpll_device_put(struct dpll_device *dpll)
void dpll_device_put(struct dpll_device *dpll, dpll_tracker *tracker)
{
mutex_lock(&dpll_lock);
if (refcount_dec_and_test(&dpll->refcount)) {
ASSERT_DPLL_NOT_REGISTERED(dpll);
WARN_ON_ONCE(!xa_empty(&dpll->pin_refs));
xa_destroy(&dpll->pin_refs);
xa_erase(&dpll_device_xa, dpll->id);
WARN_ON(!list_empty(&dpll->registration_list));
kfree(dpll);
}
__dpll_device_put(dpll, tracker);
mutex_unlock(&dpll_lock);
}
EXPORT_SYMBOL_GPL(dpll_device_put);
@ -378,6 +498,7 @@ int dpll_device_register(struct dpll_device *dpll, enum dpll_type type,
reg->ops = ops;
reg->priv = priv;
dpll->type = type;
__dpll_device_hold(dpll, &reg->tracker);
first_registration = list_empty(&dpll->registration_list);
list_add_tail(&reg->list, &dpll->registration_list);
if (!first_registration) {
@ -417,6 +538,7 @@ void dpll_device_unregister(struct dpll_device *dpll,
return;
}
list_del(&reg->list);
__dpll_device_put(dpll, &reg->tracker);
kfree(reg);
if (!list_empty(&dpll->registration_list)) {
@ -428,6 +550,36 @@ void dpll_device_unregister(struct dpll_device *dpll,
}
EXPORT_SYMBOL_GPL(dpll_device_unregister);
static int dpll_pin_idx_alloc(u32 *pin_idx)
{
int ret;
if (!pin_idx)
return -EINVAL;
/* Alloc unique number from IDA. Number belongs to <0, INT_MAX> range */
ret = ida_alloc(&dpll_pin_idx_ida, GFP_KERNEL);
if (ret < 0)
return ret;
/* Map the value to dynamic pin index range <INT_MAX+1, U32_MAX> */
*pin_idx = (u32)ret + INT_MAX + 1;
return 0;
}
static void dpll_pin_idx_free(u32 pin_idx)
{
if (pin_idx <= INT_MAX)
return; /* Not a dynamic pin index */
/* Map the index value from dynamic pin index range to IDA range and
* free it.
*/
pin_idx -= (u32)INT_MAX + 1;
ida_free(&dpll_pin_idx_ida, pin_idx);
}
static void dpll_pin_prop_free(struct dpll_pin_properties *prop)
{
kfree(prop->package_label);
@ -485,9 +637,18 @@ dpll_pin_alloc(u64 clock_id, u32 pin_idx, struct module *module,
struct dpll_pin *pin;
int ret;
if (pin_idx == DPLL_PIN_IDX_UNSPEC) {
ret = dpll_pin_idx_alloc(&pin_idx);
if (ret)
return ERR_PTR(ret);
} else if (pin_idx > INT_MAX) {
return ERR_PTR(-EINVAL);
}
pin = kzalloc(sizeof(*pin), GFP_KERNEL);
if (!pin)
return ERR_PTR(-ENOMEM);
if (!pin) {
ret = -ENOMEM;
goto err_pin_alloc;
}
pin->pin_idx = pin_idx;
pin->clock_id = clock_id;
pin->module = module;
@ -507,6 +668,7 @@ dpll_pin_alloc(u64 clock_id, u32 pin_idx, struct module *module,
&dpll_pin_xa_id, GFP_KERNEL);
if (ret < 0)
goto err_xa_alloc;
ref_tracker_dir_init(&pin->refcnt_tracker, 128, "dpll_pin");
return pin;
err_xa_alloc:
xa_destroy(&pin->dpll_refs);
@ -515,6 +677,8 @@ err_xa_alloc:
dpll_pin_prop_free(&pin->prop);
err_pin_prop:
kfree(pin);
err_pin_alloc:
dpll_pin_idx_free(pin_idx);
return ERR_PTR(ret);
}
@ -538,12 +702,35 @@ void dpll_netdev_pin_clear(struct net_device *dev)
}
EXPORT_SYMBOL(dpll_netdev_pin_clear);
int register_dpll_notifier(struct notifier_block *nb)
{
int ret;
mutex_lock(&dpll_lock);
ret = raw_notifier_chain_register(&dpll_notifier_chain, nb);
mutex_unlock(&dpll_lock);
return ret;
}
EXPORT_SYMBOL_GPL(register_dpll_notifier);
int unregister_dpll_notifier(struct notifier_block *nb)
{
int ret;
mutex_lock(&dpll_lock);
ret = raw_notifier_chain_unregister(&dpll_notifier_chain, nb);
mutex_unlock(&dpll_lock);
return ret;
}
EXPORT_SYMBOL_GPL(unregister_dpll_notifier);
/**
* dpll_pin_get - find existing or create new dpll pin
* @clock_id: clock_id of creator
* @pin_idx: idx given by dev driver
* @module: reference to registering module
* @prop: dpll pin properties
* @tracker: tracking object for the acquired reference
*
* Get existing object of a pin (unique for given arguments) or create new
* if doesn't exist yet.
@ -555,7 +742,7 @@ EXPORT_SYMBOL(dpll_netdev_pin_clear);
*/
struct dpll_pin *
dpll_pin_get(u64 clock_id, u32 pin_idx, struct module *module,
const struct dpll_pin_properties *prop)
const struct dpll_pin_properties *prop, dpll_tracker *tracker)
{
struct dpll_pin *pos, *ret = NULL;
unsigned long i;
@ -565,13 +752,16 @@ dpll_pin_get(u64 clock_id, u32 pin_idx, struct module *module,
if (pos->clock_id == clock_id &&
pos->pin_idx == pin_idx &&
pos->module == module) {
__dpll_pin_hold(pos, tracker);
ret = pos;
refcount_inc(&ret->refcount);
break;
}
}
if (!ret)
if (!ret) {
ret = dpll_pin_alloc(clock_id, pin_idx, module, prop);
if (!IS_ERR(ret))
dpll_pin_tracker_alloc(ret, tracker);
}
mutex_unlock(&dpll_lock);
return ret;
@ -581,26 +771,69 @@ EXPORT_SYMBOL_GPL(dpll_pin_get);
/**
* dpll_pin_put - decrease the refcount and free memory if possible
* @pin: pointer to a pin to be put
* @tracker: tracking object for the acquired reference
*
* Drop reference for a pin, if all references are gone, delete pin object.
*
* Context: Acquires a lock (dpll_lock)
*/
void dpll_pin_put(struct dpll_pin *pin)
void dpll_pin_put(struct dpll_pin *pin, dpll_tracker *tracker)
{
mutex_lock(&dpll_lock);
if (refcount_dec_and_test(&pin->refcount)) {
xa_erase(&dpll_pin_xa, pin->id);
xa_destroy(&pin->dpll_refs);
xa_destroy(&pin->parent_refs);
xa_destroy(&pin->ref_sync_pins);
dpll_pin_prop_free(&pin->prop);
kfree_rcu(pin, rcu);
}
__dpll_pin_put(pin, tracker);
mutex_unlock(&dpll_lock);
}
EXPORT_SYMBOL_GPL(dpll_pin_put);
/**
* dpll_pin_fwnode_set - set dpll pin firmware node reference
* @pin: pointer to a dpll pin
* @fwnode: firmware node handle
*
* Set firmware node handle for the given dpll pin.
*/
void dpll_pin_fwnode_set(struct dpll_pin *pin, struct fwnode_handle *fwnode)
{
mutex_lock(&dpll_lock);
fwnode_handle_put(pin->fwnode); /* Drop fwnode previously set */
pin->fwnode = fwnode_handle_get(fwnode);
mutex_unlock(&dpll_lock);
}
EXPORT_SYMBOL_GPL(dpll_pin_fwnode_set);
/**
* fwnode_dpll_pin_find - find dpll pin by firmware node reference
* @fwnode: reference to firmware node
* @tracker: tracking object for the acquired reference
*
* Get existing object of a pin that is associated with given firmware node
* reference.
*
* Context: Acquires a lock (dpll_lock)
* Return:
* * valid dpll_pin pointer on success
* * NULL when no such pin exists
*/
struct dpll_pin *fwnode_dpll_pin_find(struct fwnode_handle *fwnode,
dpll_tracker *tracker)
{
struct dpll_pin *pin, *ret = NULL;
unsigned long index;
mutex_lock(&dpll_lock);
xa_for_each(&dpll_pin_xa, index, pin) {
if (pin->fwnode == fwnode) {
__dpll_pin_hold(pin, tracker);
ret = pin;
break;
}
}
mutex_unlock(&dpll_lock);
return ret;
}
EXPORT_SYMBOL_GPL(fwnode_dpll_pin_find);
static int
__dpll_pin_register(struct dpll_device *dpll, struct dpll_pin *pin,
const struct dpll_pin_ops *ops, void *priv, void *cookie)
@ -743,7 +976,6 @@ int dpll_pin_on_pin_register(struct dpll_pin *parent, struct dpll_pin *pin,
ret = dpll_xa_ref_pin_add(&pin->parent_refs, parent, ops, priv, pin);
if (ret)
goto unlock;
refcount_inc(&pin->refcount);
xa_for_each(&parent->dpll_refs, i, ref) {
ret = __dpll_pin_register(ref->dpll, pin, ops, priv, parent);
if (ret) {
@ -763,7 +995,6 @@ dpll_unregister:
parent);
dpll_pin_delete_ntf(pin);
}
refcount_dec(&pin->refcount);
dpll_xa_ref_pin_del(&pin->parent_refs, parent, ops, priv, pin);
unlock:
mutex_unlock(&dpll_lock);
@ -790,7 +1021,6 @@ void dpll_pin_on_pin_unregister(struct dpll_pin *parent, struct dpll_pin *pin,
mutex_lock(&dpll_lock);
dpll_pin_delete_ntf(pin);
dpll_xa_ref_pin_del(&pin->parent_refs, parent, ops, priv, pin);
refcount_dec(&pin->refcount);
xa_for_each(&pin->dpll_refs, i, ref)
__dpll_pin_unregister(ref->dpll, pin, ops, priv, parent);
mutex_unlock(&dpll_lock);

11
drivers/dpll/dpll_core.h
View file

@ -10,6 +10,7 @@
#include <linux/dpll.h>
#include <linux/list.h>
#include <linux/refcount.h>
#include <linux/ref_tracker.h>
#include "dpll_nl.h"
#define DPLL_REGISTERED XA_MARK_1
@ -23,6 +24,7 @@
* @type: type of a dpll
* @pin_refs: stores pins registered within a dpll
* @refcount: refcount
* @refcnt_tracker: ref_tracker directory for debugging reference leaks
* @registration_list: list of registered ops and priv data of dpll owners
**/
struct dpll_device {
@ -33,6 +35,7 @@ struct dpll_device {
enum dpll_type type;
struct xarray pin_refs;
refcount_t refcount;
struct ref_tracker_dir refcnt_tracker;
struct list_head registration_list;
};
@ -42,11 +45,13 @@ struct dpll_device {
* @pin_idx: index of a pin given by dev driver
* @clock_id: clock_id of creator
* @module: module of creator
* @fwnode: optional reference to firmware node
* @dpll_refs: hold referencees to dplls pin was registered with
* @parent_refs: hold references to parent pins pin was registered with
* @ref_sync_pins: hold references to pins for Reference SYNC feature
* @prop: pin properties copied from the registerer
* @refcount: refcount
* @refcnt_tracker: ref_tracker directory for debugging reference leaks
* @rcu: rcu_head for kfree_rcu()
**/
struct dpll_pin {
@ -54,11 +59,13 @@ struct dpll_pin {
u32 pin_idx;
u64 clock_id;
struct module *module;
struct fwnode_handle *fwnode;
struct xarray dpll_refs;
struct xarray parent_refs;
struct xarray ref_sync_pins;
struct dpll_pin_properties prop;
refcount_t refcount;
struct ref_tracker_dir refcnt_tracker;
struct rcu_head rcu;
};
@ -89,4 +96,8 @@ struct dpll_pin_ref *dpll_xa_ref_dpll_first(struct xarray *xa_refs);
extern struct xarray dpll_device_xa;
extern struct xarray dpll_pin_xa;
extern struct mutex dpll_lock;
void dpll_device_notify(struct dpll_device *dpll, unsigned long action);
void dpll_pin_notify(struct dpll_pin *pin, unsigned long action);
#endif

87
drivers/dpll/dpll_netlink.c
View file

@ -128,18 +128,29 @@ dpll_msg_add_mode_supported(struct sk_buff *msg, struct dpll_device *dpll,
struct netlink_ext_ack *extack)
{
const struct dpll_device_ops *ops = dpll_device_ops(dpll);
DECLARE_BITMAP(modes, DPLL_MODE_MAX + 1) = { 0 };
enum dpll_mode mode;
int ret;
/* No mode change is supported now, so the only supported mode is the
* one obtained by mode_get().
*/
if (ops->supported_modes_get) {
ret = ops->supported_modes_get(dpll, dpll_priv(dpll), modes,
extack);
if (ret)
return ret;
} else {
/* If the supported modes are not reported by the driver, the
* only supported mode is the one obtained by mode_get().
*/
ret = ops->mode_get(dpll, dpll_priv(dpll), &mode, extack);
if (ret)
return ret;
ret = ops->mode_get(dpll, dpll_priv(dpll), &mode, extack);
if (ret)
return ret;
if (nla_put_u32(msg, DPLL_A_MODE_SUPPORTED, mode))
return -EMSGSIZE;
__set_bit(mode, modes);
}
for_each_set_bit(mode, modes, DPLL_MODE_MAX + 1)
if (nla_put_u32(msg, DPLL_A_MODE_SUPPORTED, mode))
return -EMSGSIZE;
return 0;
}
@ -378,7 +389,15 @@ static int dpll_msg_add_ffo(struct sk_buff *msg, struct dpll_pin *pin,
return 0;
return ret;
}
return nla_put_sint(msg, DPLL_A_PIN_FRACTIONAL_FREQUENCY_OFFSET, ffo);
/* Put the FFO value in PPM to preserve compatibility with older
* programs.
*/
ret = nla_put_sint(msg, DPLL_A_PIN_FRACTIONAL_FREQUENCY_OFFSET,
div_s64(ffo, 1000000));
if (ret)
return -EMSGSIZE;
return nla_put_sint(msg, DPLL_A_PIN_FRACTIONAL_FREQUENCY_OFFSET_PPT,
ffo);
}
static int
@ -742,17 +761,20 @@ err_free_msg:
int dpll_device_create_ntf(struct dpll_device *dpll)
{
dpll_device_notify(dpll, DPLL_DEVICE_CREATED);
return dpll_device_event_send(DPLL_CMD_DEVICE_CREATE_NTF, dpll);
}
int dpll_device_delete_ntf(struct dpll_device *dpll)
{
dpll_device_notify(dpll, DPLL_DEVICE_DELETED);
return dpll_device_event_send(DPLL_CMD_DEVICE_DELETE_NTF, dpll);
}
static int
__dpll_device_change_ntf(struct dpll_device *dpll)
{
dpll_device_notify(dpll, DPLL_DEVICE_CHANGED);
return dpll_device_event_send(DPLL_CMD_DEVICE_CHANGE_NTF, dpll);
}
@ -810,16 +832,19 @@ err_free_msg:
int dpll_pin_create_ntf(struct dpll_pin *pin)
{
dpll_pin_notify(pin, DPLL_PIN_CREATED);
return dpll_pin_event_send(DPLL_CMD_PIN_CREATE_NTF, pin);
}
int dpll_pin_delete_ntf(struct dpll_pin *pin)
{
dpll_pin_notify(pin, DPLL_PIN_DELETED);
return dpll_pin_event_send(DPLL_CMD_PIN_DELETE_NTF, pin);
}
int __dpll_pin_change_ntf(struct dpll_pin *pin)
{
dpll_pin_notify(pin, DPLL_PIN_CHANGED);
return dpll_pin_event_send(DPLL_CMD_PIN_CHANGE_NTF, pin);
}
@ -842,6 +867,45 @@ int dpll_pin_change_ntf(struct dpll_pin *pin)
}
EXPORT_SYMBOL_GPL(dpll_pin_change_ntf);
static int
dpll_mode_set(struct dpll_device *dpll, struct nlattr *a,
struct netlink_ext_ack *extack)
{
const struct dpll_device_ops *ops = dpll_device_ops(dpll);
DECLARE_BITMAP(modes, DPLL_MODE_MAX + 1) = { 0 };
enum dpll_mode mode = nla_get_u32(a), old_mode;
int ret;
if (!(ops->mode_set && ops->supported_modes_get)) {
NL_SET_ERR_MSG_ATTR(extack, a,
"dpll device does not support mode switch");
return -EOPNOTSUPP;
}
ret = ops->mode_get(dpll, dpll_priv(dpll), &old_mode, extack);
if (ret) {
NL_SET_ERR_MSG(extack, "unable to get current mode");
return ret;
}
if (mode == old_mode)
return 0;
ret = ops->supported_modes_get(dpll, dpll_priv(dpll), modes, extack);
if (ret) {
NL_SET_ERR_MSG(extack, "unable to get supported modes");
return ret;
}
if (!test_bit(mode, modes)) {
NL_SET_ERR_MSG(extack,
"dpll device does not support requested mode");
return -EINVAL;
}
return ops->mode_set(dpll, dpll_priv(dpll), mode, extack);
}
static int
dpll_phase_offset_monitor_set(struct dpll_device *dpll, struct nlattr *a,
struct netlink_ext_ack *extack)
@ -1797,6 +1861,11 @@ dpll_set_from_nlattr(struct dpll_device *dpll, struct genl_info *info)
nla_for_each_attr(a, genlmsg_data(info->genlhdr),
genlmsg_len(info->genlhdr), rem) {
switch (nla_type(a)) {
case DPLL_A_MODE:
ret = dpll_mode_set(dpll, a, info->extack);
if (ret)
return ret;
break;
case DPLL_A_PHASE_OFFSET_MONITOR:
ret = dpll_phase_offset_monitor_set(dpll, a,
info->extack);

1
drivers/dpll/dpll_nl.c
View file

@ -45,6 +45,7 @@ static const struct nla_policy dpll_device_get_nl_policy[DPLL_A_ID + 1] = {
/* DPLL_CMD_DEVICE_SET - do */
static const struct nla_policy dpll_device_set_nl_policy[DPLL_A_PHASE_OFFSET_AVG_FACTOR + 1] = {
[DPLL_A_ID] = { .type = NLA_U32, },
[DPLL_A_MODE] = NLA_POLICY_RANGE(NLA_U32, 1, 2),
[DPLL_A_PHASE_OFFSET_MONITOR] = NLA_POLICY_MAX(NLA_U32, 1),
[DPLL_A_PHASE_OFFSET_AVG_FACTOR] = { .type = NLA_U32, },
};

7
drivers/dpll/zl3073x/core.c
View file

@ -710,8 +710,11 @@ zl3073x_ref_ffo_update(struct zl3073x_dev *zldev)
if (rc)
return rc;
/* Convert to ppm -> ffo = (10^6 * value) / 2^32 */
zldev->ref[i].ffo = mul_s64_u64_shr(value, 1000000, 32);
/* Convert to ppt
* ffo = (10^12 * value) / 2^32
* ffo = ( 5^12 * value) / 2^20
*/
zldev->ref[i].ffo = mul_s64_u64_shr(value, 244140625, 20);
}
return 0;

30
drivers/dpll/zl3073x/core.h
View file

@ -301,6 +301,36 @@ u8 zl3073x_dev_out_dpll_get(struct zl3073x_dev *zldev, u8 index)
return zl3073x_synth_dpll_get(synth);
}
/**
* zl3073x_dev_output_pin_freq_get - get output pin frequency
* @zldev: pointer to zl3073x device
* @id: output pin id
*
* Computes the output pin frequency based on the synth frequency, output
* divisor, and signal format. For N-div formats, N-pin frequency is
* additionally divided by esync_n_period.
*
* Return: frequency of the given output pin in Hz
*/
static inline u32
zl3073x_dev_output_pin_freq_get(struct zl3073x_dev *zldev, u8 id)
{
const struct zl3073x_synth *synth;
const struct zl3073x_out *out;
u8 out_id;
u32 freq;
out_id = zl3073x_output_pin_out_get(id);
out = zl3073x_out_state_get(zldev, out_id);
synth = zl3073x_synth_state_get(zldev, zl3073x_out_synth_get(out));
freq = zl3073x_synth_freq_get(synth) / out->div;
if (zl3073x_out_is_ndiv(out) && zl3073x_is_n_pin(id))
freq /= out->esync_n_period;
return freq;
}
/**
* zl3073x_dev_out_is_diff - check if the given output is differential
* @zldev: pointer to zl3073x device

178
drivers/dpll/zl3073x/dpll.c
View file

@ -29,6 +29,7 @@
* @list: this DPLL pin list entry
* @dpll: DPLL the pin is registered to
* @dpll_pin: pointer to registered dpll_pin
* @tracker: tracking object for the acquired reference
* @label: package label
* @dir: pin direction
* @id: pin id
@ -44,6 +45,7 @@ struct zl3073x_dpll_pin {
struct list_head list;
struct zl3073x_dpll *dpll;
struct dpll_pin *dpll_pin;
dpll_tracker tracker;
char label[8];
enum dpll_pin_direction dir;
u8 id;
@ -100,6 +102,20 @@ zl3073x_dpll_pin_direction_get(const struct dpll_pin *dpll_pin, void *pin_priv,
return 0;
}
static struct zl3073x_dpll_pin *
zl3073x_dpll_pin_get_by_ref(struct zl3073x_dpll *zldpll, u8 ref_id)
{
struct zl3073x_dpll_pin *pin;
list_for_each_entry(pin, &zldpll->pins, list) {
if (zl3073x_dpll_is_input_pin(pin) &&
zl3073x_input_pin_ref_get(pin->id) == ref_id)
return pin;
}
return NULL;
}
static int
zl3073x_dpll_input_pin_esync_get(const struct dpll_pin *dpll_pin,
void *pin_priv,
@ -900,46 +916,9 @@ zl3073x_dpll_output_pin_frequency_get(const struct dpll_pin *dpll_pin,
struct netlink_ext_ack *extack)
{
struct zl3073x_dpll *zldpll = dpll_priv;
struct zl3073x_dev *zldev = zldpll->dev;
struct zl3073x_dpll_pin *pin = pin_priv;
const struct zl3073x_synth *synth;
const struct zl3073x_out *out;
u32 synth_freq;
u8 out_id;
out_id = zl3073x_output_pin_out_get(pin->id);
out = zl3073x_out_state_get(zldev, out_id);
/* Get attached synth frequency */
synth = zl3073x_synth_state_get(zldev, zl3073x_out_synth_get(out));
synth_freq = zl3073x_synth_freq_get(synth);
switch (zl3073x_out_signal_format_get(out)) {
case ZL_OUTPUT_MODE_SIGNAL_FORMAT_2_NDIV:
case ZL_OUTPUT_MODE_SIGNAL_FORMAT_2_NDIV_INV:
/* In case of divided format we have to distiguish between
* given output pin type.
*
* For P-pin the resulting frequency is computed as simple
* division of synth frequency and output divisor.
*
* For N-pin we have to divide additionally by divisor stored
* in esync_n_period output mailbox register that is used as
* N-pin divisor for these modes.
*/
*frequency = synth_freq / out->div;
if (!zl3073x_dpll_is_p_pin(pin))
*frequency = (u32)*frequency / out->esync_n_period;
break;
default:
/* In other modes the resulting frequency is computed as
* division of synth frequency and output divisor.
*/
*frequency = synth_freq / out->div;
break;
}
*frequency = zl3073x_dev_output_pin_freq_get(zldpll->dev, pin->id);
return 0;
}
@ -1039,10 +1018,8 @@ zl3073x_dpll_output_pin_phase_adjust_get(const struct dpll_pin *dpll_pin,
out_id = zl3073x_output_pin_out_get(pin->id);
out = zl3073x_out_state_get(zldev, out_id);
/* Convert value to ps and reverse two's complement negation applied
* during 'set'
*/
*phase_adjust = -out->phase_comp * pin->phase_gran;
/* The value in the register is expressed in half synth clock cycles. */
*phase_adjust = out->phase_comp * pin->phase_gran;
return 0;
}
@ -1064,10 +1041,8 @@ zl3073x_dpll_output_pin_phase_adjust_set(const struct dpll_pin *dpll_pin,
out_id = zl3073x_output_pin_out_get(pin->id);
out = *zl3073x_out_state_get(zldev, out_id);
/* The value in the register is stored as two's complement negation
* of requested value and expressed in half synth clock cycles.
*/
out.phase_comp = -phase_adjust / pin->phase_gran;
/* The value in the register is expressed in half synth clock cycles. */
out.phase_comp = phase_adjust / pin->phase_gran;
/* Update output configuration from mailbox */
return zl3073x_out_state_set(zldev, out_id, &out);
@ -1137,6 +1112,26 @@ zl3073x_dpll_lock_status_get(const struct dpll_device *dpll, void *dpll_priv,
return 0;
}
static int
zl3073x_dpll_supported_modes_get(const struct dpll_device *dpll,
void *dpll_priv, unsigned long *modes,
struct netlink_ext_ack *extack)
{
struct zl3073x_dpll *zldpll = dpll_priv;
/* We support switching between automatic and manual mode, except in
* a case where the DPLL channel is configured to run in NCO mode.
* In this case, report only the manual mode to which the NCO is mapped
* as the only supported one.
*/
if (zldpll->refsel_mode != ZL_DPLL_MODE_REFSEL_MODE_NCO)
__set_bit(DPLL_MODE_AUTOMATIC, modes);
__set_bit(DPLL_MODE_MANUAL, modes);
return 0;
}
static int
zl3073x_dpll_mode_get(const struct dpll_device *dpll, void *dpll_priv,
enum dpll_mode *mode, struct netlink_ext_ack *extack)
@ -1217,6 +1212,82 @@ zl3073x_dpll_phase_offset_avg_factor_set(const struct dpll_device *dpll,
return 0;
}
static int
zl3073x_dpll_mode_set(const struct dpll_device *dpll, void *dpll_priv,
enum dpll_mode mode, struct netlink_ext_ack *extack)
{
struct zl3073x_dpll *zldpll = dpll_priv;
u8 hw_mode, mode_refsel, ref;
int rc;
rc = zl3073x_dpll_selected_ref_get(zldpll, &ref);
if (rc) {
NL_SET_ERR_MSG_MOD(extack, "failed to get selected reference");
return rc;
}
if (mode == DPLL_MODE_MANUAL) {
/* We are switching from automatic to manual mode:
* - if we have a valid reference selected during auto mode then
* we will switch to forced reference lock mode and use this
* reference for selection
* - if NO valid reference is selected, we will switch to forced
* holdover mode or freerun mode, depending on the current
* lock status
*/
if (ZL3073X_DPLL_REF_IS_VALID(ref))
hw_mode = ZL_DPLL_MODE_REFSEL_MODE_REFLOCK;
else if (zldpll->lock_status == DPLL_LOCK_STATUS_UNLOCKED)
hw_mode = ZL_DPLL_MODE_REFSEL_MODE_FREERUN;
else
hw_mode = ZL_DPLL_MODE_REFSEL_MODE_HOLDOVER;
} else {
/* We are switching from manual to automatic mode:
* - if there is a valid reference selected then ensure that
* it is selectable after switch to automatic mode
* - switch to automatic mode
*/
struct zl3073x_dpll_pin *pin;
pin = zl3073x_dpll_pin_get_by_ref(zldpll, ref);
if (pin && !pin->selectable) {
/* Restore pin priority in HW */
rc = zl3073x_dpll_ref_prio_set(pin, pin->prio);
if (rc) {
NL_SET_ERR_MSG_MOD(extack,
"failed to restore pin priority");
return rc;
}
pin->selectable = true;
}
hw_mode = ZL_DPLL_MODE_REFSEL_MODE_AUTO;
}
/* Build mode_refsel value */
mode_refsel = FIELD_PREP(ZL_DPLL_MODE_REFSEL_MODE, hw_mode);
if (ZL3073X_DPLL_REF_IS_VALID(ref))
mode_refsel |= FIELD_PREP(ZL_DPLL_MODE_REFSEL_REF, ref);
/* Update dpll_mode_refsel register */
rc = zl3073x_write_u8(zldpll->dev, ZL_REG_DPLL_MODE_REFSEL(zldpll->id),
mode_refsel);
if (rc) {
NL_SET_ERR_MSG_MOD(extack,
"failed to set reference selection mode");
return rc;
}
zldpll->refsel_mode = hw_mode;
if (ZL3073X_DPLL_REF_IS_VALID(ref))
zldpll->forced_ref = ref;
return 0;
}
static int
zl3073x_dpll_phase_offset_monitor_get(const struct dpll_device *dpll,
void *dpll_priv,
@ -1276,10 +1347,12 @@ static const struct dpll_pin_ops zl3073x_dpll_output_pin_ops = {
static const struct dpll_device_ops zl3073x_dpll_device_ops = {
.lock_status_get = zl3073x_dpll_lock_status_get,
.mode_get = zl3073x_dpll_mode_get,
.mode_set = zl3073x_dpll_mode_set,
.phase_offset_avg_factor_get = zl3073x_dpll_phase_offset_avg_factor_get,
.phase_offset_avg_factor_set = zl3073x_dpll_phase_offset_avg_factor_set,
.phase_offset_monitor_get = zl3073x_dpll_phase_offset_monitor_get,
.phase_offset_monitor_set = zl3073x_dpll_phase_offset_monitor_set,
.supported_modes_get = zl3073x_dpll_supported_modes_get,
};
/**
@ -1368,11 +1441,12 @@ zl3073x_dpll_pin_register(struct zl3073x_dpll_pin *pin, u32 index)
/* Create or get existing DPLL pin */
pin->dpll_pin = dpll_pin_get(zldpll->dev->clock_id, index, THIS_MODULE,
&props->dpll_props);
&props->dpll_props, &pin->tracker);
if (IS_ERR(pin->dpll_pin)) {
rc = PTR_ERR(pin->dpll_pin);
goto err_pin_get;
}
dpll_pin_fwnode_set(pin->dpll_pin, props->fwnode);
if (zl3073x_dpll_is_input_pin(pin))
ops = &zl3073x_dpll_input_pin_ops;
@ -1390,7 +1464,7 @@ zl3073x_dpll_pin_register(struct zl3073x_dpll_pin *pin, u32 index)
return 0;
err_register:
dpll_pin_put(pin->dpll_pin);
dpll_pin_put(pin->dpll_pin, &pin->tracker);
err_prio_get:
pin->dpll_pin = NULL;
err_pin_get:
@ -1421,7 +1495,7 @@ zl3073x_dpll_pin_unregister(struct zl3073x_dpll_pin *pin)
/* Unregister the pin */
dpll_pin_unregister(zldpll->dpll_dev, pin->dpll_pin, ops, pin);
dpll_pin_put(pin->dpll_pin);
dpll_pin_put(pin->dpll_pin, &pin->tracker);
pin->dpll_pin = NULL;
}
@ -1595,7 +1669,7 @@ zl3073x_dpll_device_register(struct zl3073x_dpll *zldpll)
dpll_mode_refsel);
zldpll->dpll_dev = dpll_device_get(zldev->clock_id, zldpll->id,
THIS_MODULE);
THIS_MODULE, &zldpll->tracker);
if (IS_ERR(zldpll->dpll_dev)) {
rc = PTR_ERR(zldpll->dpll_dev);
zldpll->dpll_dev = NULL;
@ -1607,7 +1681,7 @@ zl3073x_dpll_device_register(struct zl3073x_dpll *zldpll)
zl3073x_prop_dpll_type_get(zldev, zldpll->id),
&zl3073x_dpll_device_ops, zldpll);
if (rc) {
dpll_device_put(zldpll->dpll_dev);
dpll_device_put(zldpll->dpll_dev, &zldpll->tracker);
zldpll->dpll_dev = NULL;
}
@ -1630,7 +1704,7 @@ zl3073x_dpll_device_unregister(struct zl3073x_dpll *zldpll)
dpll_device_unregister(zldpll->dpll_dev, &zl3073x_dpll_device_ops,
zldpll);
dpll_device_put(zldpll->dpll_dev);
dpll_device_put(zldpll->dpll_dev, &zldpll->tracker);
zldpll->dpll_dev = NULL;
}

2
drivers/dpll/zl3073x/dpll.h
View file

@ -18,6 +18,7 @@
* @check_count: periodic check counter
* @phase_monitor: is phase offset monitor enabled
* @dpll_dev: pointer to registered DPLL device
* @tracker: tracking object for the acquired reference
* @lock_status: last saved DPLL lock status
* @pins: list of pins
* @change_work: device change notification work
@ -31,6 +32,7 @@ struct zl3073x_dpll {
u8 check_count;
bool phase_monitor;
struct dpll_device *dpll_dev;
dpll_tracker tracker;
enum dpll_lock_status lock_status;
struct list_head pins;
struct work_struct change_work;

17
drivers/dpll/zl3073x/out.h
View file

@ -79,6 +79,23 @@ static inline bool zl3073x_out_is_enabled(const struct zl3073x_out *out)
return !!FIELD_GET(ZL_OUTPUT_CTRL_EN, out->ctrl);
}
/**
* zl3073x_out_is_ndiv - check if the given output is in N-div mode
* @out: pointer to out state
*
* Return: true if output is in N-div mode, false otherwise
*/
static inline bool zl3073x_out_is_ndiv(const struct zl3073x_out *out)
{
switch (zl3073x_out_signal_format_get(out)) {
case ZL_OUTPUT_MODE_SIGNAL_FORMAT_2_NDIV:
case ZL_OUTPUT_MODE_SIGNAL_FORMAT_2_NDIV_INV:
return true;
default:
return false;
}
}
/**
* zl3073x_out_synth_get - get synth connected to given output
* @out: pointer to out state

34
drivers/dpll/zl3073x/prop.c
View file

@ -193,9 +193,10 @@ struct zl3073x_pin_props *zl3073x_pin_props_get(struct zl3073x_dev *zldev,
{
struct dpll_pin_frequency *ranges;
struct zl3073x_pin_props *props;
int i, j, num_freqs, rc;
int i, j, num_freqs = 0, rc;
u64 *freqs = NULL;
const char *type;
u64 *freqs;
u32 curr_freq;
props = kzalloc(sizeof(*props), GFP_KERNEL);
if (!props)
@ -207,6 +208,7 @@ struct zl3073x_pin_props *zl3073x_pin_props_get(struct zl3073x_dev *zldev,
props->dpll_props.capabilities =
DPLL_PIN_CAPABILITIES_PRIORITY_CAN_CHANGE |
DPLL_PIN_CAPABILITIES_STATE_CAN_CHANGE;
curr_freq = zl3073x_dev_ref_freq_get(zldev, index);
} else {
u8 out, synth;
u32 f;
@ -220,6 +222,7 @@ struct zl3073x_pin_props *zl3073x_pin_props_get(struct zl3073x_dev *zldev,
synth = zl3073x_dev_out_synth_get(zldev, out);
f = 2 * zl3073x_dev_synth_freq_get(zldev, synth);
props->dpll_props.phase_gran = f ? div_u64(PSEC_PER_SEC, f) : 1;
curr_freq = zl3073x_dev_output_pin_freq_get(zldev, index);
}
props->dpll_props.phase_range.min = S32_MIN;
@ -230,7 +233,7 @@ struct zl3073x_pin_props *zl3073x_pin_props_get(struct zl3073x_dev *zldev,
/* Get firmware node for the given pin */
rc = zl3073x_prop_pin_fwnode_get(zldev, props, dir, index);
if (rc)
return props; /* Return if it does not exist */
goto skip_fwnode_props;
/* Look for label property and store the value as board label */
fwnode_property_read_string(props->fwnode, "label",
@ -249,6 +252,8 @@ struct zl3073x_pin_props *zl3073x_pin_props_get(struct zl3073x_dev *zldev,
props->dpll_props.type = DPLL_PIN_TYPE_INT_OSCILLATOR;
else if (!strcmp(type, "synce"))
props->dpll_props.type = DPLL_PIN_TYPE_SYNCE_ETH_PORT;
else if (!strcmp(type, "mux"))
props->dpll_props.type = DPLL_PIN_TYPE_MUX;
else
dev_warn(zldev->dev,
"Unknown or unsupported pin type '%s'\n",
@ -262,9 +267,10 @@ struct zl3073x_pin_props *zl3073x_pin_props_get(struct zl3073x_dev *zldev,
/* Read supported frequencies property if it is specified */
num_freqs = fwnode_property_count_u64(props->fwnode,
"supported-frequencies-hz");
if (num_freqs <= 0)
/* Return if the property does not exist or number is 0 */
return props;
if (num_freqs <= 0) {
num_freqs = 0;
goto skip_fwnode_props;
}
/* The firmware node specifies list of supported frequencies while
* DPLL core pin properties requires list of frequency ranges.
@ -281,19 +287,25 @@ struct zl3073x_pin_props *zl3073x_pin_props_get(struct zl3073x_dev *zldev,
"supported-frequencies-hz", freqs,
num_freqs);
/* Allocate frequency ranges list and fill it */
ranges = kcalloc(num_freqs, sizeof(*ranges), GFP_KERNEL);
skip_fwnode_props:
/* Allocate frequency ranges list - extra slot for current frequency */
ranges = kcalloc(num_freqs + 1, sizeof(*ranges), GFP_KERNEL);
if (!ranges) {
rc = -ENOMEM;
goto err_alloc_ranges;
}
/* Convert list of frequencies to list of frequency ranges but
* filter-out frequencies that are not representable by device
/* Start with current frequency at index 0 */
ranges[0] = (struct dpll_pin_frequency)DPLL_PIN_FREQUENCY(curr_freq);
/* Add frequencies from firmware node, skipping current frequency
* and filtering out frequencies not representable by device
*/
for (i = 0, j = 0; i < num_freqs; i++) {
for (i = 0, j = 1; i < num_freqs; i++) {
struct dpll_pin_frequency freq = DPLL_PIN_FREQUENCY(freqs[i]);
if (freqs[i] == curr_freq)
continue;
if (zl3073x_pin_check_freq(zldev, dir, index, freqs[i])) {
ranges[j] = freq;
j++;

2
drivers/infiniband/hw/bng_re/Makefile
View file

@ -1,5 +1,5 @@
# SPDX-License-Identifier: GPL-2.0
ccflags-y := -I $(srctree)/drivers/net/ethernet/broadcom/bnge -I $(srctree)/drivers/infiniband/hw/bnxt_re
ccflags-y := -I $(srctree)/drivers/net/ethernet/broadcom/bnge
obj-$(CONFIG_INFINIBAND_BNG_RE) += bng_re.o

2
drivers/infiniband/hw/bng_re/bng_fw.c
View file

@ -2,7 +2,7 @@
// Copyright (c) 2025 Broadcom.
#include <linux/pci.h>
#include "roce_hsi.h"
#include "bng_roce_hsi.h"
#include "bng_res.h"
#include "bng_fw.h"
#include "bng_sp.h"

4
drivers/infiniband/hw/bng_re/bng_res.c
View file

@ -5,9 +5,9 @@
#include <linux/vmalloc.h>
#include <rdma/ib_umem.h>
#include <linux/bnxt/hsi.h>
#include <linux/bnge/hsi.h>
#include "bng_res.h"
#include "roce_hsi.h"
#include "bng_roce_hsi.h"
/* Stats */
void bng_re_free_stats_ctx_mem(struct pci_dev *pdev,

2
drivers/infiniband/hw/bng_re/bng_res.h
View file

@ -4,7 +4,7 @@
#ifndef __BNG_RES_H__
#define __BNG_RES_H__
#include "roce_hsi.h"
#include "bng_roce_hsi.h"
#define BNG_ROCE_FW_MAX_TIMEOUT 60

6450
drivers/infiniband/hw/bng_re/bng_roce_hsi.h Normal file
View file

File diff suppressed because it is too large Load diff

2
drivers/infiniband/hw/bng_re/bng_tlv.h
View file

@ -3,7 +3,7 @@
#ifndef __BNG_TLV_H__
#define __BNG_TLV_H__
#include "roce_hsi.h"
#include "bng_roce_hsi.h"
struct roce_tlv {
struct tlv tlv;

4
drivers/infiniband/hw/bnxt_re/main.c
View file

@ -595,10 +595,10 @@ int bnxt_re_hwrm_cfg_vnic(struct bnxt_re_dev *rdev, u32 qp_id)
bnxt_re_init_hwrm_hdr((void *)&req, HWRM_VNIC_CFG);
req.flags = cpu_to_le32(VNIC_CFG_REQ_FLAGS_ROCE_ONLY_VNIC_MODE);
req.enables = cpu_to_le32(VNIC_CFG_REQ_ENABLES_RAW_QP_ID |
req.enables = cpu_to_le32(VNIC_CFG_REQ_ENABLES_QP_ID |
VNIC_CFG_REQ_ENABLES_MRU);
req.vnic_id = cpu_to_le16(rdev->mirror_vnic_id);
req.raw_qp_id = cpu_to_le32(qp_id);
req.qp_id = cpu_to_le32(qp_id);
req.mru = cpu_to_le16(rdev->netdev->mtu + VLAN_ETH_HLEN);
bnxt_re_fill_fw_msg(&fw_msg, (void *)&req, sizeof(req), NULL,

2
drivers/infiniband/hw/mlx5/main.c
View file

@ -511,7 +511,7 @@ static int translate_eth_ext_proto_oper(u32 eth_proto_oper, u16 *active_speed,
*active_width = IB_WIDTH_4X;
*active_speed = IB_SPEED_XDR;
break;
case MLX5E_PROT_MASK(MLX5E_1600TAUI_8_1600TBASE_CR8_KR8):
case MLX5E_PROT_MASK(MLX5E_1600GAUI_8_1600GBASE_CR8_KR8):
*active_width = IB_WIDTH_8X;
*active_speed = IB_SPEED_XDR;
break;

6
drivers/infiniband/ulp/ipoib/ipoib_main.c
View file

@ -1831,8 +1831,7 @@ static int ipoib_hwtstamp_get(struct net_device *dev,
struct ipoib_dev_priv *priv = ipoib_priv(dev);
if (!priv->rn_ops->ndo_hwtstamp_get)
/* legacy */
return dev_eth_ioctl(dev, config->ifr, SIOCGHWTSTAMP);
return -EOPNOTSUPP;
return priv->rn_ops->ndo_hwtstamp_get(dev, config);
}
@ -1844,8 +1843,7 @@ static int ipoib_hwtstamp_set(struct net_device *dev,
struct ipoib_dev_priv *priv = ipoib_priv(dev);
if (!priv->rn_ops->ndo_hwtstamp_set)
/* legacy */
return dev_eth_ioctl(dev, config->ifr, SIOCSHWTSTAMP);
return -EOPNOTSUPP;
return priv->rn_ops->ndo_hwtstamp_set(dev, config, extack);
}

25
drivers/mmc/core/sdio_bus.c
View file

@ -232,6 +232,15 @@ static void sdio_bus_remove(struct device *dev)
pm_runtime_put_sync(dev);
}
static void sdio_bus_shutdown(struct device *dev)
{
struct sdio_driver *drv = to_sdio_driver(dev->driver);
struct sdio_func *func = dev_to_sdio_func(dev);
if (dev->driver && drv->shutdown)
drv->shutdown(func);
}
static const struct dev_pm_ops sdio_bus_pm_ops = {
SET_SYSTEM_SLEEP_PM_OPS(pm_generic_suspend, pm_generic_resume)
SET_RUNTIME_PM_OPS(
@ -248,6 +257,7 @@ static const struct bus_type sdio_bus_type = {
.uevent = sdio_bus_uevent,
.probe = sdio_bus_probe,
.remove = sdio_bus_remove,
.shutdown = sdio_bus_shutdown,
.pm = &sdio_bus_pm_ops,
};
@ -261,6 +271,14 @@ void sdio_unregister_bus(void)
bus_unregister(&sdio_bus_type);
}
static void sdio_legacy_shutdown(struct sdio_func *func)
{
struct device *dev = &func->dev;
struct device_driver *driver = dev->driver;
driver->shutdown(dev);
}
/**
* __sdio_register_driver - register a function driver
* @drv: SDIO function driver
@ -272,6 +290,13 @@ int __sdio_register_driver(struct sdio_driver *drv, struct module *owner)
drv->drv.bus = &sdio_bus_type;
drv->drv.owner = owner;
/*
* This driver needs updating. Note that driver_register() warns about
* this, so we're not adding another warning here.
*/
if (!drv->shutdown && drv->drv.shutdown)
drv->shutdown = sdio_legacy_shutdown;
return driver_register(&drv->drv);
}
EXPORT_SYMBOL_GPL(__sdio_register_driver);

3
drivers/net/Kconfig
View file

@ -341,6 +341,7 @@ config NETCONSOLE_DYNAMIC
bool "Dynamic reconfiguration of logging targets"
depends on NETCONSOLE && SYSFS && CONFIGFS_FS && \
!(NETCONSOLE=y && CONFIGFS_FS=m)
select PRINTK_EXECUTION_CTX
help
This option enables the ability to dynamically reconfigure target
parameters (interface, IP addresses, port numbers, MAC addresses)
@ -516,8 +517,6 @@ source "drivers/net/ethernet/Kconfig"
source "drivers/net/fddi/Kconfig"
source "drivers/net/hippi/Kconfig"
source "drivers/net/ipa/Kconfig"
source "drivers/net/phy/Kconfig"

Some files were not shown because too many files have changed in this diff Show more