Eric Biggers 1cd5bb6e9e lib/crypto: riscv: Depend on RISCV_EFFICIENT_VECTOR_UNALIGNED_ACCESS ... Replace the RISCV_ISA_V dependency of the RISC-V crypto code with RISCV_EFFICIENT_VECTOR_UNALIGNED_ACCESS, which implies RISCV_ISA_V as well as vector unaligned accesses being efficient. This is necessary because this code assumes that vector unaligned accesses are supported and are efficient. (It does so to avoid having to use lots of extra vsetvli instructions to switch the element width back and forth between 8 and either 32 or 64.) This was omitted from the code originally just because the RISC-V kernel support for detecting this feature didn't exist yet. Support has now been added, but it's fragmented into per-CPU runtime detection, a command-line parameter, and a kconfig option. The kconfig option is the only reasonable way to do it, though, so let's just rely on that. Fixes: eb24af5d7a ("crypto: riscv - add vector crypto accelerated AES-{ECB,CBC,CTR,XTS}") Fixes: bb54668837 ("crypto: riscv - add vector crypto accelerated ChaCha20") Fixes: 600a3853df ("crypto: riscv - add vector crypto accelerated GHASH") Fixes: 8c8e40470f ("crypto: riscv - add vector crypto accelerated SHA-{256,224}") Fixes: b3415925a0 ("crypto: riscv - add vector crypto accelerated SHA-{512,384}") Fixes: 563a5255af ("crypto: riscv - add vector crypto accelerated SM3") Fixes: b8d06352bb ("crypto: riscv - add vector crypto accelerated SM4") Cc: stable@vger.kernel.org Reported-by: Vivian Wang <wangruikang@iscas.ac.cn> Closes: https://lore.kernel.org/r/b3cfcdac-0337-4db0-a611-258f2868855f@iscas.ac.cn/ Reviewed-by: Jerry Shih <jerry.shih@sifive.com> Link: https://lore.kernel.org/r/20251206213750.81474-1-ebiggers@kernel.org Signed-off-by: Eric Biggers <ebiggers@kernel.org>		2025-12-09 15:10:21 -08:00
..
aes-macros.S	crypto: riscv - add vector crypto accelerated AES-{ECB,CBC,CTR,XTS}	2024-01-22 17:55:18 -08:00
aes-riscv64-glue.c	crypto: riscv - add vector crypto accelerated AES-CBC-CTS	2024-03-20 08:56:11 -07:00
aes-riscv64-zvkned-zvbb-zvkg.S	crypto: riscv - add vector crypto accelerated AES-{ECB,CBC,CTR,XTS}	2024-01-22 17:55:18 -08:00
aes-riscv64-zvkned-zvkb.S	crypto: riscv - add vector crypto accelerated AES-{ECB,CBC,CTR,XTS}	2024-01-22 17:55:18 -08:00
aes-riscv64-zvkned.S	crypto: riscv - add vector crypto accelerated AES-CBC-CTS	2024-03-20 08:56:11 -07:00
ghash-riscv64-glue.c	crypto: riscv/ghash - Use API partial block handling	2025-04-23 11:33:47 +08:00
ghash-riscv64-zvkg.S	crypto: riscv - add vector crypto accelerated GHASH	2024-01-22 17:55:20 -08:00
Kconfig	lib/crypto: riscv: Depend on RISCV_EFFICIENT_VECTOR_UNALIGNED_ACCESS	2025-12-09 15:10:21 -08:00
Makefile	lib/crypto: riscv/sha512: Migrate optimized SHA-512 code to library	2025-06-30 09:26:19 -07:00
sm3-riscv64-glue.c	crypto: riscv/sm3 - Use API partial block handling	2025-04-23 15:52:47 +08:00
sm3-riscv64-zvksh-zvkb.S	crypto: riscv - Use SYM_FUNC_START for functions only called directly	2025-04-25 10:46:05 +08:00
sm4-riscv64-glue.c	crypto: riscv - add vector crypto accelerated SM4	2024-01-22 17:55:24 -08:00
sm4-riscv64-zvksed-zvkb.S	crypto: riscv - add vector crypto accelerated SM4	2024-01-22 17:55:24 -08:00