There are a handful of new SoCs this time, all of these are
more or less related to chips in a wider family:
- SpacemiT Key Stone K3 is an 8-core risc-v chip, and the first
widely available RVA23 implementation. Note that this is
entirely unrelated with the similarly named Texas Instruments
K3 chip family that follwed the TI Keystone2 SoC.
- The Realtek Kent family of SoCs contains three chip models
rtd1501s, rtd1861b and rtd1920s, and is related to their earlier
Set-top-box and NAS products such as rtd1619, but is built
on newer Arm Cortex-A78 cores.
- The Qualcomm Milos family includes the Snapdragon 7s Gen 3
(SM7635) mobile phone SoC built around Armv9 Kryo cores of the Arm
Cortex-A720 generation. This one is used in the Fairphone Gen 6
- Qualcomm Kaanapali is a new SoC based around eight high
performance Oryon CPU cores
- NXP i.MX8QP and i.MX952 are both feature reduced versions of
chips we already support, i.e. the i.MX8QM and i.MX952, with
fewer CPU cores and I/O interfaces.
As part of a cleanup, a number of SoC specific devicetree files got
removed because they did not have a single board using the .dtsi files
and they were never compile tested as a result: Samsung s3c6400,
ST spear320s, ST stm32mp21xc/stm32mp23xc/stm32mp25xc, Renesas
r8a779m0/r8a779m2/r8a779m4/r8a779m6/r8a779m7/r8a779m8/r8a779mb/
r9a07g044c1/r9a07g044l1/r9a07g054l1/r9a09g047e37, and TI am3703/am3715.
All of these could be restored easily if a new board gets merged.
Broadcom/Cavium/Marvell ThunderX2 gets removed along with its only
machine, as all remaining users are assumed to be using ACPI
based firmware.
A relatively small number of 43 boards get added this time, and
almost all of them for arm64. Aside from the reference boards for
the newly added SoCs, this includes:
- Three server boards use 32-bit ASpeed BMCs
- One more reference board for 32-bit Microchip LAN9668
- 64-bit Arm single-board computers based on Amlogic s905y4,
CIX sky1, NXP ls1028a/imx8mn/imx8mp/imx91/imx93/imx95,
Qualcomm qcs6490/qrb2210 and Rockchip rk3568/rk3588s
- Carrier board for SOMs using Intel agilex5, Marvell Armada 7020,
NXP iMX8QP, Mediatek mt8370/mt8390 and rockchip rk3588
- Two mobile phones using Snapdragon 845
- A gaming device and a NAS box, both based on Rockchips rk356x
On top of the newly added boards and SoCs, there is a lot of
background activity going into cleanups, in particular towards
getting a warning-free dtc build, and the usual work on adding
support for more hardware on the previously added machines.
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Merge tag 'soc-dt-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull SoC devicetree updates from Arnd Bergmann:
"There are a handful of new SoCs this time, all of these are more or
less related to chips in a wider family:
- SpacemiT Key Stone K3 is an 8-core risc-v chip, and the first
widely available RVA23 implementation. Note that this is entirely
unrelated with the similarly named Texas Instruments K3 chip family
that follwed the TI Keystone2 SoC.
- The Realtek Kent family of SoCs contains three chip models
rtd1501s, rtd1861b and rtd1920s, and is related to their earlier
Set-top-box and NAS products such as rtd1619, but is built on newer
Arm Cortex-A78 cores.
- The Qualcomm Milos family includes the Snapdragon 7s Gen 3 (SM7635)
mobile phone SoC built around Armv9 Kryo cores of the Arm
Cortex-A720 generation. This one is used in the Fairphone Gen 6
- Qualcomm Kaanapali is a new SoC based around eight high performance
Oryon CPU cores
- NXP i.MX8QP and i.MX952 are both feature reduced versions of chips
we already support, i.e. the i.MX8QM and i.MX952, with fewer CPU
cores and I/O interfaces.
As part of a cleanup, a number of SoC specific devicetree files got
removed because they did not have a single board using the .dtsi files
and they were never compile tested as a result: Samsung s3c6400, ST
spear320s, ST stm32mp21xc/stm32mp23xc/stm32mp25xc, Renesas
r8a779m0/r8a779m2/r8a779m4/r8a779m6/r8a779m7/r8a779m8/r8a779mb/
r9a07g044c1/r9a07g044l1/r9a07g054l1/r9a09g047e37, and TI
am3703/am3715. All of these could be restored easily if a new board
gets merged.
Broadcom/Cavium/Marvell ThunderX2 gets removed along with its only
machine, as all remaining users are assumed to be using ACPI based
firmware.
A relatively small number of 43 boards get added this time, and almost
all of them for arm64. Aside from the reference boards for the newly
added SoCs, this includes:
- Three server boards use 32-bit ASpeed BMCs
- One more reference board for 32-bit Microchip LAN9668
- 64-bit Arm single-board computers based on Amlogic s905y4, CIX
sky1, NXP ls1028a/imx8mn/imx8mp/imx91/imx93/imx95, Qualcomm
qcs6490/qrb2210 and Rockchip rk3568/rk3588s
- Carrier board for SOMs using Intel agilex5, Marvell Armada 7020,
NXP iMX8QP, Mediatek mt8370/mt8390 and rockchip rk3588
- Two mobile phones using Snapdragon 845
- A gaming device and a NAS box, both based on Rockchips rk356x
On top of the newly added boards and SoCs, there is a lot of
background activity going into cleanups, in particular towards getting
a warning-free dtc build, and the usual work on adding support for
more hardware on the previously added machines"
* tag 'soc-dt-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (757 commits)
dt-bindings: intel: Add Agilex eMMC support
arm64: dts: socfpga: agilex: add emmc support
arm64: dts: intel: agilex5: Add simple-bus node on top of dma controller node
ARM: dts: socfpga: fix dtbs_check warning for fpga-region
ARM: dts: socfpga: add #address-cells and #size-cells for sram node
dt-bindings: altera: document syscon as fallback for sys-mgr
arm64: dts: altera: Use lowercase hex
dt-bindings: arm: altera: combine Intel's SoCFPGA into altera.yaml
arm64: dts: socfpga: agilex5: Add IOMMUS property for ethernet nodes
arm64: dts: socfpga: agilex5: add support for modular board
dt-bindings: intel: Add Agilex5 SoCFPGA modular board
arm64: dts: socfpga: agilex5: Add dma-coherent property
arm64: dts: realtek: Add Kent SoC and EVB device trees
dt-bindings: arm: realtek: Add Kent Soc family compatibles
ARM: dts: samsung: Drop s3c6400.dtsi
ARM: dts: nuvoton: Minor whitespace cleanup
MAINTAINERS: Add Falcon DB
arm64: dts: a7k: add COM Express boards
ARM: dts: microchip: Drop usb_a9g20-dab-mmx.dtsi
arm64: dts: rockchip: Fix rk3588 PCIe range mappings
...
In a vain attempt to consolidate the email zoo switch everything to the
kernel.org account.
Signed-off-by: Thomas Gleixner <tglx@kernel.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
My name is stamped into maintainership for a big slew of DT
bindings. Now that it is changing, switch it over to my
kernel.org mail address, which will hopefully be stable for the
rest of my life.
Signed-off-by: Linus Walleij <linusw@kernel.org>
Link: https://patch.msgid.link/20251216-maintainers-dt-v1-1-0b5ab102c9bb@kernel.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
These three new families of SoC are split out into a separate branch
because they touch multiple parts of the source tree and are better
left separate for the initial merge.
- Black Sesame Technologies C1200 is an automotive SoC using
Cortex-A78 CPU cores
- Anlogic dr1v90 (not to be confused with Amlogic) is an FPGA
platform using a single nuclei ux900 RISC-V core
- Tenstorrent Blackhole is a Neural Processing Unit using
custom "Tensix" cores for computation offload managed by
Linux running on SiFive X280 RISC-V cores.
Support for all three is rather rudimentary at the moment and will get
improved as device drivers are merged through other tree.
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Merge tag 'soc-newsoc-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull new SoC families update from Arnd Bergmann:
"These three new families of SoC are split out into a separate branch
because they touch multiple parts of the source tree and are better
left separate for the initial merge.
- Black Sesame Technologies C1200 is an automotive SoC using
Cortex-A78 CPU cores
- Anlogic dr1v90 (not to be confused with Amlogic) is an FPGA
platform using a single nuclei ux900 RISC-V core
- Tenstorrent Blackhole is a Neural Processing Unit using custom
"Tensix" cores for computation offload managed by Linux running on
SiFive X280 RISC-V cores.
Support for all three is rather rudimentary at the moment and will get
improved as device drivers are merged through other tree"
* tag 'soc-newsoc-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (24 commits)
MAINTAINERS: add Black Sesame Technologies (BST) ARM SoC support
arm64: defconfig: enable BST platform support
arm64: dts: bst: add support for Black Sesame Technologies C1200 CDCU1.0 board
arm64: Kconfig: add ARCH_BST for Black Sesame Technologies SoCs
dt-bindings: arm: add Black Sesame Technologies (bst) SoC
dt-bindings: vendor-prefixes: Add Black Sesame Technologies Co., Ltd.
MAINTAINERS: Setup support for Anlogic tree
riscv: defconfig: Enable Anlogic SoC
riscv: dts: anlogic: Add Milianke MLKPAI FS01 board
riscv: dts: Add initial Anlogic DR1V90 SoC device tree
riscv: Add Anlogic SoC famly Kconfig support
dt-bindings: serial: snps-dw-apb-uart: Add Anlogic DR1V90 uart
dt-bindings: timer: Add Anlogic DR1V90 ACLINT MTIMER
dt-bindings: riscv: Add Anlogic DR1V90
dt-bindings: riscv: Add Nuclei UX900 compatibles
dt-bindings: vendor-prefixes: Add Anlogic, Milianke and Nuclei
riscv: defconfig: Enable Tenstorrent SoCs
riscv: Kconfig.socs: Add ARCH_TENSTORRENT for Tenstorrent SoCs
riscv: dts: Add Tenstorrent Blackhole SoC PCIe cards
dt-bindings: interrupt-controller: Add Tenstorrent Blackhole compatible
...
DT bindings:
- Convert lattice,ice40-fpga-mgr, apm,xgene-storm-dma, brcm,sr-thermal,
amazon,al-thermal, brcm,ocotp, mt8173-mdp, Actions Owl SPS, Marvell
AP80x System Controller, Marvell CP110 System Controller,
cznic,moxtet, and apm,xgene-slimpro-mbox to DT schema format
- Add i.MX95 fsl,irqsteer, MT8365 Mali Bifrost GPU, Anvo ANV32C81W
EEPROM, and Microchip pic64gx PLIC
- Add missing LGE, AMD Seattle, and APM X-Gene SoC platform compatibles
- Updates to brcm,bcm2836-l1-intc, brcm,bcm2835-hvs, and bcm2711-hdmi
bindings to fix warnings on BCM2712 platforms
- Drop obsolete db8500-thermal.txt
- Treewide clean-up of extra blank lines and inconsistent quoting
- Ensure all .dtbo targets are applied to a base .dtb
- Speed up dt_binding_check by skipping running validation on empty
examples
DT core:
- Add of_machine_device_match() and of_machine_get_match_data() helpers
and convert users treewide
- Fix bounds checking of address properties in FDT code. Rework the code
to have a single implementation of the bounds checks.
- Rework of_irq_init() to ignore any implicit interrupt-parent (i.e. in
a parent node) on nodes without an interrupt. This matches the spec
description and fixes some RISC-V platforms.
- Avoid a spurious message on overlay removal
- Skip DT kunit tests on RISCV+ACPI
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Merge tag 'devicetree-for-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull devicetree updates from Rob Herring:
"DT bindings:
- Convert lattice,ice40-fpga-mgr, apm,xgene-storm-dma,
brcm,sr-thermal, amazon,al-thermal, brcm,ocotp, mt8173-mdp, Actions
Owl SPS, Marvell AP80x System Controller, Marvell CP110 System
Controller, cznic,moxtet, and apm,xgene-slimpro-mbox to DT schema
format
- Add i.MX95 fsl,irqsteer, MT8365 Mali Bifrost GPU, Anvo ANV32C81W
EEPROM, and Microchip pic64gx PLIC
- Add missing LGE, AMD Seattle, and APM X-Gene SoC platform
compatibles
- Updates to brcm,bcm2836-l1-intc, brcm,bcm2835-hvs, and bcm2711-hdmi
bindings to fix warnings on BCM2712 platforms
- Drop obsolete db8500-thermal.txt
- Treewide clean-up of extra blank lines and inconsistent quoting
- Ensure all .dtbo targets are applied to a base .dtb
- Speed up dt_binding_check by skipping running validation on empty
examples
DT core:
- Add of_machine_device_match() and of_machine_get_match_data()
helpers and convert users treewide
- Fix bounds checking of address properties in FDT code. Rework the
code to have a single implementation of the bounds checks.
- Rework of_irq_init() to ignore any implicit interrupt-parent (i.e.
in a parent node) on nodes without an interrupt. This matches the
spec description and fixes some RISC-V platforms.
- Avoid a spurious message on overlay removal
- Skip DT kunit tests on RISCV+ACPI"
* tag 'devicetree-for-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (55 commits)
dt-bindings: kbuild: Skip validating empty examples
dt-bindings: interrupt-controller: brcm,bcm2836-l1-intc: Drop interrupt-controller requirement
dt-bindings: display: Fix brcm,bcm2835-hvs bindings for BCM2712
dt-bindings: display: bcm2711-hdmi: Add interrupt details for BCM2712
of: Skip devicetree kunit tests when RISCV+ACPI doesn't populate root node
soc: tegra: Simplify with of_machine_device_match()
soc: qcom: ubwc: Simplify with of_machine_get_match_data()
powercap: dtpm: Simplify with of_machine_get_match_data()
platform: surface: Simplify with of_machine_get_match_data()
irqchip/atmel-aic: Simplify with of_machine_get_match_data()
firmware: qcom: scm: Simplify with of_machine_device_match()
cpuidle: big_little: Simplify with of_machine_device_match()
cpufreq: sun50i: Simplify with of_machine_device_match()
cpufreq: mediatek: Simplify with of_machine_get_match_data()
cpufreq: dt-platdev: Simplify with of_machine_get_match_data()
of: Add wrappers to match root node with OF device ID tables
dt-bindings: eeprom: at25: Add Anvo ANV32C81W
of/reserved_mem: Simplify the logic of __reserved_mem_alloc_size()
of/reserved_mem: Simplify the logic of fdt_scan_reserved_mem_reg_nodes()
of/reserved_mem: Simplify the logic of __reserved_mem_reserve_reg()
...
The Realtek SYSTIMER (System Timer) is a 64-bit global hardware counter
operating at a fixed 1MHz frequency. Thanks to its compare match
interrupt capability, the timer natively supports oneshot mode for tick
broadcast functionality.
Signed-off-by: Hao-Wen Ting <haowen.ting@realtek.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://patch.msgid.link/20251126060110.198330-2-haowen.ting@realtek.com
Add bindings for the serial and timer peripherals, and a basic soc dtsi
for the Anlogic dr1v90 SoC. The Milianke MLKPAI FS01 is the first board
for this SoC. Add myself as maintainer for this platform for the time
being.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
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Merge tag 'anlogic-initial-6.19-v2' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/newsoc
Initial Anlogic Platform Support
Add bindings for the serial and timer peripherals, and a basic soc dtsi
for the Anlogic dr1v90 SoC. The Milianke MLKPAI FS01 is the first board
for this SoC. Add myself as maintainer for this platform for the time
being.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
* tag 'anlogic-initial-6.19-v2' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux:
MAINTAINERS: Setup support for Anlogic tree
riscv: defconfig: Enable Anlogic SoC
riscv: dts: anlogic: Add Milianke MLKPAI FS01 board
riscv: dts: Add initial Anlogic DR1V90 SoC device tree
riscv: Add Anlogic SoC famly Kconfig support
dt-bindings: serial: snps-dw-apb-uart: Add Anlogic DR1V90 uart
dt-bindings: timer: Add Anlogic DR1V90 ACLINT MTIMER
dt-bindings: riscv: Add Anlogic DR1V90
dt-bindings: riscv: Add Nuclei UX900 compatibles
dt-bindings: vendor-prefixes: Add Anlogic, Milianke and Nuclei
Generally at most 1 blank line is the standard style for DT schema
files. Remove the few cases with more than 1 so that the yamllint check
for this can be enabled.
Acked-by: Lee Jones <lee@kernel.org>
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org> # remoteproc
Acked-by: Georgi Djakov <djakov@kernel.org>
Acked-by: Vinod Koul <vkoul@kernel.org>
Acked-by: Andi Shyti <andi.shyti@kernel.org>
Acked-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Acked-by: Jonathan Cameron <jonathan.cameron@huawei.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: Uwe Kleine-König <ukleinek@kernel.org> # for allwinner,sun4i-a10-pwm.yaml
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> # mtd
Acked-by: Guenter Roeck <linux@roeck-us.net>
Acked-by: Mark Brown <broonie@kernel.org>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Acked-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Acked-by: Manivannan Sadhasivam <mani@kernel.org> # For PCI controller bindings
Link: https://patch.msgid.link/20251023143957.2899600-1-robh@kernel.org
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Add MTIMER support for Anlogic DR1V90 SoC, which uses Nuclei UX900 with
a TIMER unit compliant with the ACLINT specification.
Signed-off-by: Junhui Liu <junhui.liu@pigmoral.tech>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Document clint compatible for the Tenstorrent Blackhole SoC.
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Joel Stanley <jms@oss.tenstorrent.com>
Signed-off-by: Drew Fustini <dfustini@oss.tenstorrent.com>
DT core:
- Update dtc to upstream version v1.7.2-35-g52f07dcca47c
- Add stub for of_get_next_child_with_prefix()
- Convert of_msi_map_id() callers to of_msi_xlate()
DT bindings:
- Convert Megachips stdpxxxx-ge-b850v3-fw DP bridges, NVIDIA Tegra GPUs,
SUN Sparc RNG, aspeed,ast2400-sdram-edac, Marvell arm32 SoCs, Marvell
Berlin SoCs, apm,xgene-edac, marvell,armada-ap806-thermal,
marvell,armada370-thermal, marvell,armada-3700-wdt, nuvoton,npcm-wdt,
brcm,iproc-flexrm-mbox, brcm,iproc-pdc-mbox,
marvell,armada-3700-rwtm-mailbox, rockchip,rk3368-mailbox,
eckelmann,siox-gpio, aspeed,ast2400-gfx, apm,xgene-pmu,
hisilicon,mbigen-v2, cavium,thunder-88xx,
aspeed,ast2400-cf-fsi-master,
fsi-master-gpio, and mediatek,mt8173-vpu bindings to DT schema format
- Add bindings for synaptics,synaptics_i2c touchscreen controller,
innolux,n133hse-ea1 and nlt,nl12880bc20-spwg-24 displays, and NXP
vf610 reboot controller
- Add new Arm Cortex-A320/A520AE/A720AE and
C1-Nano/Pro/Premium/Ultra CPUs. Add missing Applied Micro CPU
compatibles. Add pu-supply and fsl,soc-operating-points properties for
CPU nodes.
- Add QCom Glymur PDC and tegra264-agic interrupt controllers
- Add samsung,exynos8890-mali GPU to Arm Mali Midgard
- Drop Samsung S3C2410 display related bindings
- Allow separate DP lane and AUX connections in dp-connector
- Add some missing, undocumented vendor prefixes
- Add missing '#address-cells' properties in interrupt controller
bindings which dtc now warns about
- Drop duplicate socfpga-sdram-edac.txt, moxa,moxart-watchdog.txt,
fsl/mpic.txt, ti,opa362.txt, and cavium-thunder2.txt legacy text
bindings which are already covered by existing schemas.
- Various binding fixes for Mediatek platforms in mailbox, regulator,
pinctrl, timer, and display
- Drop work-around for yamllint quoting of values containing ','
- Various spelling, typo, grammar, and duplicated words fixes in DT
bindings and docs
- Add binding guidelines for defining properties at top level of
schemas, lack of node name ABI, and usage of simple-mfd
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Merge tag 'devicetree-for-6.18' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull devicetree updates from Rob Herring:
"DT core:
- Update dtc to upstream version v1.7.2-35-g52f07dcca47c
- Add stub for of_get_next_child_with_prefix()
- Convert of_msi_map_id() callers to of_msi_xlate()
DT bindings:
- Convert multiple text board bindings to DT schema format
- Add bindings for synaptics,synaptics_i2c touchscreen controller,
innolux,n133hse-ea1 and nlt,nl12880bc20-spwg-24 displays, and NXP
vf610 reboot controller
- Add new Arm Cortex-A320/A520AE/A720AE and C1-Nano/Pro/Premium/Ultra
CPUs. Add missing Applied Micro CPU compatibles. Add pu-supply and
fsl,soc-operating-points properties for CPU nodes.
- Add QCom Glymur PDC and tegra264-agic interrupt controllers
- Add samsung,exynos8890-mali GPU to Arm Mali Midgard
- Drop Samsung S3C2410 display related bindings
- Allow separate DP lane and AUX connections in dp-connector
- Add some missing, undocumented vendor prefixes
- Add missing '#address-cells' properties in interrupt controller
bindings which dtc now warns about
- Drop duplicate socfpga-sdram-edac.txt, moxa,moxart-watchdog.txt,
fsl/mpic.txt, ti,opa362.txt, and cavium-thunder2.txt legacy text
bindings which are already covered by existing schemas.
- Various binding fixes for Mediatek platforms in mailbox, regulator,
pinctrl, timer, and display
- Drop work-around for yamllint quoting of values containing ','
- Various spelling, typo, grammar, and duplicated words fixes in DT
bindings and docs
- Add binding guidelines for defining properties at top level of
schemas, lack of node name ABI, and usage of simple-mfd"
* tag 'devicetree-for-6.18' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (81 commits)
dt-bindings: arm: altera: Drop socfpga-sdram-edac.txt
dt-bindings: gpu: Convert nvidia,gk20a to DT schema
dt-bindings: rng: sparc_sun_oracle_rng: convert to DT schema
dt-bindings: vendor-prefixes: update regex for properties without a prefix
dt-bindings: display: bridge: convert megachips-stdpxxxx-ge-b850v3-fw.txt to yaml
scripts: dt_to_config: fix grammar and a typo in --help text
dt-bindings: fix spelling, typos, grammar, duplicated words
docs: dt: fix grammar and spelling
of: base: Add of_get_next_child_with_prefix() stub
dt-bindings: trivial-devices: Add compatible string synaptics,synaptics_i2c
dt-bindings: soc: mediatek: pwrap: Add power-domains property
dt-bindings: pinctrl: mt65xx: Allow gpio-line-names
dt-bindings: media: Convert MediaTek mt8173-vpu bindings to DT schema
dt-bindings: arm: mediatek: Support mt8183-audiosys variant
dt-bindings: mailbox: mediatek,gce-mailbox: Make clock-names optional
dt-bindings: regulator: mediatek,mt6331: Add missing compatible
dt-bindings: regulator: mediatek,mt6331: Fix various regulator names
dt-bindings: regulator: mediatek,mt6332-regulator: Add missing compatible
dt-bindings: pinctrl: mediatek,mt7622-pinctrl: Add missing base reg
dt-bindings: pinctrl: mediatek,mt7622-pinctrl: Add missing pwm_ch7_2
...
The core highlights for this cycle are:
- The pca9586 driver was converted to the waveform API.
- Waveform drivers automatically provide a gpio chip to make PWMs
usable as GPIOs. (The pca9586 driver did that in a driver specific
implementation before.)
Otherwise it's the usual mix of fixes and device tree and driver changes
to support new hardware variants.
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Merge tag 'pwm/for-6.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/ukleinek/linux
Pull pwm updates from Uwe Kleine-König:
"The core highlights for this cycle are:
- The pca9586 driver was converted to the waveform API
- Waveform drivers automatically provide a gpio chip to make PWMs
usable as GPIOs (The pca9586 driver did that in a driver specific
implementation before)
Otherwise it's the usual mix of fixes and device tree and driver
changes to support new hardware variants"
* tag 'pwm/for-6.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/ukleinek/linux: (30 commits)
pwm: cros-ec: Avoid -Wflex-array-member-not-at-end warnings
dt-bindings: pwm: samsung: add exynos8890 compatible
dt-bindings: pwm: apple,s5l-fpwm: Add t6020-fpwm compatible
dt-bindings: pwm: nxp,lpc1850-sct-pwm: Minor whitespace cleanup in example
pwm: pca9586: Convert to waveform API
pwm: pca9685: Drop GPIO support
pwm: pca9685: Make use of register caching in regmap
pwm: pca9685: Use bulk write to atomicially update registers
pwm: pca9685: Don't disable hardware in .free()
pwm: Add the S32G support in the Freescale FTM driver
dt-bindings: pwm: fsl,vf610-ftm-pwm: Add compatible for s32g2 and s32g3
pwm: mediatek: Lock and cache clock rate
pwm: mediatek: Fix various issues in the .apply() callback
pwm: mediatek: Implement .get_state() callback
pwm: mediatek: Initialize clks when the hardware is enabled at probe time
pwm: mediatek: Rework parameters for clk helper function
pwm: mediatek: Introduce and use a few more register defines
pwm: mediatek: Simplify representation of channel offsets
pwm: tiecap: Document behaviour of hardware disable
pwm: Provide a gpio device for waveform drivers
...
Add a compatible for the General Purpose Timer (GPT) found on the
MediaTek Helio X10 MT6795 SoC which is fully compatible with the
one found in MT6577.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Add Axis ARTPEC-9 mct compatible to the bindings documentation.
The design for the timer is reused from previous Samsung SoCs
like exynos4210 and ARTPEC-8.
Signed-off-by: SungMin Park <smn1196@coasia.com>
Signed-off-by: Ravi Patel <ravi.patel@samsung.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20250917071311.1404-1-ravi.patel@samsung.com
The Vybrid Family is a NXP (formerly Freescale) platform having a
Programmable Interrupt Timer (PIT). This timer is an IP found also on
the NXP Automotive platform S32G2 and S32G3.
Add the compatible for those platforms to describe the timer.
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250804152344.1109310-20-daniel.lezcano@linaro.org
Add a new compatible for the MediaTek MT8196 SoC, fully compatible
with MT6765.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20250611110800.458164-2-angelogioacchino.delregno@collabora.com
Add fsl,timrot.yaml for i.MX23/i.MX28 timer.
Also add a generic fallback compatible string "fsl,timrot" for legacy
devices, which have existed for over 15 years.
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20250528165351.691848-1-Frank.Li@nxp.com
The original txt binding doc is:
reg : Specifies base physical address and size of the register sets for
the clock event device and clock source device.
And existed dts provide two reg MMIO spaces. So change to use items to
descript reg property.
Update examples.
Fixes: 8fc30d8f8e ("dt-bindings: timer: fsl,ftm-timer: Convert to dtschema")
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250523141437.533643-1-Frank.Li@nxp.com
Add a compatible string for timer on the MT6572 SoC.
Signed-off-by: Max Shevchenko <wctrl@proton.me>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250702-mt6572-v4-3-bde75b7ed445@proton.me
Convert the Faraday fttmr010 Timer binding to DT schema format. Adjust
the compatible string values to match what's in use. The number of
interrupts can also be anywhere from 1 to 8. The clock-names order was
reversed compared to what's used.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20250611232621.1508116-1-robh@kernel.org
With the goal to unify all PWM bindings to use #pwm-cells = <3> update
the renesas,rz-mtu3 binding accordingly. Keep <2> documented as a
deprecated value at least until the in-tree device trees are fixed
accordingly.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20250527205823.377785-2-u.kleine-koenig@baylibre.com
Signed-off-by: Uwe Kleine-König <ukleinek@kernel.org>
These five newly supported chips come with both devicetree descriptions
and the changes to wire them up to the build system for easier bisection.
The chips in question are:
- Marvell PXA1908 was the first 64-bit mobile phone chip from Marvell
in the product line that started with the Digital StrongARM SA1100
based PDAs and continued with the Intel PXA2xx that dominated early
smartphones. This one only made it only into a few products before the
entire product line was cut in 2015.
- The QiLai SoC is made by RISC-V core designer Andes Technologies
and is in the 'Voyager' reference board in MicroATX form factor.
It uses four in-order AX45MP cores, which is the midrange product
from Andes.
- CIX P1 is one of the few Arm chips designed for small workstations,
and this one uses 12 Cortex-A720/A520 cores, making it also one
of the only ARMv9.2 machines that one can but at the moment.
- Axiado AX3000 is an embedded chip with relative small Cortex-A53
CPU cores described as a "Trusted Control/Compute Unit" that can
be used as a BMC in servers. In addition to the usual I/O, this one
comes with 10GBit ethernet and and a 4TOPS NPU.
- Sophgo SG2000 is an embedded chip that comes with both RISC-V
and Arm cores that can run Linux. This was already supported for
RISC-V but now it also works on Arm
One more chip, the Black Sesame C1200 did not make it in tirm for the
merge window.
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Merge tag 'soc-newsoc-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull new SoC support from Arnd Bergmann:
"These five newly supported chips come with both devicetree
descriptions and the changes to wire them up to the build system for
easier bisection.
The chips in question are:
- Marvell PXA1908 was the first 64-bit mobile phone chip from Marvell
in the product line that started with the Digital StrongARM SA1100
based PDAs and continued with the Intel PXA2xx that dominated early
smartphones. This one only made it only into a few products before
the entire product line was cut in 2015.
- The QiLai SoC is made by RISC-V core designer Andes Technologies
and is in the 'Voyager' reference board in MicroATX form factor. It
uses four in-order AX45MP cores, which is the midrange product from
Andes.
- CIX P1 is one of the few Arm chips designed for small workstations,
and this one uses 12 Cortex-A720/A520 cores, making it also one of
the only ARMv9.2 machines that one can but at the moment.
- Axiado AX3000 is an embedded chip with relative small Cortex-A53
CPU cores described as a "Trusted Control/Compute Unit" that can be
used as a BMC in servers. In addition to the usual I/O, this one
comes with 10GBit ethernet and and a 4TOPS NPU.
- Sophgo SG2000 is an embedded chip that comes with both RISC-V and
Arm cores that can run Linux. This was already supported for RISC-V
but now it also works on Arm
One more chip, the Black Sesame C1200 did not make it in tirm for the
merge window"
* tag 'soc-newsoc-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (38 commits)
arm64: defconfig: Enable rudimentary Sophgo SG2000 support
arm64: Add SOPHGO SOC family Kconfig support
arm64: dts: sophgo: Add Duo Module 01 Evaluation Board
arm64: dts: sophgo: Add Duo Module 01
arm64: dts: sophgo: Add initial SG2000 SoC device tree
MAINTAINERS: Add entry for Axiado
arm64: defconfig: enable the Axiado family
arm64: dts: axiado: Add initial support for AX3000 SoC and eval board
arm64: add Axiado SoC family
dt-bindings: i3c: cdns: add Axiado AX3000 I3C controller
dt-bindings: serial: cdns: add Axiado AX3000 UART controller
dt-bindings: gpio: cdns: add Axiado AX3000 GPIO variant
dt-bindings: gpio: cdns: convert to YAML
dt-bindings: arm: axiado: add AX3000 EVK compatible strings
dt-bindings: vendor-prefixes: Add Axiado Corporation
MAINTAINERS: Add CIX SoC maintainer entry
arm64: dts: cix: Add sky1 base dts initial support
dt-bindings: clock: cix: Add CIX sky1 scmi clock id
arm64: defconfig: Enable CIX SoC
mailbox: add CIX mailbox driver
...
Rewrite the textual description for the VIA/WonderMedia timer
as YAML schema.
The IP can generate up to four interrupts from four respective match
registers, so reflect that in the schema.
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Alexey Charkov <alchark@gmail.com>
Link: https://lore.kernel.org/r/20250521-vt8500-timer-updates-v5-1-7e4bd11df72e@gmail.com
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Add the DT binding documentation for Andes machine timer.
The RISC-V architecture defines a machine timer that provides a real-time
counter and generates timer interrupts. Andes machiner timer (PLMT0) is
the implementation of the machine timer, and it contains memory-mapped
registers (mtime and mtimecmp). This device supports up to 32 cores.
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Ben Zong-You Xie <ben717@andestech.com>
Link: https://lore.kernel.org/r/20250711133025.2192404-6-ben717@andestech.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
DT Bindings:
- Convert all remaining interrupt-controller bindings to DT schema
- Convert Rockchip CDN-DP and Freescale TCON, M4IF, TigerP, LDB, PPC
PMC, imx-drm, and ftm-quaddec to DT schema
- Add bindings for fsl,vf610-pit, fsl,ls1021a-wdt, sgx,vz89te,
maxim,max30208, ti,lp8864, and fairphone,fp5-sndcard
- Add top-level constraints for renesas,vsp1 and renesas,fcp
- Add missing constraint in amlogic,pinctrl-a4 'group' nodes
- Adjust the allowed properties for dwc3-xilinx, sony,imx219,
pci-iommu, and renesas,dsi
- Add EcoNet vendor prefix
- Fix the reserved-memory.yaml in fsl,qman-fqd
- Drop obsolete numa.txt and cpu-topology.txt which are schemas in
dtschema now
- Drop Renesas RZ/N1S bindings
- Ensure Arm cpu nodes don't allow undocumented properties. Add all
the properties which are in use and undocumented. Drop the Mediatek
cpufreq binding which is not a binding, but just what DT properties
the driver uses.
- Add compatibles for Renesas RZ/G3E and RZ/V2N Mali Bifrost GPU
- Update documentation on defining child nodes with separate schemas
- Add bindings to PSCI MAINTAINERS entry
DT core:
- Add new functions to simplify driver handling of 'memory-region'
properties. Users to be added next cycle.
- Simplify of_dma_set_restricted_buffer() to use of_for_each_phandle()
- Add missing unlock on error in unittest_data_add()
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Merge tag 'devicetree-for-6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull devicetree updates from Rob Herring:
"DT Bindings:
- Convert all remaining interrupt-controller bindings to DT schema
- Convert Rockchip CDN-DP and Freescale TCON, M4IF, TigerP, LDB, PPC
PMC, imx-drm, and ftm-quaddec to DT schema
- Add bindings for fsl,vf610-pit, fsl,ls1021a-wdt, sgx,vz89te,
maxim,max30208, ti,lp8864, and fairphone,fp5-sndcard
- Add top-level constraints for renesas,vsp1 and renesas,fcp
- Add missing constraint in amlogic,pinctrl-a4 'group' nodes
- Adjust the allowed properties for dwc3-xilinx, sony,imx219,
pci-iommu, and renesas,dsi
- Add EcoNet vendor prefix
- Fix the reserved-memory.yaml in fsl,qman-fqd
- Drop obsolete numa.txt and cpu-topology.txt which are schemas in
dtschema now
- Drop Renesas RZ/N1S bindings
- Ensure Arm cpu nodes don't allow undocumented properties. Add all
the properties which are in use and undocumented. Drop the Mediatek
cpufreq binding which is not a binding, but just what DT properties
the driver uses.
- Add compatibles for Renesas RZ/G3E and RZ/V2N Mali Bifrost GPU
- Update documentation on defining child nodes with separate schemas
- Add bindings to PSCI MAINTAINERS entry
DT core:
- Add new functions to simplify driver handling of 'memory-region'
properties. Users to be added next cycle.
- Simplify of_dma_set_restricted_buffer() to use
of_for_each_phandle()
- Add missing unlock on error in unittest_data_add()"
* tag 'devicetree-for-6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (87 commits)
dt-bindings: timer: Add fsl,vf610-pit.yaml
dt-bindings: gpu: mali-bifrost: Add compatible for RZ/G3E SoC
ASoC: dt-bindings: qcom,sm8250: Add Fairphone 5 sound card
dt-bindings: arm/cpus: Allow 2 power-domains entries
dt-bindings: usb: dwc3-xilinx: allow dma-coherent
media: dt-bindings: sony,imx219: Allow props from video-interface-devices
dt-bindings: soundwire: qcom: Document v2.1.0 version of IP block
dt-bindings: watchdog: fsl-imx-wdt: add compatible string fsl,ls1021a-wdt
dt-bindings: pinctrl: amlogic,pinctrl-a4: Add missing constraint on allowed 'group' node properties
dt-bindings: display: rockchip: Convert cdn-dp-rockchip.txt to yaml
dt-bindings: display: bridge: renesas,dsi: allow properties from dsi-controller
dt-bindings: trivial-devices: Add VZ89TE to trivial
media: dt-bindings: renesas,vsp1: add top-level constraints
media: dt-bindings: renesas,fcp: add top-level constraints
dt-bindings: trivial-devices: Add Maxim max30208
dt-bindings: soc: fsl,qman-fqd: Fix reserved-memory.yaml reference
dt-bindings: interrupt-controller: Convert ti,omap-intc-irq to DT schema
dt-bindings: interrupt-controller: Convert ti,omap4-wugen-mpu to DT schema
dt-bindings: interrupt-controller: Convert ti,keystone-irq to DT schema
dt-bindings: interrupt-controller: Convert technologic,ts4800-irqc to DT schema
...
Add binding doc fsl,vf610-pit.yaml to fix below CHECK_DTB warnings:
arch/arm/boot/dts/nxp/vf/vf610m4-colibri.dtb:
/soc/bus@40000000/pit@40037000: failed to match any schema with compatible: ['fsl,vf610-pit']
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20250522205710.502779-1-Frank.Li@nxp.com
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
- The final conversion of text formatted device tree binding to schemas.
- A new driver fot the System Timer Module on S32G NXP SoCs.
- A new driver fot the Econet HPT timer
- The usual improvements and device tree binding updates
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Merge tag 'timers-clocksource-2025-05-25' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull clocksource updates from Thomas Gleixner:
"Updates for clocksource/clockevent drivers:
- The final conversion of text formatted device tree binding to
schemas
- A new driver fot the System Timer Module on S32G NXP SoCs
- A new driver fot the Econet HPT timer
- The usual improvements and device tree binding updates"
* tag 'timers-clocksource-2025-05-25' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (31 commits)
clocksource/drivers/renesas-ostm: Unconditionally enable reprobe support
dt-bindings: timer: renesas,ostm: Document RZ/V2N (R9A09G056) support
dt-bindings: timer: Convert marvell,armada-370-timer to DT schema
dt-bindings: timer: Convert ti,keystone-timer to DT schema
dt-bindings: timer: Convert st,spear-timer to DT schema
dt-bindings: timer: Convert socionext,milbeaut-timer to DT schema
dt-bindings: timer: Convert snps,arc-timer to DT schema
dt-bindings: timer: Convert snps,archs-rtc to DT schema
dt-bindings: timer: Convert snps,archs-gfrc to DT schema
dt-bindings: timer: Convert lsi,zevio-timer to DT schema
dt-bindings: timer: Convert jcore,pit to DT schema
dt-bindings: timer: Convert img,pistachio-gptimer to DT schema
dt-bindings: timer: Convert ezchip,nps400-timer to DT schema
dt-bindings: timer: Convert cirrus,clps711x-timer to DT schema
dt-bindings: timer: Convert altr,timer-1.0 to DT schema
dt-bindings: timer: Add ESWIN EIC7700 CLINT
clocksource/drivers: Add EcoNet Timer HPT driver
dt-bindings: timer: Add EcoNet EN751221 "HPT" CPU Timer
dt-bindings: timer: Convert arm,mps2-timer to DT schema
dt-bindings: timer: Add Sophgo SG2044 ACLINT timer
...
Document support for the Renesas OS Timer (OSTM) found on the Renesas
RZ/V2N (R9A09G056) SoC. The OSTM IP on RZ/V2N is identical to that on
other RZ families, so no driver changes are required as `renesas,ostm`
will be used as fallback compatible.
Also update the bindings to require the "resets" property for RZ/V2N
by inverting the logic: all SoCs except RZ/A1 and RZ/A2 now require
the "resets" property.
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20250515182207.329176-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Convert the Marvell Armada 37x/380/XP Timer binding to DT schema format.
Update the compatible entries to match what is in use.
"marvell,armada-380-timer" in particular was missing.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/r/20250506022301.2588282-1-robh@kernel.org
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Convert the TI Keystone Timer binding to DT schema format. It's a
straight-forward conversion.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250506022330.2589598-1-robh@kernel.org
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Convert the ST SPEAr Timer binding to DT schema format. It's a
straight-forward conversion.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250506022326.2589389-1-robh@kernel.org
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Convert the Socionext Milbeaut Timer binding to DT schema format.
It's a straight-forward conversion.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250506022322.2589193-1-robh@kernel.org
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Convert the Synopsys ARC Local Timer binding to DT schema format. It's a
straight-forward conversion.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250506022317.2589010-1-robh@kernel.org
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Convert the TI NSPIRE Timer binding to DT schema format. It's a
straight-forward conversion.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250506022257.2588136-1-robh@kernel.org
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Convert the J-Core PIT Timer binding to DT schema format. It's a
straight-forward conversion.
Since the 'reg' entries are based on number of cores, we can't put
constraints on it.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250506022253.2587999-1-robh@kernel.org
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Convert the ImgTec Pistachio Timer binding to DT schema format. It's a
straight-forward conversion.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250506022249.2587839-1-robh@kernel.org
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Convert the EZChip NPS400 Timer bindings to DT schema format. It's a
straight-forward conversion. The 2 bindings only differ in compatible
and one required property, so the schemas can be combined.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250506022237.2587355-1-robh@kernel.org
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Convert the Cirrus CLPS711x timer binding to DT schema format. It's a
straight-forward conversion.
Drop the aliases node and second example which aren't relevant.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250506022215.2586595-1-robh@kernel.org
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Convert the Altera Timer binding to DT schema format. It's a
straight-forward conversion.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250506022202.2586157-1-robh@kernel.org
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Add device tree bindings for the so-called high-precision timer (HPT)
in the EcoNet EN751221 SoC.
Signed-off-by: Caleb James DeLisle <cjd@cjdns.fr>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250507134500.390547-2-cjd@cjdns.fr
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Convert the Arm MPS2 Timer binding to DT schema format. It's a
straight-forward conversion.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Liviu Dudau <liviu.dudau@arm.com>
Link: https://lore.kernel.org/r/20250506022210.2586404-1-robh@kernel.org
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Like SG2042, SG2044 implements an enhanced ACLINT, so add necessary
compatible string for SG2044 SoC.
Signed-off-by: Inochi Amaoto <inochiama@gmail.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250413223507.46480-3-inochiama@gmail.com
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
