mirror of
https://github.com/torvalds/linux.git
synced 2026-03-08 03:24:45 +01:00
soc: devicetree updates for 7.0
There are a handful of new SoCs this time, all of these are
more or less related to chips in a wider family:
- SpacemiT Key Stone K3 is an 8-core risc-v chip, and the first
widely available RVA23 implementation. Note that this is
entirely unrelated with the similarly named Texas Instruments
K3 chip family that follwed the TI Keystone2 SoC.
- The Realtek Kent family of SoCs contains three chip models
rtd1501s, rtd1861b and rtd1920s, and is related to their earlier
Set-top-box and NAS products such as rtd1619, but is built
on newer Arm Cortex-A78 cores.
- The Qualcomm Milos family includes the Snapdragon 7s Gen 3
(SM7635) mobile phone SoC built around Armv9 Kryo cores of the Arm
Cortex-A720 generation. This one is used in the Fairphone Gen 6
- Qualcomm Kaanapali is a new SoC based around eight high
performance Oryon CPU cores
- NXP i.MX8QP and i.MX952 are both feature reduced versions of
chips we already support, i.e. the i.MX8QM and i.MX952, with
fewer CPU cores and I/O interfaces.
As part of a cleanup, a number of SoC specific devicetree files got
removed because they did not have a single board using the .dtsi files
and they were never compile tested as a result: Samsung s3c6400,
ST spear320s, ST stm32mp21xc/stm32mp23xc/stm32mp25xc, Renesas
r8a779m0/r8a779m2/r8a779m4/r8a779m6/r8a779m7/r8a779m8/r8a779mb/
r9a07g044c1/r9a07g044l1/r9a07g054l1/r9a09g047e37, and TI am3703/am3715.
All of these could be restored easily if a new board gets merged.
Broadcom/Cavium/Marvell ThunderX2 gets removed along with its only
machine, as all remaining users are assumed to be using ACPI
based firmware.
A relatively small number of 43 boards get added this time, and
almost all of them for arm64. Aside from the reference boards for
the newly added SoCs, this includes:
- Three server boards use 32-bit ASpeed BMCs
- One more reference board for 32-bit Microchip LAN9668
- 64-bit Arm single-board computers based on Amlogic s905y4,
CIX sky1, NXP ls1028a/imx8mn/imx8mp/imx91/imx93/imx95,
Qualcomm qcs6490/qrb2210 and Rockchip rk3568/rk3588s
- Carrier board for SOMs using Intel agilex5, Marvell Armada 7020,
NXP iMX8QP, Mediatek mt8370/mt8390 and rockchip rk3588
- Two mobile phones using Snapdragon 845
- A gaming device and a NAS box, both based on Rockchips rk356x
On top of the newly added boards and SoCs, there is a lot of
background activity going into cleanups, in particular towards
getting a warning-free dtc build, and the usual work on adding
support for more hardware on the previously added machines.
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Merge tag 'soc-dt-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull SoC devicetree updates from Arnd Bergmann:
"There are a handful of new SoCs this time, all of these are more or
less related to chips in a wider family:
- SpacemiT Key Stone K3 is an 8-core risc-v chip, and the first
widely available RVA23 implementation. Note that this is entirely
unrelated with the similarly named Texas Instruments K3 chip family
that follwed the TI Keystone2 SoC.
- The Realtek Kent family of SoCs contains three chip models
rtd1501s, rtd1861b and rtd1920s, and is related to their earlier
Set-top-box and NAS products such as rtd1619, but is built on newer
Arm Cortex-A78 cores.
- The Qualcomm Milos family includes the Snapdragon 7s Gen 3 (SM7635)
mobile phone SoC built around Armv9 Kryo cores of the Arm
Cortex-A720 generation. This one is used in the Fairphone Gen 6
- Qualcomm Kaanapali is a new SoC based around eight high performance
Oryon CPU cores
- NXP i.MX8QP and i.MX952 are both feature reduced versions of chips
we already support, i.e. the i.MX8QM and i.MX952, with fewer CPU
cores and I/O interfaces.
As part of a cleanup, a number of SoC specific devicetree files got
removed because they did not have a single board using the .dtsi files
and they were never compile tested as a result: Samsung s3c6400, ST
spear320s, ST stm32mp21xc/stm32mp23xc/stm32mp25xc, Renesas
r8a779m0/r8a779m2/r8a779m4/r8a779m6/r8a779m7/r8a779m8/r8a779mb/
r9a07g044c1/r9a07g044l1/r9a07g054l1/r9a09g047e37, and TI
am3703/am3715. All of these could be restored easily if a new board
gets merged.
Broadcom/Cavium/Marvell ThunderX2 gets removed along with its only
machine, as all remaining users are assumed to be using ACPI based
firmware.
A relatively small number of 43 boards get added this time, and almost
all of them for arm64. Aside from the reference boards for the newly
added SoCs, this includes:
- Three server boards use 32-bit ASpeed BMCs
- One more reference board for 32-bit Microchip LAN9668
- 64-bit Arm single-board computers based on Amlogic s905y4, CIX
sky1, NXP ls1028a/imx8mn/imx8mp/imx91/imx93/imx95, Qualcomm
qcs6490/qrb2210 and Rockchip rk3568/rk3588s
- Carrier board for SOMs using Intel agilex5, Marvell Armada 7020,
NXP iMX8QP, Mediatek mt8370/mt8390 and rockchip rk3588
- Two mobile phones using Snapdragon 845
- A gaming device and a NAS box, both based on Rockchips rk356x
On top of the newly added boards and SoCs, there is a lot of
background activity going into cleanups, in particular towards getting
a warning-free dtc build, and the usual work on adding support for
more hardware on the previously added machines"
* tag 'soc-dt-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (757 commits)
dt-bindings: intel: Add Agilex eMMC support
arm64: dts: socfpga: agilex: add emmc support
arm64: dts: intel: agilex5: Add simple-bus node on top of dma controller node
ARM: dts: socfpga: fix dtbs_check warning for fpga-region
ARM: dts: socfpga: add #address-cells and #size-cells for sram node
dt-bindings: altera: document syscon as fallback for sys-mgr
arm64: dts: altera: Use lowercase hex
dt-bindings: arm: altera: combine Intel's SoCFPGA into altera.yaml
arm64: dts: socfpga: agilex5: Add IOMMUS property for ethernet nodes
arm64: dts: socfpga: agilex5: add support for modular board
dt-bindings: intel: Add Agilex5 SoCFPGA modular board
arm64: dts: socfpga: agilex5: Add dma-coherent property
arm64: dts: realtek: Add Kent SoC and EVB device trees
dt-bindings: arm: realtek: Add Kent Soc family compatibles
ARM: dts: samsung: Drop s3c6400.dtsi
ARM: dts: nuvoton: Minor whitespace cleanup
MAINTAINERS: Add Falcon DB
arm64: dts: a7k: add COM Express boards
ARM: dts: microchip: Drop usb_a9g20-dab-mmx.dtsi
arm64: dts: rockchip: Fix rk3588 PCIe range mappings
...
This commit is contained in:
Linus Torvalds
commit
6589b3d76d
775 changed files with 52107 additions and 5570 deletions
|
|
@ -9,6 +9,9 @@ title: Altera's SoCFPGA platform
|
|||
maintainers:
|
||||
- Dinh Nguyen <dinguyen@kernel.org>
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||||
|
||||
description:
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||||
Altera/Intel boards with ARM 32/64 bits cores
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||||
|
||||
properties:
|
||||
$nodename:
|
||||
const: "/"
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||||
|
|
@ -81,6 +84,30 @@ properties:
|
|||
- altr,socfpga-stratix10-swvp
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||||
- const: altr,socfpga-stratix10
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||||
|
||||
- description: AgileX boards
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items:
|
||||
- enum:
|
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- intel,n5x-socdk
|
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- intel,socfpga-agilex-n6000
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||||
- intel,socfpga-agilex-socdk
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- intel,socfpga-agilex-socdk-emmc
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- const: intel,socfpga-agilex
|
||||
|
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- description: Agilex3 boards
|
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items:
|
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- enum:
|
||||
- intel,socfpga-agilex3-socdk
|
||||
- const: intel,socfpga-agilex3
|
||||
- const: intel,socfpga-agilex5
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||||
|
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- description: Agilex5 boards
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items:
|
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- enum:
|
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- intel,socfpga-agilex5-socdk
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- intel,socfpga-agilex5-socdk-013b
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- intel,socfpga-agilex5-socdk-nand
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- const: intel,socfpga-agilex5
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- description: SoCFPGA VT
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items:
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- const: altr,socfpga-vt
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|
|
|
|||
|
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@ -245,6 +245,14 @@ properties:
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|||
items:
|
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- enum:
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- amlogic,aq222
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- const: amlogic,s805x2
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- const: amlogic,s4
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|
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- description: Boards with the Amlogic Meson S4 S905Y4 SoC
|
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items:
|
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- enum:
|
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- khadas,vim1s
|
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- const: amlogic,s905y4
|
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- const: amlogic,s4
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||||
|
||||
- description: Boards with the Amlogic S6 S905X5 SoC
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||||
|
|
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|||
|
|
@ -34,6 +34,7 @@ properties:
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|||
- amd,ethanolx-bmc
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- ampere,mtjade-bmc
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- aspeed,ast2500-evb
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- asrock,altrad8-bmc
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- asrock,e3c246d4i-bmc
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- asrock,e3c256d4i-bmc
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- asrock,romed8hm3-bmc
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||||
|
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@ -80,6 +81,7 @@ properties:
|
|||
- aspeed,ast2600-evb
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- aspeed,ast2600-evb-a1
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- asus,x4tf-bmc
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- facebook,anacapa-bmc
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- facebook,bletchley-bmc
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- facebook,catalina-bmc
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- facebook,clemente-bmc
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|
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@ -107,6 +109,7 @@ properties:
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- inventec,transformer-bmc
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- jabil,rbp-bmc
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- nvidia,gb200nvl-bmc
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- nvidia,msx4-bmc
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- qcom,dc-scm-v1-bmc
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- quanta,s6q-bmc
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- ufispace,ncplite-bmc
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|
|
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|||
|
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@ -235,9 +235,11 @@ properties:
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- const: microchip,lan9662
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- const: microchip,lan966
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- description: Microchip LAN9668 PCB8290 Evaluation Board.
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- description: Microchip LAN9668 Evaluation Board.
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items:
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- const: microchip,lan9668-pcb8290
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- enum:
|
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- microchip,lan9668-pcb8290
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- microchip,lan9668-pcb8385
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- const: microchip,lan9668
|
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- const: microchip,lan966
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|
||||
|
|
|
|||
|
|
@ -16,9 +16,11 @@ properties:
|
|||
compatible:
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oneOf:
|
||||
|
||||
- description: Radxa Orion O6
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- description: Sky1 based boards
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items:
|
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- const: radxa,orion-o6
|
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- enum:
|
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- radxa,orion-o6 # Radxa Orion O6 board
|
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- xunlong,orangepi-6-plus # Xunlong orangepi 6 plus board
|
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- const: cix,sky1
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||||
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additionalProperties: true
|
||||
|
|
|
|||
|
|
@ -1071,6 +1071,15 @@ properties:
|
|||
- gw,imx8mn-gw7902 # i.MX8MM Gateworks Board
|
||||
- const: fsl,imx8mn
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||||
|
||||
- description: ifm i.MX8MN VHIP4 based boards
|
||||
items:
|
||||
- enum:
|
||||
- ifm,imx8mn-vhip4-evalboard-v1
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||||
- ifm,imx8mn-vhip4-evalboard-v2
|
||||
- const: ifm,imx8mn-vhip4-evalboard
|
||||
- const: ifm,imx8mn-vhip4
|
||||
- const: fsl,imx8mn
|
||||
|
||||
- description: Variscite VAR-SOM-MX8MN based boards
|
||||
items:
|
||||
- enum:
|
||||
|
|
@ -1099,6 +1108,7 @@ properties:
|
|||
- emcraft,imx8mp-navqp # i.MX8MP Emcraft Systems NavQ+ Kit
|
||||
- fsl,imx8mp-evk # i.MX8MP EVK Board
|
||||
- fsl,imx8mp-evk-revb4 # i.MX8MP EVK Rev B4 Board
|
||||
- fsl,imx8mp-frdm # i.MX8MP Freedom Board
|
||||
- gateworks,imx8mp-gw71xx-2x # i.MX8MP Gateworks Board
|
||||
- gateworks,imx8mp-gw72xx-2x # i.MX8MP Gateworks Board
|
||||
- gateworks,imx8mp-gw73xx-2x # i.MX8MP Gateworks Board
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||||
|
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@ -1340,7 +1350,7 @@ properties:
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|||
- const: toradex,apalis-imx8
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- const: fsl,imx8qm
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||||
|
||||
- description: i.MX8QM Boards with Toradex Apalis iMX8 V1.1 Modules
|
||||
- description: i.MX8QM/i.MX8QP Boards with Toradex Apalis iMX8 V1.1 Modules
|
||||
items:
|
||||
- enum:
|
||||
- toradex,apalis-imx8-v1.1-eval # Apalis iMX8 V1.1 Module on Apalis Eval. V1.0/V1.1 Board
|
||||
|
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@ -1348,7 +1358,9 @@ properties:
|
|||
- toradex,apalis-imx8-v1.1-ixora-v1.1 # Apalis iMX8 V1.1 Module on Ixora V1.1 C. Board
|
||||
- toradex,apalis-imx8-v1.1-ixora-v1.2 # Apalis iMX8 V1.1 Module on Ixora V1.2 C. Board
|
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- const: toradex,apalis-imx8-v1.1
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||||
- const: fsl,imx8qm
|
||||
- enum:
|
||||
- fsl,imx8qm
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- fsl,imx8qp
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||||
|
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- description: i.MX8QXP based Boards
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items:
|
||||
|
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@ -1419,6 +1431,7 @@ properties:
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|||
items:
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||||
- enum:
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- fsl,imx91-11x11-evk # i.MX91 11x11 EVK Board
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- fsl,imx91-11x11-frdm # FRDM i.MX91 Development Board
|
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- const: fsl,imx91
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||||
|
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- description: i.MX93 based Boards
|
||||
|
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@ -1426,6 +1439,7 @@ properties:
|
|||
- enum:
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||||
- fsl,imx93-9x9-qsb # i.MX93 9x9 QSB Board
|
||||
- fsl,imx93-11x11-evk # i.MX93 11x11 EVK Board
|
||||
- fsl,imx93-11x11-frdm # i.MX93 11x11 FRDM Board
|
||||
- fsl,imx93-14x14-evk # i.MX93 14x14 EVK Board
|
||||
- const: fsl,imx93
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||||
|
||||
|
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@ -1439,10 +1453,17 @@ properties:
|
|||
items:
|
||||
- enum:
|
||||
- fsl,imx95-15x15-evk # i.MX95 15x15 EVK Board
|
||||
- fsl,imx95-15x15-frdm # i.MX95 15x15 FRDM Board
|
||||
- fsl,imx95-19x19-evk # i.MX95 19x19 EVK Board
|
||||
- toradex,verdin-imx95-19x19-evk # i.MX95 Verdin Evaluation Kit (EVK)
|
||||
- const: fsl,imx95
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||||
|
||||
- description: i.MX952 based Boards
|
||||
items:
|
||||
- enum:
|
||||
- fsl,imx952-evk # i.MX952 EVK Board
|
||||
- const: fsl,imx952
|
||||
|
||||
- description: PHYTEC i.MX 95 FPSC based Boards
|
||||
items:
|
||||
- enum:
|
||||
|
|
@ -1679,6 +1700,15 @@ properties:
|
|||
- const: kontron,sl28
|
||||
- const: fsl,ls1028a
|
||||
|
||||
- description:
|
||||
TQ-Systems TQMLS1028A SoM on MBLS1028A/MBLS1028A-IND board
|
||||
items:
|
||||
- enum:
|
||||
- tq,ls1028a-tqmls1028a-mbls1028a
|
||||
- tq,ls1028a-tqmls1028a-mbls1028a-ind
|
||||
- const: tq,ls1028a-tqmls1028a
|
||||
- const: fsl,ls1028a
|
||||
|
||||
- description: LS1043A based Boards
|
||||
items:
|
||||
- enum:
|
||||
|
|
|
|||
|
|
@ -1,40 +0,0 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/arm/intel,socfpga.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Intel SoCFPGA platform
|
||||
|
||||
maintainers:
|
||||
- Dinh Nguyen <dinguyen@kernel.org>
|
||||
|
||||
properties:
|
||||
$nodename:
|
||||
const: "/"
|
||||
compatible:
|
||||
oneOf:
|
||||
- description: AgileX boards
|
||||
items:
|
||||
- enum:
|
||||
- intel,n5x-socdk
|
||||
- intel,socfpga-agilex-n6000
|
||||
- intel,socfpga-agilex-socdk
|
||||
- const: intel,socfpga-agilex
|
||||
- description: Agilex3 boards
|
||||
items:
|
||||
- enum:
|
||||
- intel,socfpga-agilex3-socdk
|
||||
- const: intel,socfpga-agilex3
|
||||
- const: intel,socfpga-agilex5
|
||||
- description: Agilex5 boards
|
||||
items:
|
||||
- enum:
|
||||
- intel,socfpga-agilex5-socdk
|
||||
- intel,socfpga-agilex5-socdk-013b
|
||||
- intel,socfpga-agilex5-socdk-nand
|
||||
- const: intel,socfpga-agilex5
|
||||
|
||||
additionalProperties: true
|
||||
|
||||
...
|
||||
|
|
@ -438,12 +438,14 @@ properties:
|
|||
- const: mediatek,mt8365
|
||||
- items:
|
||||
- enum:
|
||||
- ezurio,mt8370-tungsten-smarc
|
||||
- grinn,genio-510-sbc
|
||||
- mediatek,mt8370-evk
|
||||
- const: mediatek,mt8370
|
||||
- const: mediatek,mt8188
|
||||
- items:
|
||||
- enum:
|
||||
- ezurio,mt8390-tungsten-smarc
|
||||
- grinn,genio-700-sbc
|
||||
- mediatek,mt8390-evk
|
||||
- const: mediatek,mt8390
|
||||
|
|
|
|||
|
|
@ -48,19 +48,39 @@ required:
|
|||
- compatible
|
||||
- '#clock-cells'
|
||||
|
||||
if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: mediatek,mt8183-audiosys
|
||||
then:
|
||||
properties:
|
||||
audio-controller:
|
||||
$ref: /schemas/sound/mediatek,mt8183-audio.yaml#
|
||||
else:
|
||||
properties:
|
||||
audio-controller:
|
||||
$ref: /schemas/sound/mediatek,mt2701-audio.yaml#
|
||||
allOf:
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- mediatek,mt2701-audsys
|
||||
- mediatek,mt7622-audsys
|
||||
then:
|
||||
properties:
|
||||
audio-controller:
|
||||
$ref: /schemas/sound/mediatek,mt2701-audio.yaml#
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: mediatek,mt8183-audiosys
|
||||
then:
|
||||
properties:
|
||||
audio-controller:
|
||||
$ref: /schemas/sound/mediatek,mt8183-audio.yaml#
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: mediatek,mt8192-audsys
|
||||
then:
|
||||
properties:
|
||||
audio-controller:
|
||||
$ref: /schemas/sound/mt8192-afe-pcm.yaml#
|
||||
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
|
|
|
|||
|
|
@ -61,6 +61,11 @@ properties:
|
|||
- qcom,apq8084-sbc
|
||||
- const: qcom,apq8084
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- fairphone,fp6
|
||||
- const: qcom,milos
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- microsoft,dempsey
|
||||
|
|
@ -327,6 +332,12 @@ properties:
|
|||
- qcom,ipq9574-ap-al02-c9
|
||||
- const: qcom,ipq9574
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- qcom,kaanapali-mtp
|
||||
- qcom,kaanapali-qrd
|
||||
- const: qcom,kaanapali
|
||||
|
||||
- description: Sierra Wireless MangOH Green with WP8548 Module
|
||||
items:
|
||||
- const: swir,mangoh-green-wp8548
|
||||
|
|
@ -336,6 +347,7 @@ properties:
|
|||
- description: Qualcomm Technologies, Inc. Robotics RB1
|
||||
items:
|
||||
- enum:
|
||||
- arduino,imola
|
||||
- qcom,qrb2210-rb1
|
||||
- const: qcom,qrb2210
|
||||
- const: qcom,qcm2290
|
||||
|
|
@ -348,6 +360,7 @@ properties:
|
|||
- qcom,qcs6490-rb3gen2
|
||||
- radxa,dragon-q6a
|
||||
- shift,otter
|
||||
- thundercomm,rubikpi3
|
||||
- const: qcom,qcm6490
|
||||
|
||||
- description: Qualcomm Technologies, Inc. Distributed Unit 1000 platform
|
||||
|
|
@ -900,6 +913,8 @@ properties:
|
|||
|
||||
- items:
|
||||
- enum:
|
||||
- google,blueline
|
||||
- google,crosshatch
|
||||
- huawei,planck
|
||||
- lenovo,yoga-c630
|
||||
- lg,judyln
|
||||
|
|
@ -1067,6 +1082,19 @@ properties:
|
|||
- const: qcom,x1e78100
|
||||
- const: qcom,x1e80100
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- medion,sprchrgd14s1
|
||||
- tuxedo,elite14gen1
|
||||
- const: qcom,x1e78100
|
||||
- const: qcom,x1e80100
|
||||
|
||||
- items:
|
||||
- const: microsoft,denali-lcd
|
||||
- const: microsoft,denali
|
||||
- const: qcom,x1p64100
|
||||
- const: qcom,x1e80100
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- asus,vivobook-s15
|
||||
|
|
@ -1089,6 +1117,11 @@ properties:
|
|||
- const: qcom,hamoa-iot-som
|
||||
- const: qcom,x1e80100
|
||||
|
||||
- items:
|
||||
- const: microsoft,denali-oled
|
||||
- const: microsoft,denali
|
||||
- const: qcom,x1e80100
|
||||
|
||||
- items:
|
||||
- enum:
|
||||
- asus,zenbook-a14-ux3407qa-lcd
|
||||
|
|
|
|||
|
|
@ -14,21 +14,21 @@ properties:
|
|||
const: '/'
|
||||
compatible:
|
||||
oneOf:
|
||||
# RTD1195 SoC based boards
|
||||
- items:
|
||||
- description: RTD1195 SoC based boards
|
||||
items:
|
||||
- enum:
|
||||
- mele,x1000 # MeLE X1000
|
||||
- realtek,horseradish # Realtek Horseradish EVB
|
||||
- const: realtek,rtd1195
|
||||
|
||||
# RTD1293 SoC based boards
|
||||
- items:
|
||||
- description: RTD1293 SoC based boards
|
||||
items:
|
||||
- enum:
|
||||
- synology,ds418j # Synology DiskStation DS418j
|
||||
- const: realtek,rtd1293
|
||||
|
||||
# RTD1295 SoC based boards
|
||||
- items:
|
||||
- description: RTD1295 SoC based boards
|
||||
items:
|
||||
- enum:
|
||||
- mele,v9 # MeLE V9
|
||||
- probox2,ava # ProBox2 AVA
|
||||
|
|
@ -36,25 +36,43 @@ properties:
|
|||
- zidoo,x9s # Zidoo X9S
|
||||
- const: realtek,rtd1295
|
||||
|
||||
# RTD1296 SoC based boards
|
||||
- items:
|
||||
- description: RTD1296 SoC based boards
|
||||
items:
|
||||
- enum:
|
||||
- synology,ds418 # Synology DiskStation DS418
|
||||
- const: realtek,rtd1296
|
||||
|
||||
# RTD1395 SoC based boards
|
||||
- items:
|
||||
- description: RTD1395 SoC based boards
|
||||
items:
|
||||
- enum:
|
||||
- bananapi,bpi-m4 # Banana Pi BPI-M4
|
||||
- realtek,lion-skin # Realtek Lion Skin EVB
|
||||
- const: realtek,rtd1395
|
||||
|
||||
# RTD1619 SoC based boards
|
||||
- items:
|
||||
- description: RTD1501s SoC based boards
|
||||
items:
|
||||
- enum:
|
||||
- realtek,phantom # Realtek Phantom EVB (8GB)
|
||||
- const: realtek,rtd1501s
|
||||
|
||||
- description: RTD1619 SoC based boards
|
||||
items:
|
||||
- enum:
|
||||
- realtek,mjolnir # Realtek Mjolnir EVB
|
||||
- const: realtek,rtd1619
|
||||
|
||||
- description: RTD1861b SoC based boards
|
||||
items:
|
||||
- enum:
|
||||
- realtek,krypton # Realtek Krypton EVB (8GB)
|
||||
- const: realtek,rtd1861b
|
||||
|
||||
- description: RTD1920s SoC based boards
|
||||
items:
|
||||
- enum:
|
||||
- realtek,smallville # Realtek Smallville EVB (4GB)
|
||||
- const: realtek,rtd1920s
|
||||
|
||||
additionalProperties: true
|
||||
|
||||
...
|
||||
|
|
|
|||
|
|
@ -60,6 +60,12 @@ properties:
|
|||
- anbernic,rg-arc-s
|
||||
- const: rockchip,rk3566
|
||||
|
||||
- description: Anbernic RK3568 Handheld Gaming Console
|
||||
items:
|
||||
- enum:
|
||||
- anbernic,rg-ds
|
||||
- const: rockchip,rk3568
|
||||
|
||||
- description: Ariaboard Photonicat
|
||||
items:
|
||||
- const: ariaboard,photonicat
|
||||
|
|
@ -894,11 +900,15 @@ properties:
|
|||
- const: rockchip,rk3568
|
||||
|
||||
- description: QNAP TS-x33 NAS devices
|
||||
items:
|
||||
- enum:
|
||||
- qnap,ts233
|
||||
- qnap,ts433
|
||||
- const: rockchip,rk3568
|
||||
oneOf:
|
||||
- items:
|
||||
- const: qnap,ts133
|
||||
- const: rockchip,rk3566
|
||||
- items:
|
||||
- enum:
|
||||
- qnap,ts233
|
||||
- qnap,ts433
|
||||
- const: rockchip,rk3568
|
||||
|
||||
- description: Radxa Compute Module 3 (CM3)
|
||||
items:
|
||||
|
|
@ -907,13 +917,27 @@ properties:
|
|||
- const: radxa,cm3
|
||||
- const: rockchip,rk3566
|
||||
|
||||
- description: Radxa CM3 Industrial
|
||||
- description: Radxa CM3I
|
||||
items:
|
||||
- enum:
|
||||
- radxa,e25
|
||||
- const: radxa,cm3i
|
||||
- const: rockchip,rk3568
|
||||
|
||||
- description: Radxa CM3J
|
||||
items:
|
||||
- enum:
|
||||
- radxa,cm3j-rpi-cm4
|
||||
- const: radxa,cm3j
|
||||
- const: rockchip,rk3568
|
||||
|
||||
- description: Radxa CM5
|
||||
items:
|
||||
- enum:
|
||||
- radxa,cm5-io
|
||||
- const: radxa,cm5
|
||||
- const: rockchip,rk3588s
|
||||
|
||||
- description: Radxa E20C
|
||||
items:
|
||||
- const: radxa,e20c
|
||||
|
|
@ -1299,6 +1323,12 @@ properties:
|
|||
- xunlong,orangepi-5b
|
||||
- const: rockchip,rk3588s
|
||||
|
||||
- description: Xunlong Orange Pi CM5
|
||||
items:
|
||||
- const: xunlong,orangepi-cm5-base
|
||||
- const: xunlong,orangepi-cm5
|
||||
- const: rockchip,rk3588s
|
||||
|
||||
- description: Zkmagic A95X Z2
|
||||
items:
|
||||
- const: zkmagic,a95x-z2
|
||||
|
|
|
|||
|
|
@ -19,15 +19,15 @@ properties:
|
|||
- nvidia,tegra264-pmc
|
||||
|
||||
reg:
|
||||
minItems: 4
|
||||
minItems: 3
|
||||
maxItems: 5
|
||||
|
||||
reg-names:
|
||||
minItems: 4
|
||||
minItems: 3
|
||||
items:
|
||||
- const: pmc
|
||||
- const: wake
|
||||
- const: aotag
|
||||
- enum: [ aotag, scratch, misc ]
|
||||
- enum: [ scratch, misc ]
|
||||
- const: misc
|
||||
|
||||
|
|
@ -51,6 +51,7 @@ allOf:
|
|||
then:
|
||||
properties:
|
||||
reg:
|
||||
minItems: 4
|
||||
maxItems: 4
|
||||
reg-names:
|
||||
maxItems: 4
|
||||
|
|
@ -73,7 +74,9 @@ allOf:
|
|||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: nvidia,tegra234-pmc
|
||||
enum:
|
||||
- nvidia,tegra234-pmc
|
||||
- nvidia,tegra264-pmc
|
||||
then:
|
||||
properties:
|
||||
reg-names:
|
||||
|
|
|
|||
|
|
@ -29,9 +29,10 @@ properties:
|
|||
enum:
|
||||
- google,gs101-cmu-top
|
||||
- google,gs101-cmu-apm
|
||||
- google,gs101-cmu-misc
|
||||
- google,gs101-cmu-dpu
|
||||
- google,gs101-cmu-hsi0
|
||||
- google,gs101-cmu-hsi2
|
||||
- google,gs101-cmu-misc
|
||||
- google,gs101-cmu-peric0
|
||||
- google,gs101-cmu-peric1
|
||||
|
||||
|
|
@ -77,6 +78,24 @@ allOf:
|
|||
items:
|
||||
- const: oscclk
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: google,gs101-cmu-dpu
|
||||
|
||||
then:
|
||||
properties:
|
||||
clocks:
|
||||
items:
|
||||
- description: External reference clock (24.576 MHz)
|
||||
- description: DPU bus clock (from CMU_TOP)
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: oscclk
|
||||
- const: bus
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
|
|
|
|||
|
|
@ -62,6 +62,9 @@ properties:
|
|||
- description: USB4_1 PHY max PIPE clock source
|
||||
- description: USB4_2 PHY PCIE PIPE clock source
|
||||
- description: USB4_2 PHY max PIPE clock source
|
||||
- description: UFS PHY RX Symbol 0 clock source
|
||||
- description: UFS PHY RX Symbol 1 clock source
|
||||
- description: UFS PHY TX Symbol 0 clock source
|
||||
|
||||
power-domains:
|
||||
description:
|
||||
|
|
@ -121,7 +124,10 @@ examples:
|
|||
<&usb4_1_phy_pcie_pipe_clk>,
|
||||
<&usb4_1_phy_max_pipe_clk>,
|
||||
<&usb4_2_phy_pcie_pipe_clk>,
|
||||
<&usb4_2_phy_max_pipe_clk>;
|
||||
<&usb4_2_phy_max_pipe_clk>,
|
||||
<&ufs_phy_rx_symbol_0>,
|
||||
<&ufs_phy_rx_symbol_1>,
|
||||
<&ufs_phy_tx_symbol_0>;
|
||||
power-domains = <&rpmhpd RPMHPD_CX>;
|
||||
#clock-cells = <1>;
|
||||
#reset-cells = <1>;
|
||||
|
|
|
|||
|
|
@ -18,6 +18,7 @@ properties:
|
|||
enum:
|
||||
- nvidia,tegra114-mipi
|
||||
- nvidia,tegra124-mipi
|
||||
- nvidia,tegra132-mipi
|
||||
- nvidia,tegra210-mipi
|
||||
- nvidia,tegra186-mipi
|
||||
|
||||
|
|
|
|||
|
|
@ -16,16 +16,21 @@ properties:
|
|||
|
||||
compatible:
|
||||
oneOf:
|
||||
- const: nvidia,tegra20-vi
|
||||
- const: nvidia,tegra30-vi
|
||||
- const: nvidia,tegra114-vi
|
||||
- const: nvidia,tegra124-vi
|
||||
- enum:
|
||||
- nvidia,tegra20-vi
|
||||
- nvidia,tegra114-vi
|
||||
- nvidia,tegra124-vi
|
||||
- nvidia,tegra210-vi
|
||||
- nvidia,tegra186-vi
|
||||
- nvidia,tegra194-vi
|
||||
|
||||
- items:
|
||||
- const: nvidia,tegra30-vi
|
||||
- const: nvidia,tegra20-vi
|
||||
|
||||
- items:
|
||||
- const: nvidia,tegra132-vi
|
||||
- const: nvidia,tegra124-vi
|
||||
- const: nvidia,tegra210-vi
|
||||
- const: nvidia,tegra186-vi
|
||||
- const: nvidia,tegra194-vi
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
|
|
|||
|
|
@ -11,8 +11,13 @@ maintainers:
|
|||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- nvidia,tegra20-vip
|
||||
oneOf:
|
||||
- enum:
|
||||
- nvidia,tegra20-vip
|
||||
|
||||
- items:
|
||||
- const: nvidia,tegra30-vip
|
||||
- const: nvidia,tegra20-vip
|
||||
|
||||
ports:
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
|
|
|||
|
|
@ -46,7 +46,7 @@ properties:
|
|||
Should contain all of the per-channel DMA interrupts in
|
||||
ascending order with respect to the DMA channel index.
|
||||
minItems: 1
|
||||
maxItems: 32
|
||||
maxItems: 64
|
||||
|
||||
clocks:
|
||||
description: Must contain one entry for the ADMA module clock
|
||||
|
|
@ -86,6 +86,19 @@ allOf:
|
|||
reg:
|
||||
items:
|
||||
- description: Full address space range of DMA registers.
|
||||
interrupts:
|
||||
maxItems: 22
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
enum:
|
||||
- nvidia,tegra186-adma
|
||||
then:
|
||||
properties:
|
||||
interrupts:
|
||||
maxItems: 32
|
||||
|
||||
- if:
|
||||
properties:
|
||||
|
|
|
|||
|
|
@ -127,6 +127,9 @@ properties:
|
|||
|
||||
wakeup-source: true
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
access-controllers:
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
|
|
|
|||
|
|
@ -42,6 +42,8 @@ properties:
|
|||
address, thus it can be driven by the host during the reset sequence.
|
||||
maxItems: 1
|
||||
|
||||
panel: true
|
||||
|
||||
reset-gpios:
|
||||
maxItems: 1
|
||||
|
||||
|
|
|
|||
|
|
@ -28,6 +28,7 @@ properties:
|
|||
items:
|
||||
- enum:
|
||||
- qemu,aplic
|
||||
- spacemit,k3-aplic
|
||||
- const: riscv,aplic
|
||||
|
||||
reg:
|
||||
|
|
|
|||
|
|
@ -48,6 +48,7 @@ properties:
|
|||
items:
|
||||
- enum:
|
||||
- qemu,imsics
|
||||
- spacemit,k3-imsics
|
||||
- const: riscv,imsics
|
||||
|
||||
reg:
|
||||
|
|
|
|||
|
|
@ -20,7 +20,12 @@ properties:
|
|||
$nodename:
|
||||
pattern: "^iommu@[0-9a-f]*"
|
||||
compatible:
|
||||
const: arm,smmu-v3
|
||||
oneOf:
|
||||
- const: arm,smmu-v3
|
||||
- items:
|
||||
- enum:
|
||||
- nvidia,tegra264-smmu
|
||||
- const: arm,smmu-v3
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
|
@ -58,6 +63,15 @@ properties:
|
|||
|
||||
msi-parent: true
|
||||
|
||||
nvidia,cmdqv:
|
||||
description: |
|
||||
A phandle to its pairing CMDQV extension for an implementation on NVIDIA
|
||||
Tegra SoC.
|
||||
|
||||
If this property is absent, CMDQ-Virtualization won't be used and SMMU
|
||||
will only use its own CMDQ.
|
||||
$ref: /schemas/types.yaml#/definitions/phandle
|
||||
|
||||
hisilicon,broken-prefetch-cmd:
|
||||
type: boolean
|
||||
description: Avoid sending CMD_PREFETCH_* commands to the SMMU.
|
||||
|
|
@ -69,6 +83,17 @@ properties:
|
|||
register access with page 0 offsets. Set for Cavium ThunderX2 silicon that
|
||||
doesn't support SMMU page1 register space.
|
||||
|
||||
allOf:
|
||||
- if:
|
||||
not:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: nvidia,tegra264-smmu
|
||||
then:
|
||||
properties:
|
||||
nvidia,cmdqv: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
|
|
|||
|
|
@ -0,0 +1,42 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/iommu/nvidia,tegra264-cmdqv.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NVIDIA Tegra264 CMDQV
|
||||
|
||||
description:
|
||||
The CMDQ-Virtualization hardware block is part of the SMMUv3 implementation
|
||||
on Tegra264 SoCs. It assists in virtualizing the command queue for the SMMU.
|
||||
|
||||
maintainers:
|
||||
- Nicolin Chen <nicolinc@nvidia.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: nvidia,tegra264-cmdqv
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
|
||||
cmdqv@5200000 {
|
||||
compatible = "nvidia,tegra264-cmdqv";
|
||||
reg = <0x5200000 0x830000>;
|
||||
interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
|
@ -19,6 +19,8 @@ properties:
|
|||
- items:
|
||||
- enum:
|
||||
- qcom,glymur-cpucp-mbox
|
||||
- qcom,kaanapali-cpucp-mbox
|
||||
- qcom,sm8750-cpucp-mbox
|
||||
- const: qcom,x1e80100-cpucp-mbox
|
||||
- enum:
|
||||
- qcom,x1e80100-cpucp-mbox
|
||||
|
|
|
|||
|
|
@ -24,6 +24,8 @@ properties:
|
|||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- qcom,glymur-ipcc
|
||||
- qcom,kaanapali-ipcc
|
||||
- qcom,milos-ipcc
|
||||
- qcom,qcs8300-ipcc
|
||||
- qcom,qdu1000-ipcc
|
||||
|
|
|
|||
|
|
@ -37,6 +37,9 @@ properties:
|
|||
resets:
|
||||
maxItems: 1
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
access-controllers:
|
||||
minItems: 1
|
||||
maxItems: 2
|
||||
|
|
|
|||
|
|
@ -46,6 +46,9 @@ properties:
|
|||
minItems: 1
|
||||
maxItems: 2
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
ports:
|
||||
$ref: /schemas/graph.yaml#/properties/ports
|
||||
|
||||
|
|
|
|||
|
|
@ -92,10 +92,14 @@ patternProperties:
|
|||
clocks:
|
||||
items:
|
||||
- description: external memory clock
|
||||
- description: data backbone clock
|
||||
minItems: 1
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: emc
|
||||
- const: dbb
|
||||
minItems: 1
|
||||
|
||||
"#interconnect-cells":
|
||||
const: 0
|
||||
|
|
@ -115,6 +119,9 @@ patternProperties:
|
|||
reg:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
|
|
@ -124,6 +131,9 @@ patternProperties:
|
|||
reg:
|
||||
minItems: 2
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
|
|
@ -133,6 +143,9 @@ patternProperties:
|
|||
reg:
|
||||
minItems: 2
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
- if:
|
||||
properties:
|
||||
compatible:
|
||||
|
|
|
|||
102
Documentation/devicetree/bindings/mtd/nvidia,tegra20-nand.yaml
Normal file
102
Documentation/devicetree/bindings/mtd/nvidia,tegra20-nand.yaml
Normal file
|
|
@ -0,0 +1,102 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/mtd/nvidia,tegra20-nand.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: NVIDIA Tegra NAND Flash Controller
|
||||
|
||||
maintainers:
|
||||
- Jonathan Hunter <jonathanh@nvidia.com>
|
||||
|
||||
allOf:
|
||||
- $ref: nand-controller.yaml
|
||||
|
||||
description:
|
||||
The NVIDIA NAND controller provides an interface between NVIDIA SoCs
|
||||
and raw NAND flash devices. It supports standard NAND operations,
|
||||
hardware-assisted ECC, OOB data access, and DMA transfers, and
|
||||
integrates with the Linux MTD NAND subsystem for reliable flash management.
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
const: nvidia,tegra20-nand
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
clock-names:
|
||||
items:
|
||||
- const: nand
|
||||
|
||||
resets:
|
||||
maxItems: 1
|
||||
|
||||
reset-names:
|
||||
items:
|
||||
- const: nand
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
operating-points-v2:
|
||||
maxItems: 1
|
||||
|
||||
patternProperties:
|
||||
'^nand@':
|
||||
type: object
|
||||
description: Individual NAND chip connected to the NAND controller
|
||||
$ref: raw-nand-chip.yaml#
|
||||
|
||||
properties:
|
||||
reg:
|
||||
maximum: 5
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- interrupts
|
||||
- clocks
|
||||
- clock-names
|
||||
- resets
|
||||
- reset-names
|
||||
|
||||
unevaluatedProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/clock/tegra20-car.h>
|
||||
#include <dt-bindings/gpio/tegra-gpio.h>
|
||||
|
||||
nand-controller@70008000 {
|
||||
compatible = "nvidia,tegra20-nand";
|
||||
reg = <0x70008000 0x100>;
|
||||
interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&tegra_car TEGRA20_CLK_NDFLASH>;
|
||||
clock-names = "nand";
|
||||
resets = <&tegra_car 13>;
|
||||
reset-names = "nand";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
nand@0 {
|
||||
reg = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
nand-bus-width = <8>;
|
||||
nand-on-flash-bbt;
|
||||
nand-ecc-algo = "bch";
|
||||
nand-ecc-strength = <8>;
|
||||
wp-gpios = <&gpio TEGRA_GPIO(S, 0) GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
...
|
||||
|
|
@ -1,64 +0,0 @@
|
|||
NVIDIA Tegra NAND Flash controller
|
||||
|
||||
Required properties:
|
||||
- compatible: Must be one of:
|
||||
- "nvidia,tegra20-nand"
|
||||
- reg: MMIO address range
|
||||
- interrupts: interrupt output of the NFC controller
|
||||
- clocks: Must contain an entry for each entry in clock-names.
|
||||
See ../clocks/clock-bindings.txt for details.
|
||||
- clock-names: Must include the following entries:
|
||||
- nand
|
||||
- resets: Must contain an entry for each entry in reset-names.
|
||||
See ../reset/reset.txt for details.
|
||||
- reset-names: Must include the following entries:
|
||||
- nand
|
||||
|
||||
Optional children nodes:
|
||||
Individual NAND chips are children of the NAND controller node. Currently
|
||||
only one NAND chip supported.
|
||||
|
||||
Required children node properties:
|
||||
- reg: An integer ranging from 1 to 6 representing the CS line to use.
|
||||
|
||||
Optional children node properties:
|
||||
- nand-ecc-mode: String, operation mode of the NAND ecc mode. Currently only
|
||||
"hw" is supported.
|
||||
- nand-ecc-algo: string, algorithm of NAND ECC.
|
||||
Supported values with "hw" ECC mode are: "rs", "bch".
|
||||
- nand-bus-width : See nand-controller.yaml
|
||||
- nand-on-flash-bbt: See nand-controller.yaml
|
||||
- nand-ecc-strength: integer representing the number of bits to correct
|
||||
per ECC step (always 512). Supported strength using HW ECC
|
||||
modes are:
|
||||
- RS: 4, 6, 8
|
||||
- BCH: 4, 8, 14, 16
|
||||
- nand-ecc-maximize: See nand-controller.yaml
|
||||
- nand-is-boot-medium: Makes sure only ECC strengths supported by the boot ROM
|
||||
are chosen.
|
||||
- wp-gpios: GPIO specifier for the write protect pin.
|
||||
|
||||
Optional child node of NAND chip nodes:
|
||||
Partitions: see mtd.yaml
|
||||
|
||||
Example:
|
||||
nand-controller@70008000 {
|
||||
compatible = "nvidia,tegra20-nand";
|
||||
reg = <0x70008000 0x100>;
|
||||
interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&tegra_car TEGRA20_CLK_NDFLASH>;
|
||||
clock-names = "nand";
|
||||
resets = <&tegra_car 13>;
|
||||
reset-names = "nand";
|
||||
|
||||
nand@0 {
|
||||
reg = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
nand-bus-width = <8>;
|
||||
nand-on-flash-bbt;
|
||||
nand-ecc-algo = "bch";
|
||||
nand-ecc-strength = <8>;
|
||||
wp-gpios = <&gpio TEGRA_GPIO(S, 0) GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
|
@ -38,6 +38,9 @@ properties:
|
|||
reg:
|
||||
maxItems: 1
|
||||
|
||||
"#address-cells":
|
||||
const: 0
|
||||
|
||||
interrupts:
|
||||
maxItems: 1
|
||||
|
||||
|
|
|
|||
|
|
@ -61,6 +61,7 @@ properties:
|
|||
- sifive,u7
|
||||
- sifive,u74
|
||||
- sifive,u74-mc
|
||||
- spacemit,x100
|
||||
- spacemit,x60
|
||||
- thead,c906
|
||||
- thead,c908
|
||||
|
|
|
|||
|
|
@ -24,12 +24,6 @@ description: |
|
|||
ratified states, with the exception of the I, Zicntr & Zihpm extensions.
|
||||
See the "i" property for more information.
|
||||
|
||||
select:
|
||||
properties:
|
||||
compatible:
|
||||
contains:
|
||||
const: riscv
|
||||
|
||||
properties:
|
||||
riscv,isa:
|
||||
description:
|
||||
|
|
@ -109,6 +103,13 @@ properties:
|
|||
The standard C extension for compressed instructions, as ratified in
|
||||
the 20191213 version of the unprivileged ISA specification.
|
||||
|
||||
- const: b
|
||||
description:
|
||||
The standard B extension for bit manipulation instructions, as
|
||||
ratified in the 20240411 version of the unprivileged ISA
|
||||
specification. The B standard extension comprises instructions
|
||||
provided by the Zba, Zbb, and Zbs extensions.
|
||||
|
||||
- const: v
|
||||
description:
|
||||
The standard V extension for vector operations, as ratified
|
||||
|
|
@ -117,10 +118,62 @@ properties:
|
|||
|
||||
- const: h
|
||||
description:
|
||||
The standard H extension for hypervisors as ratified in the 20191213
|
||||
version of the privileged ISA specification.
|
||||
The standard H extension for hypervisors as ratified in the RISC-V
|
||||
Instruction Set Manual, Volume II Privileged Architecture,
|
||||
Document Version 20211203.
|
||||
|
||||
# multi-letter extensions, sorted alphanumerically
|
||||
- const: sha
|
||||
description: |
|
||||
The standard Sha extension for augmented hypervisor extension as
|
||||
ratified in RVA23 Profiles Version 1.0, with commit 0273f3c921b6
|
||||
("rva23/rvb23 ratified").
|
||||
|
||||
Sha captures the full set of features that are mandated to be
|
||||
supported along with the H extension. Sha comprises the following
|
||||
extensions: H, Shcounterenw, Shgatpa, Shtvala, Shvsatpa, Shvstvala,
|
||||
Shvstvecd, and Ssstateen.
|
||||
|
||||
- const: shcounterenw
|
||||
description: |
|
||||
The standard Shcounterenw extension for support writable enables
|
||||
in hcounteren for any supported counter, as ratified in RISC-V
|
||||
Profiles Version 1.0, with commit b1d806605f87 ("Updated to
|
||||
ratified state.")
|
||||
|
||||
- const: shgatpa
|
||||
description: |
|
||||
The standard Shgatpa extension indicates that for each supported
|
||||
virtual memory scheme SvNN supported in satp, the corresponding
|
||||
hgatp SvNNx4 mode must be supported. The hgatp mode Bare must
|
||||
also be supported. It is ratified in RISC-V Profiles Version 1.0,
|
||||
with commit b1d806605f87 ("Updated to ratified state.")
|
||||
|
||||
- const: shtvala
|
||||
description: |
|
||||
The standard Shtvala extension for htval be written with the
|
||||
faulting guest physical address in all circumstances permitted by
|
||||
the ISA. It is ratified in RISC-V Profiles Version 1.0, with
|
||||
commit b1d806605f87 ("Updated to ratified state.")
|
||||
|
||||
- const: shvsatpa
|
||||
description: |
|
||||
The standard Shvsatpa extension for vsatp supporting all translation
|
||||
modes supported in satp, as ratified in RISC-V Profiles Version 1.0,
|
||||
with commit b1d806605f87 ("Updated to ratified state.")
|
||||
|
||||
- const: shvstvala
|
||||
description: |
|
||||
The standard Shvstvala extension for vstval provides all needed
|
||||
values as ratified in RISC-V Profiles Version 1.0, with commit
|
||||
b1d806605f87 ("Updated to ratified state.")
|
||||
|
||||
- const: shvstvecd
|
||||
description: |
|
||||
The standard Shvstvecd extension for vstvec supporting Direct mode,
|
||||
as ratified in RISC-V Profiles Version 1.0, with commit b1d806605f87
|
||||
("Updated to ratified state.")
|
||||
|
||||
- const: smaia
|
||||
description: |
|
||||
The standard Smaia supervisor-level extension for the advanced
|
||||
|
|
@ -153,24 +206,62 @@ properties:
|
|||
behavioural changes to interrupts as frozen at commit ccbddab
|
||||
("Merge pull request #42 from riscv/jhauser-2023-RC4") of riscv-aia.
|
||||
|
||||
- const: ssccptr
|
||||
description: |
|
||||
The standard Ssccptr extension for main memory (cacheability and
|
||||
coherence) hardware page-table reads, as ratified in RISC-V
|
||||
Profiles Version 1.0, with commit b1d806605f87 ("Updated to
|
||||
ratified state.")
|
||||
|
||||
- const: sscofpmf
|
||||
description: |
|
||||
The standard Sscofpmf supervisor-level extension for count overflow
|
||||
and mode-based filtering as ratified at commit 01d1df0 ("Add ability
|
||||
to manually trigger workflow. (#2)") of riscv-count-overflow.
|
||||
|
||||
- const: sscounterenw
|
||||
description: |
|
||||
The standard Sscounterenw extension for support writable enables
|
||||
in scounteren for any supported counter, as ratified in RISC-V
|
||||
Profiles Version 1.0, with commit b1d806605f87 ("Updated to
|
||||
ratified state.")
|
||||
|
||||
- const: ssnpm
|
||||
description: |
|
||||
The standard Ssnpm extension for next-mode pointer masking as
|
||||
ratified at commit d70011dde6c2 ("Update to ratified state")
|
||||
of riscv-j-extension.
|
||||
|
||||
- const: ssstateen
|
||||
description: |
|
||||
The standard Ssstateen extension for supervisor-mode view of the
|
||||
state-enable extension, as ratified in RISC-V Profiles Version 1.0,
|
||||
with commit b1d806605f87 ("Updated to ratified state.")
|
||||
|
||||
- const: sstc
|
||||
description: |
|
||||
The standard Sstc supervisor-level extension for time compare as
|
||||
ratified at commit 3f9ed34 ("Add ability to manually trigger
|
||||
workflow. (#2)") of riscv-time-compare.
|
||||
|
||||
- const: sstvala
|
||||
description: |
|
||||
The standard Sstvala extension for stval provides all needed values
|
||||
as ratified in RISC-V Profiles Version 1.0, with commit b1d806605f87
|
||||
("Updated to ratified state.")
|
||||
|
||||
- const: sstvecd
|
||||
description: |
|
||||
The standard Sstvecd extension for stvec supports Direct mode as
|
||||
ratified in RISC-V Profiles Version 1.0, with commit b1d806605f87
|
||||
("Updated to ratified state.")
|
||||
|
||||
- const: ssu64xl
|
||||
description: |
|
||||
The standard Ssu64xl extension for UXLEN=64 must be supported, as
|
||||
ratified in RISC-V Profiles Version 1.0, with commit b1d806605f87
|
||||
("Updated to ratified state.")
|
||||
|
||||
- const: svade
|
||||
description: |
|
||||
The standard Svade supervisor-level extension for SW-managed PTE A/D
|
||||
|
|
@ -202,20 +293,22 @@ properties:
|
|||
- const: svinval
|
||||
description:
|
||||
The standard Svinval supervisor-level extension for fine-grained
|
||||
address-translation cache invalidation as ratified in the 20191213
|
||||
version of the privileged ISA specification.
|
||||
address-translation cache invalidation as ratified in the RISC-V
|
||||
Instruction Set Manual, Volume II Privileged Architecture,
|
||||
Document Version 20211203.
|
||||
|
||||
- const: svnapot
|
||||
description:
|
||||
The standard Svnapot supervisor-level extensions for napot
|
||||
translation contiguity as ratified in the 20191213 version of the
|
||||
privileged ISA specification.
|
||||
translation contiguity as ratified in the RISC-V Instruction Set
|
||||
Manual, Volume II Privileged Architecture, Document Version
|
||||
20211203.
|
||||
|
||||
- const: svpbmt
|
||||
description:
|
||||
The standard Svpbmt supervisor-level extensions for page-based
|
||||
memory types as ratified in the 20191213 version of the privileged
|
||||
ISA specification.
|
||||
memory types as ratified in the RISC-V Instruction Set Manual,
|
||||
Volume II Privileged Architecture, Document Version 20211203.
|
||||
|
||||
- const: svrsw60t59b
|
||||
description:
|
||||
|
|
@ -230,6 +323,12 @@ properties:
|
|||
as ratified at commit 4a69197e5617 ("Update to ratified state") of
|
||||
riscv-svvptc.
|
||||
|
||||
- const: za64rs
|
||||
description:
|
||||
The standard Za64rs extension for reservation set size of at most
|
||||
64 bytes, as ratified in RISC-V Profiles Version 1.0, with commit
|
||||
b1d806605f87 ("Updated to ratified state.")
|
||||
|
||||
- const: zaamo
|
||||
description: |
|
||||
The standard Zaamo extension for atomic memory operations as
|
||||
|
|
@ -371,6 +470,27 @@ properties:
|
|||
in commit 64074bc ("Update version numbers for Zfh/Zfinx") of
|
||||
riscv-isa-manual.
|
||||
|
||||
- const: ziccamoa
|
||||
description:
|
||||
The standard Ziccamoa extension for main memory (cacheability and
|
||||
coherence) must support all atomics in A, as ratified in RISC-V
|
||||
Profiles Version 1.0, with commit b1d806605f87 ("Updated to
|
||||
ratified state.")
|
||||
|
||||
- const: ziccif
|
||||
description:
|
||||
The standard Ziccif extension for main memory (cacheability and
|
||||
coherence) instruction fetch atomicity, as ratified in RISC-V
|
||||
Profiles Version 1.0, with commit b1d806605f87 ("Updated to
|
||||
ratified state.")
|
||||
|
||||
- const: zicclsm
|
||||
description:
|
||||
The standard Zicclsm extension for main memory (cacheability and
|
||||
coherence) must support misaligned loads and stores, as ratified
|
||||
in RISC-V Profiles Version 1.0, with commit b1d806605f87 ("Updated
|
||||
to ratified state.")
|
||||
|
||||
- const: ziccrse
|
||||
description:
|
||||
The standard Ziccrse extension which provides forward progress
|
||||
|
|
@ -749,6 +869,42 @@ properties:
|
|||
then:
|
||||
contains:
|
||||
const: f
|
||||
# B comprises Zba, Zbb, and Zbs
|
||||
- if:
|
||||
contains:
|
||||
const: b
|
||||
then:
|
||||
allOf:
|
||||
- contains:
|
||||
const: zba
|
||||
- contains:
|
||||
const: zbb
|
||||
- contains:
|
||||
const: zbs
|
||||
# Zba, Zbb, Zbs together require B
|
||||
- if:
|
||||
allOf:
|
||||
- contains:
|
||||
const: zba
|
||||
- contains:
|
||||
const: zbb
|
||||
- contains:
|
||||
const: zbs
|
||||
then:
|
||||
contains:
|
||||
const: b
|
||||
# Za64rs and Ziccrse depend on Zalrsc or A
|
||||
- if:
|
||||
contains:
|
||||
anyOf:
|
||||
- const: za64rs
|
||||
- const: ziccrse
|
||||
then:
|
||||
oneOf:
|
||||
- contains:
|
||||
const: zalrsc
|
||||
- contains:
|
||||
const: a
|
||||
# Zcb depends on Zca
|
||||
- if:
|
||||
contains:
|
||||
|
|
@ -790,6 +946,16 @@ properties:
|
|||
then:
|
||||
contains:
|
||||
const: f
|
||||
# Ziccamoa depends on Zaamo or A
|
||||
- if:
|
||||
contains:
|
||||
const: ziccamoa
|
||||
then:
|
||||
oneOf:
|
||||
- contains:
|
||||
const: zaamo
|
||||
- contains:
|
||||
const: a
|
||||
# Zvfbfmin depends on V or Zve32f
|
||||
- if:
|
||||
contains:
|
||||
|
|
|
|||
|
|
@ -7,6 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
|
|||
title: SpacemiT SoC-based boards
|
||||
|
||||
maintainers:
|
||||
- Guodong Xu <guodong@riscstar.com>
|
||||
- Yangyu Chen <cyy@cyyself.name>
|
||||
- Yixun Lan <dlan@gentoo.org>
|
||||
|
||||
|
|
@ -26,6 +27,10 @@ properties:
|
|||
- xunlong,orangepi-r2s
|
||||
- xunlong,orangepi-rv2
|
||||
- const: spacemit,k1
|
||||
- items:
|
||||
- enum:
|
||||
- spacemit,k3-pico-itx
|
||||
- const: spacemit,k3
|
||||
|
||||
additionalProperties: true
|
||||
|
||||
|
|
|
|||
|
|
@ -41,6 +41,7 @@ properties:
|
|||
- starfive,visionfive-2-lite
|
||||
- starfive,visionfive-2-lite-emmc
|
||||
- const: starfive,jh7110s
|
||||
- const: starfive,jh7110
|
||||
|
||||
additionalProperties: true
|
||||
|
||||
|
|
|
|||
|
|
@ -12,9 +12,13 @@ maintainers:
|
|||
|
||||
properties:
|
||||
compatible:
|
||||
enum:
|
||||
- samsung,exynos5250-trng
|
||||
- samsung,exynos850-trng
|
||||
oneOf:
|
||||
- enum:
|
||||
- samsung,exynos5250-trng
|
||||
- samsung,exynos850-trng
|
||||
- items:
|
||||
- const: google,gs101-trng
|
||||
- const: samsung,exynos850-trng
|
||||
|
||||
clocks:
|
||||
minItems: 1
|
||||
|
|
@ -24,6 +28,9 @@ properties:
|
|||
minItems: 1
|
||||
maxItems: 2
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
|
|
|
|||
|
|
@ -13,7 +13,9 @@ properties:
|
|||
compatible:
|
||||
oneOf:
|
||||
- description: Cyclone5/Arria5/Arria10
|
||||
const: altr,sys-mgr
|
||||
items:
|
||||
- const: altr,sys-mgr
|
||||
- const: syscon
|
||||
- description: Stratix10 SoC
|
||||
items:
|
||||
- const: altr,sys-mgr-s10
|
||||
|
|
@ -45,7 +47,7 @@ additionalProperties: false
|
|||
examples:
|
||||
- |
|
||||
sysmgr@ffd08000 {
|
||||
compatible = "altr,sys-mgr";
|
||||
compatible = "altr,sys-mgr", "syscon";
|
||||
reg = <0xffd08000 0x1000>;
|
||||
cpu1-start-addr = <0xffd080c4>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -0,0 +1,87 @@
|
|||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||
%YAML 1.2
|
||||
---
|
||||
$id: http://devicetree.org/schemas/soc/renesas/renesas,rzn1-gpioirqmux.yaml#
|
||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||
|
||||
title: Renesas RZ/N1 SoCs GPIO Interrupt Multiplexer
|
||||
|
||||
description: |
|
||||
The Renesas RZ/N1 GPIO Interrupt Multiplexer multiplexes GPIO interrupt
|
||||
lines to the interrupt controller available in the SoC.
|
||||
|
||||
It selects up to 8 of the 96 GPIO interrupt lines available and connect them
|
||||
to 8 output interrupt lines.
|
||||
|
||||
maintainers:
|
||||
- Herve Codina <herve.codina@bootlin.com>
|
||||
|
||||
properties:
|
||||
compatible:
|
||||
items:
|
||||
- enum:
|
||||
- renesas,r9a06g032-gpioirqmux
|
||||
- const: renesas,rzn1-gpioirqmux
|
||||
|
||||
reg:
|
||||
maxItems: 1
|
||||
|
||||
"#address-cells":
|
||||
const: 0
|
||||
|
||||
"#interrupt-cells":
|
||||
const: 1
|
||||
|
||||
interrupt-map-mask:
|
||||
items:
|
||||
- const: 0x7f
|
||||
|
||||
interrupt-map:
|
||||
description: |
|
||||
Specifies the mapping from external GPIO interrupt lines to the output
|
||||
interrupts. The array has up to 8 items defining the mapping related to
|
||||
the output line 0 (GIC 103) up to the output line 7 (GIC 110).
|
||||
|
||||
The child interrupt number set in arrays items is computed using the
|
||||
following formula:
|
||||
gpio_bank * 32 + gpio_number
|
||||
with:
|
||||
- gpio_bank: The GPIO bank number
|
||||
- 0 for GPIO0A,
|
||||
- 1 for GPIO1A,
|
||||
- 2 for GPIO2A
|
||||
- gpio_number: Number of the gpio in the bank (0..31)
|
||||
minItems: 1
|
||||
maxItems: 8
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
- "#address-cells"
|
||||
- "#interrupt-cells"
|
||||
- interrupt-map-mask
|
||||
- interrupt-map
|
||||
|
||||
additionalProperties: false
|
||||
|
||||
examples:
|
||||
- |
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
|
||||
gic: interrupt-controller {
|
||||
interrupt-controller;
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <3>;
|
||||
};
|
||||
|
||||
interrupt-controller@51000480 {
|
||||
compatible = "renesas,r9a06g032-gpioirqmux", "renesas,rzn1-gpioirqmux";
|
||||
reg = <0x51000480 0x20>;
|
||||
#address-cells = <0>;
|
||||
#interrupt-cells = <1>;
|
||||
interrupt-map-mask = <0x7f>;
|
||||
interrupt-map =
|
||||
<32 &gic GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>, /* line 0, GPIO1A.0 */
|
||||
<89 &gic GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, /* line 1, GPIO2A.25 */
|
||||
<9 &gic GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; /* line 3, GPIO0A.9 */
|
||||
};
|
||||
|
|
@ -12,9 +12,10 @@ maintainers:
|
|||
properties:
|
||||
compatible:
|
||||
oneOf:
|
||||
- enum:
|
||||
- google,gs101-pmu
|
||||
- items:
|
||||
- enum:
|
||||
- google,gs101-pmu
|
||||
- samsung,exynos3250-pmu
|
||||
- samsung,exynos4210-pmu
|
||||
- samsung,exynos4212-pmu
|
||||
|
|
|
|||
|
|
@ -33,6 +33,7 @@ properties:
|
|||
- eswin,eic7700-clint # ESWIN EIC7700
|
||||
- sifive,fu540-c000-clint # SiFive FU540
|
||||
- spacemit,k1-clint # SpacemiT K1
|
||||
- spacemit,k3-clint # SpacemiT K3
|
||||
- starfive,jh7100-clint # StarFive JH7100
|
||||
- starfive,jh7110-clint # StarFive JH7110
|
||||
- starfive,jh8100-clint # StarFive JH8100
|
||||
|
|
|
|||
|
|
@ -33,6 +33,7 @@ properties:
|
|||
- infineon,slb9673
|
||||
- nuvoton,npct75x
|
||||
- st,st33ktpm2xi2c
|
||||
- st,st33tphf2ei2c
|
||||
- const: tcg,tpm-tis-i2c
|
||||
|
||||
- description: TPM 1.2 and 2.0 chips with vendor-specific I²C interface
|
||||
|
|
|
|||
|
|
@ -158,6 +158,8 @@ patternProperties:
|
|||
description: Arctic Sand
|
||||
"^arcx,.*":
|
||||
description: arcx Inc. / Archronix Inc.
|
||||
"^arduino,.*":
|
||||
description: Arduino SRL
|
||||
"^argon40,.*":
|
||||
description: Argon 40 Technologies Limited
|
||||
"^ariaboard,.*":
|
||||
|
|
@ -555,6 +557,8 @@ patternProperties:
|
|||
description: Exegin Technologies Limited
|
||||
"^ezchip,.*":
|
||||
description: EZchip Semiconductor
|
||||
"^ezurio,.*":
|
||||
description: Ezurio LLC
|
||||
"^facebook,.*":
|
||||
description: Facebook
|
||||
"^fairchild,.*":
|
||||
|
|
@ -755,6 +759,8 @@ patternProperties:
|
|||
description: IEI Integration Corp.
|
||||
"^ifi,.*":
|
||||
description: Ingenieurburo Fur Ic-Technologie (I/F/I)
|
||||
"^ifm,.*":
|
||||
description: ifm electronic gmbh
|
||||
"^ilitek,.*":
|
||||
description: ILI Technology Corporation (ILITEK)
|
||||
"^imagis,.*":
|
||||
|
|
@ -995,6 +1001,8 @@ patternProperties:
|
|||
description: Mustek Limited
|
||||
"^mediatek,.*":
|
||||
description: MediaTek Inc.
|
||||
"^medion,.*":
|
||||
description: Medion AG
|
||||
"^megachips,.*":
|
||||
description: MegaChips
|
||||
"^mele,.*":
|
||||
|
|
@ -1697,6 +1705,8 @@ patternProperties:
|
|||
description: Theobroma Systems Design und Consulting GmbH
|
||||
"^turing,.*":
|
||||
description: Turing Machines, Inc.
|
||||
"^tuxedo,.*":
|
||||
description: TUXEDO Computers GmbH
|
||||
"^tyan,.*":
|
||||
description: Tyan Computer Corporation
|
||||
"^tyhx,.*":
|
||||
|
|
|
|||
|
|
@ -43,6 +43,7 @@ properties:
|
|||
- qcom,apss-wdt-sm6350
|
||||
- qcom,apss-wdt-sm8150
|
||||
- qcom,apss-wdt-sm8250
|
||||
- qcom,apss-wdt-x1e80100
|
||||
- const: qcom,kpss-wdt
|
||||
- const: qcom,kpss-wdt
|
||||
deprecated: true
|
||||
|
|
|
|||
|
|
@ -32,6 +32,9 @@ properties:
|
|||
clocks:
|
||||
maxItems: 1
|
||||
|
||||
power-domains:
|
||||
maxItems: 1
|
||||
|
||||
required:
|
||||
- compatible
|
||||
- reg
|
||||
|
|
|
|||
|
|
@ -2947,6 +2947,7 @@ S: Maintained
|
|||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu.git
|
||||
F: Documentation/devicetree/bindings/arm/marvell/
|
||||
F: arch/arm/boot/dts/marvell/armada*
|
||||
F: arch/arm/boot/dts/marvell/db-falcon*
|
||||
F: arch/arm/boot/dts/marvell/kirkwood*
|
||||
F: arch/arm/configs/mvebu_*_defconfig
|
||||
F: arch/arm/mach-mvebu/
|
||||
|
|
@ -25738,7 +25739,7 @@ TEGRA NAND DRIVER
|
|||
M: Stefan Agner <stefan@agner.ch>
|
||||
M: Lucas Stach <dev@lynxeye.de>
|
||||
S: Maintained
|
||||
F: Documentation/devicetree/bindings/mtd/nvidia-tegra20-nand.txt
|
||||
F: Documentation/devicetree/bindings/mtd/nvidia,tegra20-nand.yaml
|
||||
F: drivers/mtd/nand/raw/tegra_nand.c
|
||||
|
||||
TEGRA PWM DRIVER
|
||||
|
|
|
|||
|
|
@ -112,7 +112,7 @@
|
|||
|
||||
&i2c1 {
|
||||
/* pull-ups and devices require AXP209 LDO3 */
|
||||
status = "failed";
|
||||
status = "fail";
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
|
|
|
|||
|
|
@ -96,7 +96,7 @@
|
|||
|
||||
&i2c1 {
|
||||
/* pull-ups and devices require AXP209 LDO3 */
|
||||
status = "failed";
|
||||
status = "fail";
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
|
|
|
|||
|
|
@ -102,6 +102,7 @@
|
|||
/* The P66 uses a different EINT then the reference design */
|
||||
interrupts = <6 9 IRQ_TYPE_EDGE_FALLING>; /* EINT9 (PG9) */
|
||||
/* The icn8318 binding expects wake-gpios instead of power-gpios */
|
||||
/delete-property/ power-gpios;
|
||||
wake-gpios = <&pio 1 3 GPIO_ACTIVE_HIGH>; /* PB3 */
|
||||
touchscreen-size-x = <800>;
|
||||
touchscreen-size-y = <480>;
|
||||
|
|
|
|||
|
|
@ -170,7 +170,7 @@
|
|||
|
||||
&i2c0 {
|
||||
/* pull-ups and devices require AXP221 DLDO3 */
|
||||
status = "failed";
|
||||
status = "fail";
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
|
|
|
|||
|
|
@ -90,7 +90,7 @@
|
|||
|
||||
&i2c0 {
|
||||
/* pull-ups and device VDDIO use AXP221 DLDO3 */
|
||||
status = "failed";
|
||||
status = "fail";
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
|
|
|
|||
|
|
@ -4,6 +4,7 @@
|
|||
#define SOC_PERIPHERAL_IRQ(nr) GIC_SPI nr
|
||||
|
||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||
#include <dt-bindings/thermal/thermal.h>
|
||||
#include <riscv/allwinner/sunxi-d1s-t113.dtsi>
|
||||
#include <riscv/allwinner/sunxi-d1-t113.dtsi>
|
||||
|
||||
|
|
@ -20,6 +21,7 @@
|
|||
reg = <0>;
|
||||
clocks = <&ccu CLK_CPUX>;
|
||||
clock-names = "cpu";
|
||||
#cooling-cells = <2>;
|
||||
};
|
||||
|
||||
cpu1: cpu@1 {
|
||||
|
|
@ -28,6 +30,7 @@
|
|||
reg = <1>;
|
||||
clocks = <&ccu CLK_CPUX>;
|
||||
clock-names = "cpu";
|
||||
#cooling-cells = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -56,4 +59,34 @@
|
|||
<GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-affinity = <&cpu0>, <&cpu1>;
|
||||
};
|
||||
|
||||
thermal-zones {
|
||||
cpu-thermal {
|
||||
polling-delay-passive = <0>;
|
||||
polling-delay = <0>;
|
||||
thermal-sensors = <&ths>;
|
||||
|
||||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&cpu_alert>;
|
||||
cooling-device = <&cpu0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
|
||||
<&cpu1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
|
||||
};
|
||||
};
|
||||
|
||||
trips {
|
||||
cpu_alert: cpu-alert {
|
||||
temperature = <85000>;
|
||||
hysteresis = <2000>;
|
||||
type = "passive";
|
||||
};
|
||||
|
||||
cpu-crit {
|
||||
temperature = <100000>;
|
||||
hysteresis = <0>;
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -12,11 +12,6 @@
|
|||
#size-cells = <1>;
|
||||
interrupt-parent = <&gic>;
|
||||
|
||||
iio-hwmon {
|
||||
compatible = "iio-hwmon";
|
||||
io-channels = <&saradc 8>;
|
||||
};
|
||||
|
||||
soc {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
|
|
|
|||
|
|
@ -420,7 +420,7 @@
|
|||
compatible = "arm,vexpress,config-bus";
|
||||
arm,vexpress,config-bridge = <&v2m_sysreg>;
|
||||
|
||||
oscclk0 {
|
||||
clock-controller-0 {
|
||||
/* MCC static memory clock */
|
||||
compatible = "arm,vexpress-osc";
|
||||
arm,vexpress-sysreg,func = <1 0>;
|
||||
|
|
@ -429,7 +429,7 @@
|
|||
clock-output-names = "v2m:oscclk0";
|
||||
};
|
||||
|
||||
v2m_oscclk1: oscclk1 {
|
||||
v2m_oscclk1: clock-controller-1 {
|
||||
/* CLCD clock */
|
||||
compatible = "arm,vexpress-osc";
|
||||
arm,vexpress-sysreg,func = <1 1>;
|
||||
|
|
@ -438,7 +438,7 @@
|
|||
clock-output-names = "v2m:oscclk1";
|
||||
};
|
||||
|
||||
v2m_oscclk2: oscclk2 {
|
||||
v2m_oscclk2: clock-controller-2 {
|
||||
/* IO FPGA peripheral clock */
|
||||
compatible = "arm,vexpress-osc";
|
||||
arm,vexpress-sysreg,func = <1 2>;
|
||||
|
|
@ -447,7 +447,7 @@
|
|||
clock-output-names = "v2m:oscclk2";
|
||||
};
|
||||
|
||||
volt-vio {
|
||||
regulator-vio {
|
||||
/* Logic level voltage */
|
||||
compatible = "arm,vexpress-volt";
|
||||
arm,vexpress-sysreg,func = <2 0>;
|
||||
|
|
|
|||
|
|
@ -9,6 +9,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
|
|||
aspeed-bmc-ampere-mtjefferson.dtb \
|
||||
aspeed-bmc-ampere-mtmitchell.dtb \
|
||||
aspeed-bmc-arm-stardragon4800-rep2.dtb \
|
||||
aspeed-bmc-asrock-altrad8.dtb \
|
||||
aspeed-bmc-asrock-e3c246d4i.dtb \
|
||||
aspeed-bmc-asrock-e3c256d4i.dtb \
|
||||
aspeed-bmc-asrock-romed8hm3.dtb \
|
||||
|
|
@ -17,6 +18,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
|
|||
aspeed-bmc-asus-x4tf.dtb \
|
||||
aspeed-bmc-bytedance-g220a.dtb \
|
||||
aspeed-bmc-delta-ahe50dc.dtb \
|
||||
aspeed-bmc-facebook-anacapa.dtb \
|
||||
aspeed-bmc-facebook-bletchley.dtb \
|
||||
aspeed-bmc-facebook-catalina.dtb \
|
||||
aspeed-bmc-facebook-clemente.dtb \
|
||||
|
|
@ -58,6 +60,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
|
|||
aspeed-bmc-lenovo-hr855xg2.dtb \
|
||||
aspeed-bmc-microsoft-olympus.dtb \
|
||||
aspeed-bmc-nvidia-gb200nvl-bmc.dtb \
|
||||
aspeed-bmc-nvidia-msx4-bmc.dtb \
|
||||
aspeed-bmc-opp-lanyang.dtb \
|
||||
aspeed-bmc-opp-mowgli.dtb \
|
||||
aspeed-bmc-opp-nicole.dtb \
|
||||
|
|
|
|||
|
|
@ -205,6 +205,7 @@
|
|||
&uart5 {
|
||||
// Workaround for A0
|
||||
compatible = "snps,dw-apb-uart";
|
||||
/delete-property/ no-loopback-test;
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
|
|
@ -314,9 +315,8 @@
|
|||
status = "okay";
|
||||
bus-width = <4>;
|
||||
max-frequency = <100000000>;
|
||||
sdhci-drive-type = /bits/ 8 <3>;
|
||||
sdhci-caps-mask = <0x7 0x0>;
|
||||
sdhci,wp-inverted;
|
||||
wp-inverted;
|
||||
vmmc-supply = <&vcc_sdhci0>;
|
||||
vqmmc-supply = <&vccq_sdhci0>;
|
||||
clk-phase-sd-hs = <7>, <200>;
|
||||
|
|
@ -326,9 +326,8 @@
|
|||
status = "okay";
|
||||
bus-width = <4>;
|
||||
max-frequency = <100000000>;
|
||||
sdhci-drive-type = /bits/ 8 <3>;
|
||||
sdhci-caps-mask = <0x7 0x0>;
|
||||
sdhci,wp-inverted;
|
||||
wp-inverted;
|
||||
vmmc-supply = <&vcc_sdhci1>;
|
||||
vqmmc-supply = <&vccq_sdhci1>;
|
||||
clk-phase-sd-hs = <7>, <200>;
|
||||
|
|
|
|||
637
arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-altrad8.dts
Normal file
637
arch/arm/boot/dts/aspeed/aspeed-bmc-asrock-altrad8.dts
Normal file
|
|
@ -0,0 +1,637 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/dts-v1/;
|
||||
|
||||
#include "aspeed-g5.dtsi"
|
||||
#include <dt-bindings/gpio/aspeed-gpio.h>
|
||||
#include <dt-bindings/leds/common.h>
|
||||
#include <dt-bindings/i2c/i2c.h>
|
||||
|
||||
/ {
|
||||
model = "ASRock ALTRAD8 BMC";
|
||||
compatible = "asrock,altrad8-bmc", "aspeed,ast2500";
|
||||
|
||||
aliases {
|
||||
serial4 = &uart5;
|
||||
i2c50 = &nvme1;
|
||||
i2c51 = &pcie4;
|
||||
i2c52 = &pcie5;
|
||||
i2c53 = &pcie6;
|
||||
i2c54 = &pcie7;
|
||||
i2c55 = &nvme3;
|
||||
i2c56 = &nvme2;
|
||||
i2c57 = &nvme0;
|
||||
i2c58 = &nvme4;
|
||||
i2c59 = &nvme5;
|
||||
i2c60 = &nvme6;
|
||||
i2c61 = &nvme7;
|
||||
i2c62 = &nvme8;
|
||||
i2c63 = &nvme9;
|
||||
i2c64 = &nvme10;
|
||||
i2c65 = &nvme11;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = "uart5:115200n8";
|
||||
};
|
||||
|
||||
iio-hwmon {
|
||||
compatible = "iio-hwmon";
|
||||
io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
|
||||
<&adc 4> ,<&adc 5>, <&adc 6>, <&adc 7>,
|
||||
<&adc 8>, <&adc 9>, <&adc 10>, <&adc 11>,
|
||||
<&adc 12>, <&adc 13>, <&adc 14>, <&adc 15>;
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led-system-fault {
|
||||
gpios = <&gpio ASPEED_GPIO(G,3) GPIO_ACTIVE_LOW>;
|
||||
label = "platform:red:fault";
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
function = LED_FUNCTION_FAULT;
|
||||
};
|
||||
|
||||
led-heartbeat {
|
||||
gpios = <&gpio ASPEED_GPIO(G,0) GPIO_ACTIVE_LOW>;
|
||||
label = "platform:green:heartbeat";
|
||||
color = <LED_COLOR_ID_GREEN>;
|
||||
function = LED_FUNCTION_INDICATOR;
|
||||
linux,default-trigger = "timer";
|
||||
};
|
||||
|
||||
led-fan1-fault {
|
||||
retain-state-shutdown;
|
||||
default-state = "off";
|
||||
gpios = <&io_expander0 0 GPIO_ACTIVE_LOW>;
|
||||
label = "fan1:red:fault";
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
function = LED_FUNCTION_FAULT;
|
||||
};
|
||||
|
||||
led-fan2-fault {
|
||||
retain-state-shutdown;
|
||||
default-state = "off";
|
||||
gpios = <&io_expander0 1 GPIO_ACTIVE_LOW>;
|
||||
label = "fan2:red:fault";
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
function = LED_FUNCTION_FAULT;
|
||||
};
|
||||
|
||||
led-fan3-fault {
|
||||
retain-state-shutdown;
|
||||
default-state = "off";
|
||||
gpios = <&io_expander0 2 GPIO_ACTIVE_LOW>;
|
||||
label = "fan3:red:fault";
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
function = LED_FUNCTION_FAULT;
|
||||
};
|
||||
|
||||
led-fan4-fault {
|
||||
retain-state-shutdown;
|
||||
default-state = "off";
|
||||
gpios = <&io_expander0 3 GPIO_ACTIVE_LOW>;
|
||||
label = "fan4:red:fault";
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
function = LED_FUNCTION_FAULT;
|
||||
};
|
||||
|
||||
led-fan5-fault {
|
||||
retain-state-shutdown;
|
||||
default-state = "off";
|
||||
gpios = <&io_expander0 4 GPIO_ACTIVE_LOW>;
|
||||
label = "fan5:red:fault";
|
||||
color = <LED_COLOR_ID_RED>;
|
||||
function = LED_FUNCTION_FAULT;
|
||||
};
|
||||
};
|
||||
|
||||
memory@80000000 {
|
||||
reg = <0x80000000 0x20000000>;
|
||||
};
|
||||
|
||||
reserved-memory {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
gfx_memory: framebuffer {
|
||||
compatible = "shared-dma-pool";
|
||||
size = <0x01000000>;
|
||||
alignment = <0x01000000>;
|
||||
reusable;
|
||||
};
|
||||
|
||||
vga_memory: framebuffer@9f000000 {
|
||||
no-map;
|
||||
reg = <0x9f000000 0x01000000>; /* 16M */
|
||||
};
|
||||
|
||||
video_engine_memory: jpegbuffer {
|
||||
compatible = "shared-dma-pool";
|
||||
size = <0x02000000>; /* 32M */
|
||||
alignment = <0x01000000>;
|
||||
reusable;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&adc {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_adc0_default
|
||||
&pinctrl_adc1_default
|
||||
&pinctrl_adc2_default
|
||||
&pinctrl_adc3_default
|
||||
&pinctrl_adc4_default
|
||||
&pinctrl_adc5_default
|
||||
&pinctrl_adc6_default
|
||||
&pinctrl_adc7_default
|
||||
&pinctrl_adc8_default
|
||||
&pinctrl_adc9_default
|
||||
&pinctrl_adc10_default
|
||||
&pinctrl_adc11_default
|
||||
&pinctrl_adc12_default
|
||||
&pinctrl_adc13_default
|
||||
&pinctrl_adc14_default
|
||||
&pinctrl_adc15_default>;
|
||||
};
|
||||
|
||||
&fmc {
|
||||
status = "okay";
|
||||
|
||||
flash@0 {
|
||||
label = "bmc";
|
||||
m25p,fast-read;
|
||||
spi-max-frequency = <50000000>;
|
||||
status = "okay";
|
||||
#include "openbmc-flash-layout-64.dtsi"
|
||||
};
|
||||
};
|
||||
|
||||
&gfx {
|
||||
memory-region = <&gfx_memory>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gpio {
|
||||
gpio-line-names =
|
||||
/*A0-A7*/ "","","","bmc-ready","","","","",
|
||||
/*B0-B7*/ "i2c-backup-sel","","","","","","","host0-shd-ack-n",
|
||||
/*C0-C7*/ "","","","","","","","",
|
||||
/*D0-D7*/ "button-power-n","control-power-n","button-reset-n",
|
||||
"host0-sysreset-n","","","power-chassis-good","",
|
||||
/*E0-E7*/ "","s0-vrd1-vddq0123-fault-n",
|
||||
"s0-vrd1-vddq4567-fault-n","s0-vrd0-vddc-fault-n",
|
||||
"s0-vrd3-p0v75-fault-n","","","",
|
||||
/*F0-F7*/ "","","ps-atx-on-n","","","","","",
|
||||
/*G0-G7*/ "led-bmc-heartbeat-n","button-identify-n","",
|
||||
"led-system-fault-n","uboot-ready","bmc-salt2-n","","",
|
||||
/*H0-H7*/ "ps-pwr-ok","","","","","","","",
|
||||
/*I0-I7*/ "","","","","","","","",
|
||||
/*J0-J7*/ "s0-hightemp-n","","","","","","","",
|
||||
/*K0-K7*/ "","","","","","","","",
|
||||
/*L0-L7*/ "","","","","","","","",
|
||||
/*M0-M7*/ "cpld-disable-bmc-n","","","","","s0-spi-auth-fail-n","","",
|
||||
/*N0-N7*/ "","","","","","","","",
|
||||
/*O0-O7*/ "","","","","","","","",
|
||||
/*P0-P7*/ "","","","","","","","",
|
||||
/*Q0-Q7*/ "","","","","","","led-identify-n",
|
||||
"chassis-intrusion-n",
|
||||
/*R0-R7*/ "","","ext-hightemp-n","spi0-program-sel","",
|
||||
"output-hwm-bat-en","","",
|
||||
/*S0-S7*/ "s0-vr-hot-n","","input-salt2-n","bmc-sysreset-n","","","","",
|
||||
/*T0-T7*/ "","","","","","","","",
|
||||
/*U0-U7*/ "","","","","","","","",
|
||||
/*V0-V7*/ "","","","","","","","",
|
||||
/*W0-W7*/ "","","","","","","","",
|
||||
/*X0-X7*/ "","","","","","","","",
|
||||
/*Y0-Y7*/ "","","","","","","","",
|
||||
/*Z0-Z7*/ "","","","s0-rtc-lock","","","","",
|
||||
/*AA0-AA7*/ "s0-rtc-int-n","","","","","pmbus-sel-n","","",
|
||||
/*AB0-AB7*/ "host0-reboot-ack-n","s0-sys-auth-failure-n",
|
||||
"","","","","","",
|
||||
/*AC0-AC7*/ "s0-fault-alert","host0-ready","s0-overtemp-n",
|
||||
"","bmc-ok","host0-special-boot","presence-cpu0",
|
||||
"host0-shd-req-n";
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
status = "okay";
|
||||
|
||||
ipmb@10 {
|
||||
compatible = "ipmb-dev";
|
||||
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
|
||||
i2c-protocol;
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
status = "okay";
|
||||
|
||||
i2c-mux1@73 {
|
||||
compatible = "nxp,pca9548";
|
||||
reg = <0x73>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
i2c-mux-idle-disconnect;
|
||||
|
||||
nvme1: i2c@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
pcie4: i2c@1 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <1>;
|
||||
};
|
||||
|
||||
pcie5: i2c@2 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <2>;
|
||||
};
|
||||
|
||||
pcie6: i2c@3 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <3>;
|
||||
};
|
||||
|
||||
pcie7: i2c@4 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <4>;
|
||||
};
|
||||
|
||||
nvme3: i2c@5 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <5>;
|
||||
};
|
||||
|
||||
nvme2: i2c@6 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <6>;
|
||||
};
|
||||
|
||||
nvme0: i2c@7 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <7>;
|
||||
};
|
||||
};
|
||||
|
||||
i2c-mux2@75 {
|
||||
compatible = "nxp,pca9548";
|
||||
reg = <0x75>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
i2c-mux-idle-disconnect;
|
||||
|
||||
nvme4: i2c@0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0>;
|
||||
};
|
||||
|
||||
nvme5: i2c@1 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <1>;
|
||||
};
|
||||
|
||||
nvme6: i2c@2 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <2>;
|
||||
};
|
||||
|
||||
nvme7: i2c@3 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <3>;
|
||||
};
|
||||
|
||||
nvme8: i2c@4 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <4>;
|
||||
};
|
||||
|
||||
nvme9: i2c@5 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <5>;
|
||||
};
|
||||
|
||||
nvme10: i2c@6 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <6>;
|
||||
};
|
||||
|
||||
nvme11: i2c@7 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <7>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
status = "okay";
|
||||
|
||||
smpro@4f {
|
||||
compatible = "ampere,smpro";
|
||||
reg = <0x4f>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
status = "okay";
|
||||
|
||||
// PSU FRU
|
||||
eeprom@38 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x38>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c4 {
|
||||
status = "okay";
|
||||
|
||||
temperature-sensor@29 {
|
||||
compatible = "nuvoton,nct7802";
|
||||
reg = <0x29>;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
channel@0 { /* LTD */
|
||||
reg = <0>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
channel@1 { /* RTD1 */
|
||||
reg = <1>;
|
||||
sensor-type = "temperature";
|
||||
temperature-mode = "thermistor";
|
||||
};
|
||||
|
||||
channel@2 { /* RTD2 */
|
||||
reg = <2>;
|
||||
sensor-type = "temperature";
|
||||
temperature-mode = "thermal-diode";
|
||||
};
|
||||
};
|
||||
|
||||
temperature-sensor@4c {
|
||||
compatible = "nuvoton,w83773g";
|
||||
reg = <0x4c>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c5 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c6 {
|
||||
status = "okay";
|
||||
|
||||
rtc@6f {
|
||||
compatible = "isil,isl1208";
|
||||
reg = <0x6f>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c7 {
|
||||
status = "okay";
|
||||
|
||||
// BMC FRU
|
||||
eeprom@57 {
|
||||
compatible = "atmel,24c128";
|
||||
reg = <0x57>;
|
||||
|
||||
nvmem-layout {
|
||||
compatible = "fixed-layout";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
eth1_macaddress: macaddress@3f80 {
|
||||
reg = <0x3f80 6>;
|
||||
};
|
||||
|
||||
// The offset for eth0 really is at 0x3f88.
|
||||
// eth0 and eth1 are swapped from what might be
|
||||
// expected.
|
||||
eth0_macaddress: macaddress@3f88 {
|
||||
reg = <0x3f88 6>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c8 {
|
||||
status = "okay";
|
||||
|
||||
io_expander0: gpio@1c {
|
||||
compatible = "nxp,pca9557";
|
||||
reg = <0x1c>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c9 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c10 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c11 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
// Bus for accessing the SCP EEPROM
|
||||
&i2c12 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c13 {
|
||||
status = "okay";
|
||||
|
||||
ssif-bmc@10 {
|
||||
compatible = "ssif-bmc";
|
||||
reg = <0x10>;
|
||||
};
|
||||
};
|
||||
|
||||
// Connected to host Intel X550 (ALTRAD8UD-1L2T) or
|
||||
// Broadcom BCM57414 (ALTRAD8UD2-1L2Q) interface.
|
||||
// Unconnected on ALTRAD8UD-1L
|
||||
&mac0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_rmii1_default>;
|
||||
clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>,
|
||||
<&syscon ASPEED_CLK_MAC1RCLK>;
|
||||
clock-names = "MACCLK", "RCLK";
|
||||
use-ncsi;
|
||||
nvmem-cells = <ð0_macaddress>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
// Connected to Realtek RTL8211E
|
||||
&mac1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
|
||||
|
||||
nvmem-cells = <ð1_macaddress>;
|
||||
nvmem-cell-names = "mac-address";
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&pwm_tacho {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_pwm0_default
|
||||
&pinctrl_pwm1_default
|
||||
&pinctrl_pwm2_default
|
||||
&pinctrl_pwm3_default
|
||||
&pinctrl_pwm4_default
|
||||
&pinctrl_pwm5_default
|
||||
&pinctrl_pwm6_default
|
||||
&pinctrl_pwm7_default>;
|
||||
|
||||
status = "okay";
|
||||
|
||||
fan@0 {
|
||||
reg = <0x00>;
|
||||
aspeed,fan-tach-ch = /bits/ 8 <0x00 0x08>;
|
||||
};
|
||||
|
||||
fan@1 {
|
||||
reg = <0x01>;
|
||||
aspeed,fan-tach-ch = /bits/ 8 <0x01 0x09>;
|
||||
};
|
||||
|
||||
fan@2 {
|
||||
reg = <0x02>;
|
||||
aspeed,fan-tach-ch = /bits/ 8 <0x02 0x0a>;
|
||||
};
|
||||
|
||||
fan@3 {
|
||||
reg = <0x03>;
|
||||
aspeed,fan-tach-ch = /bits/ 8 <0x03 0x0b>;
|
||||
};
|
||||
|
||||
fan@4 {
|
||||
reg = <0x04>;
|
||||
aspeed,fan-tach-ch = /bits/ 8 <0x04 0x0c>;
|
||||
};
|
||||
|
||||
fan@5 {
|
||||
reg = <0x05>;
|
||||
aspeed,fan-tach-ch = /bits/ 8 <0x05 0x0d>;
|
||||
};
|
||||
|
||||
fan@6 {
|
||||
reg = <0x06>;
|
||||
aspeed,fan-tach-ch = /bits/ 8 <0x06 0x0e>;
|
||||
};
|
||||
|
||||
fan@7 {
|
||||
reg = <0x07>;
|
||||
aspeed,fan-tach-ch = /bits/ 8 <0x07 0x0f>;
|
||||
};
|
||||
};
|
||||
|
||||
&spi1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_spi1_default>;
|
||||
|
||||
status = "okay";
|
||||
|
||||
// Host BIOS/UEFI EEPROM
|
||||
flash@0 {
|
||||
m25p,fast-read;
|
||||
label = "pnor";
|
||||
spi-max-frequency = <100000000>;
|
||||
status = "okay";
|
||||
|
||||
partitions {
|
||||
compatible = "fixed-partitions";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
tfa@400000 {
|
||||
reg = <0x400000 0x200000>;
|
||||
label = "pnor-tfa";
|
||||
};
|
||||
|
||||
uefi@600000 {
|
||||
reg = <0x600000 0x1A00000>;
|
||||
label = "pnor-uefi";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_txd1_default
|
||||
&pinctrl_rxd1_default
|
||||
&pinctrl_ncts1_default
|
||||
&pinctrl_nrts1_default>;
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_txd2_default
|
||||
&pinctrl_rxd2_default>;
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_txd3_default
|
||||
&pinctrl_rxd3_default>;
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart4 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_txd4_default
|
||||
&pinctrl_rxd4_default>;
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
// The BMC's uart
|
||||
&uart5 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&vhub {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&video {
|
||||
memory-region = <&video_engine_memory>;
|
||||
|
||||
status = "okay";
|
||||
};
|
||||
1045
arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa.dts
Normal file
1045
arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-anacapa.dts
Normal file
File diff suppressed because it is too large
Load diff
|
|
@ -34,14 +34,14 @@
|
|||
<&adc1 4>, <&adc1 5>, <&adc1 6>, <&adc1 7>;
|
||||
};
|
||||
|
||||
spi1_gpio: spi1-gpio {
|
||||
spi1_gpio: spi {
|
||||
compatible = "spi-gpio";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
gpio-sck = <&gpio0 ASPEED_GPIO(Z, 3) GPIO_ACTIVE_HIGH>;
|
||||
gpio-mosi = <&gpio0 ASPEED_GPIO(Z, 4) GPIO_ACTIVE_HIGH>;
|
||||
gpio-miso = <&gpio0 ASPEED_GPIO(Z, 5) GPIO_ACTIVE_HIGH>;
|
||||
sck-gpios = <&gpio0 ASPEED_GPIO(Z, 3) GPIO_ACTIVE_HIGH>;
|
||||
mosi-gpios = <&gpio0 ASPEED_GPIO(Z, 4) GPIO_ACTIVE_HIGH>;
|
||||
miso-gpios = <&gpio0 ASPEED_GPIO(Z, 5) GPIO_ACTIVE_HIGH>;
|
||||
num-chipselects = <1>;
|
||||
cs-gpios = <&gpio0 ASPEED_GPIO(Z, 0) GPIO_ACTIVE_LOW>;
|
||||
|
||||
|
|
@ -54,7 +54,8 @@
|
|||
|
||||
front_gpio_leds {
|
||||
compatible = "gpio-leds";
|
||||
sys_log_id {
|
||||
led-0 {
|
||||
label = "sys_log_id";
|
||||
default-state = "off";
|
||||
gpios = <&front_leds 0 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
|
@ -62,42 +63,50 @@
|
|||
|
||||
fan_gpio_leds {
|
||||
compatible = "gpio-leds";
|
||||
fan0_blue {
|
||||
led-0 {
|
||||
label = "fan0_blue";
|
||||
retain-state-shutdown;
|
||||
default-state = "on";
|
||||
gpios = <&fan_leds 8 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
fan1_blue {
|
||||
led-1 {
|
||||
label = "fan1_blue";
|
||||
retain-state-shutdown;
|
||||
default-state = "on";
|
||||
gpios = <&fan_leds 9 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
fan2_blue {
|
||||
led-2 {
|
||||
label = "fan2_blue";
|
||||
retain-state-shutdown;
|
||||
default-state = "on";
|
||||
gpios = <&fan_leds 10 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
fan3_blue {
|
||||
led-3 {
|
||||
label = "fan3_blue";
|
||||
retain-state-shutdown;
|
||||
default-state = "on";
|
||||
gpios = <&fan_leds 11 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
fan0_amber {
|
||||
led-4 {
|
||||
label = "fan0_amber";
|
||||
retain-state-shutdown;
|
||||
default-state = "off";
|
||||
gpios = <&fan_leds 12 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
fan1_amber {
|
||||
led-5 {
|
||||
label = "fan1_amber";
|
||||
retain-state-shutdown;
|
||||
default-state = "off";
|
||||
gpios = <&fan_leds 13 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
fan2_amber {
|
||||
led-6 {
|
||||
label = "fan2_amber";
|
||||
retain-state-shutdown;
|
||||
default-state = "off";
|
||||
gpios = <&fan_leds 14 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
fan3_amber {
|
||||
led-7 {
|
||||
label = "fan3_amber";
|
||||
retain-state-shutdown;
|
||||
default-state = "off";
|
||||
gpios = <&fan_leds 15 GPIO_ACTIVE_HIGH>;
|
||||
|
|
@ -106,12 +115,14 @@
|
|||
|
||||
sled1_gpio_leds {
|
||||
compatible = "gpio-leds";
|
||||
sled1_amber {
|
||||
led-0 {
|
||||
label = "sled1_amber";
|
||||
retain-state-shutdown;
|
||||
default-state = "keep";
|
||||
gpios = <&sled1_leds 0 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
sled1_blue {
|
||||
led-1 {
|
||||
label = "sled1_blue";
|
||||
retain-state-shutdown;
|
||||
default-state = "keep";
|
||||
gpios = <&sled1_leds 1 GPIO_ACTIVE_LOW>;
|
||||
|
|
@ -120,12 +131,14 @@
|
|||
|
||||
sled2_gpio_leds {
|
||||
compatible = "gpio-leds";
|
||||
sled2_amber {
|
||||
led-0 {
|
||||
label = "sled2_amber";
|
||||
retain-state-shutdown;
|
||||
default-state = "keep";
|
||||
gpios = <&sled2_leds 0 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
sled2_blue {
|
||||
led-1 {
|
||||
label = "sled2_blue";
|
||||
retain-state-shutdown;
|
||||
default-state = "keep";
|
||||
gpios = <&sled2_leds 1 GPIO_ACTIVE_LOW>;
|
||||
|
|
@ -134,12 +147,14 @@
|
|||
|
||||
sled3_gpio_leds {
|
||||
compatible = "gpio-leds";
|
||||
sled3_amber {
|
||||
led-0 {
|
||||
label = "sled3_amber";
|
||||
retain-state-shutdown;
|
||||
default-state = "keep";
|
||||
gpios = <&sled3_leds 0 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
sled3_blue {
|
||||
led-1 {
|
||||
label = "sled3_blue";
|
||||
retain-state-shutdown;
|
||||
default-state = "keep";
|
||||
gpios = <&sled3_leds 1 GPIO_ACTIVE_LOW>;
|
||||
|
|
@ -148,12 +163,14 @@
|
|||
|
||||
sled4_gpio_leds {
|
||||
compatible = "gpio-leds";
|
||||
sled4_amber {
|
||||
led-0 {
|
||||
label = "sled4_amber";
|
||||
retain-state-shutdown;
|
||||
default-state = "keep";
|
||||
gpios = <&sled4_leds 0 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
sled4_blue {
|
||||
led-1 {
|
||||
label = "sled4_blue";
|
||||
retain-state-shutdown;
|
||||
default-state = "keep";
|
||||
gpios = <&sled4_leds 1 GPIO_ACTIVE_LOW>;
|
||||
|
|
@ -162,12 +179,14 @@
|
|||
|
||||
sled5_gpio_leds {
|
||||
compatible = "gpio-leds";
|
||||
sled5_amber {
|
||||
led-0 {
|
||||
label = "sled5_amber";
|
||||
retain-state-shutdown;
|
||||
default-state = "keep";
|
||||
gpios = <&sled5_leds 0 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
sled5_blue {
|
||||
led-1 {
|
||||
label = "sled5_blue";
|
||||
retain-state-shutdown;
|
||||
default-state = "keep";
|
||||
gpios = <&sled5_leds 1 GPIO_ACTIVE_LOW>;
|
||||
|
|
@ -176,12 +195,14 @@
|
|||
|
||||
sled6_gpio_leds {
|
||||
compatible = "gpio-leds";
|
||||
sled6_amber {
|
||||
led-0 {
|
||||
label = "sled6_amber";
|
||||
retain-state-shutdown;
|
||||
default-state = "keep";
|
||||
gpios = <&sled6_leds 0 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
sled6_blue {
|
||||
led-1 {
|
||||
label = "sled6_blue";
|
||||
retain-state-shutdown;
|
||||
default-state = "keep";
|
||||
gpios = <&sled6_leds 1 GPIO_ACTIVE_LOW>;
|
||||
|
|
@ -191,32 +212,32 @@
|
|||
gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
|
||||
presence-sled1 {
|
||||
presence-sled1-switch {
|
||||
label = "presence-sled1";
|
||||
gpios = <&gpio0 ASPEED_GPIO(H, 2) GPIO_ACTIVE_LOW>;
|
||||
linux,code = <ASPEED_GPIO(H, 2)>;
|
||||
};
|
||||
presence-sled2 {
|
||||
presence-sled2-switch {
|
||||
label = "presence-sled2";
|
||||
gpios = <&gpio0 ASPEED_GPIO(H, 3) GPIO_ACTIVE_LOW>;
|
||||
linux,code = <ASPEED_GPIO(H, 3)>;
|
||||
};
|
||||
presence-sled3 {
|
||||
presence-sled3-switch {
|
||||
label = "presence-sled3";
|
||||
gpios = <&gpio0 ASPEED_GPIO(H, 4) GPIO_ACTIVE_LOW>;
|
||||
linux,code = <ASPEED_GPIO(H, 4)>;
|
||||
};
|
||||
presence-sled4 {
|
||||
presence-sled4-switch {
|
||||
label = "presence-sled4";
|
||||
gpios = <&gpio0 ASPEED_GPIO(H, 5) GPIO_ACTIVE_LOW>;
|
||||
linux,code = <ASPEED_GPIO(H, 5)>;
|
||||
};
|
||||
presence-sled5 {
|
||||
presence-sled5-switch {
|
||||
label = "presence-sled5";
|
||||
gpios = <&gpio0 ASPEED_GPIO(H, 6) GPIO_ACTIVE_LOW>;
|
||||
linux,code = <ASPEED_GPIO(H, 6)>;
|
||||
};
|
||||
presence-sled6 {
|
||||
presence-sled6-switch {
|
||||
label = "presence-sled6";
|
||||
gpios = <&gpio0 ASPEED_GPIO(H, 7) GPIO_ACTIVE_LOW>;
|
||||
linux,code = <ASPEED_GPIO(H, 7)>;
|
||||
|
|
@ -352,8 +373,6 @@
|
|||
sled1_ioexp: pca9539@76 {
|
||||
compatible = "nxp,pca9539";
|
||||
reg = <0x76>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
|
||||
|
|
@ -395,7 +414,6 @@
|
|||
label = "USB-C";
|
||||
pd-revision = /bits/ 8 <0x2 0x0 0x1 0x20>;
|
||||
power-role = "dual";
|
||||
try-power-role = "sink";
|
||||
data-role = "dual";
|
||||
source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
|
||||
sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
|
||||
|
|
@ -441,8 +459,6 @@
|
|||
sled2_ioexp: pca9539@76 {
|
||||
compatible = "nxp,pca9539";
|
||||
reg = <0x76>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
|
||||
|
|
@ -484,7 +500,6 @@
|
|||
label = "USB-C";
|
||||
pd-revision = /bits/ 8 <0x2 0x0 0x1 0x20>;
|
||||
power-role = "dual";
|
||||
try-power-role = "sink";
|
||||
data-role = "dual";
|
||||
source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
|
||||
sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
|
||||
|
|
@ -530,8 +545,6 @@
|
|||
sled3_ioexp: pca9539@76 {
|
||||
compatible = "nxp,pca9539";
|
||||
reg = <0x76>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
|
||||
|
|
@ -573,7 +586,6 @@
|
|||
label = "USB-C";
|
||||
pd-revision = /bits/ 8 <0x2 0x0 0x1 0x20>;
|
||||
power-role = "dual";
|
||||
try-power-role = "sink";
|
||||
data-role = "dual";
|
||||
source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
|
||||
sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
|
||||
|
|
@ -619,8 +631,6 @@
|
|||
sled4_ioexp: pca9539@76 {
|
||||
compatible = "nxp,pca9539";
|
||||
reg = <0x76>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
|
||||
|
|
@ -662,7 +672,6 @@
|
|||
label = "USB-C";
|
||||
pd-revision = /bits/ 8 <0x2 0x0 0x1 0x20>;
|
||||
power-role = "dual";
|
||||
try-power-role = "sink";
|
||||
data-role = "dual";
|
||||
source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
|
||||
sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
|
||||
|
|
@ -708,8 +717,6 @@
|
|||
sled5_ioexp: pca9539@76 {
|
||||
compatible = "nxp,pca9539";
|
||||
reg = <0x76>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
|
||||
|
|
@ -751,7 +758,6 @@
|
|||
label = "USB-C";
|
||||
pd-revision = /bits/ 8 <0x2 0x0 0x1 0x20>;
|
||||
power-role = "dual";
|
||||
try-power-role = "sink";
|
||||
data-role = "dual";
|
||||
source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
|
||||
sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
|
||||
|
|
@ -797,8 +803,6 @@
|
|||
sled6_ioexp: pca9539@76 {
|
||||
compatible = "nxp,pca9539";
|
||||
reg = <0x76>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
|
||||
|
|
@ -840,7 +844,6 @@
|
|||
label = "USB-C";
|
||||
pd-revision = /bits/ 8 <0x2 0x0 0x1 0x20>;
|
||||
power-role = "dual";
|
||||
try-power-role = "sink";
|
||||
data-role = "dual";
|
||||
source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
|
||||
sink-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>;
|
||||
|
|
@ -953,7 +956,6 @@
|
|||
|
||||
&i2c13 {
|
||||
multi-master;
|
||||
aspeed,hw-timeout-ms = <1000>;
|
||||
status = "okay";
|
||||
|
||||
//USB Debug Connector
|
||||
|
|
@ -1024,7 +1026,7 @@
|
|||
};
|
||||
|
||||
&adc0 {
|
||||
vref = <1800>;
|
||||
aspeed,int-vref-microvolt = <2500000>;
|
||||
status = "okay";
|
||||
|
||||
pinctrl-names = "default";
|
||||
|
|
@ -1035,7 +1037,7 @@
|
|||
};
|
||||
|
||||
&adc1 {
|
||||
vref = <2500>;
|
||||
aspeed,int-vref-microvolt = <2500000>;
|
||||
status = "okay";
|
||||
|
||||
pinctrl-names = "default";
|
||||
|
|
@ -1080,11 +1082,5 @@
|
|||
|
||||
&wdt1 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_wdtrst1_default>;
|
||||
aspeed,reset-type = "soc";
|
||||
aspeed,external-signal;
|
||||
aspeed,ext-push-pull;
|
||||
aspeed,ext-active-high;
|
||||
aspeed,ext-pulse-duration = <256>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -96,7 +96,12 @@
|
|||
gpios = <&gpio0 ASPEED_GPIO(P, 5) (GPIO_ACTIVE_HIGH|GPIO_TRANSITORY)>;
|
||||
};
|
||||
|
||||
led-hdd {
|
||||
};
|
||||
|
||||
hdd-leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led-0 {
|
||||
label = "hdd_led";
|
||||
gpios = <&io_expander13 1 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
|
@ -311,6 +316,12 @@
|
|||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0>;
|
||||
|
||||
// HDD NVMe SSD FRU 0
|
||||
eeprom@53 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x53>;
|
||||
};
|
||||
};
|
||||
|
||||
i2c0mux0ch1mux0ch1: i2c@1 {
|
||||
|
|
@ -323,6 +334,12 @@
|
|||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <2>;
|
||||
|
||||
// HDD NVMe SSD FRU 1
|
||||
eeprom@53 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x53>;
|
||||
};
|
||||
};
|
||||
|
||||
i2c0mux0ch1mux0ch3: i2c@3 {
|
||||
|
|
@ -493,6 +510,12 @@
|
|||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0>;
|
||||
|
||||
// HDD NVMe SSD FRU 2
|
||||
eeprom@53 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x53>;
|
||||
};
|
||||
};
|
||||
|
||||
i2c0mux3ch1mux0ch1: i2c@1 {
|
||||
|
|
@ -505,6 +528,12 @@
|
|||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <2>;
|
||||
|
||||
// HDD NVMe SSD FRU 3
|
||||
eeprom@53 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x53>;
|
||||
};
|
||||
};
|
||||
|
||||
i2c0mux3ch1mux0ch3: i2c@3 {
|
||||
|
|
@ -619,6 +648,12 @@
|
|||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <1>;
|
||||
|
||||
// BOOT DRIVE FRU
|
||||
eeprom@53 {
|
||||
compatible = "atmel,24c02";
|
||||
reg = <0x53>;
|
||||
};
|
||||
};
|
||||
|
||||
i2c0mux5ch2: i2c@2 {
|
||||
|
|
@ -983,7 +1018,7 @@
|
|||
"",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
"shdn_force_l_cpld",
|
||||
"",
|
||||
"",
|
||||
"",
|
||||
|
|
@ -1258,10 +1293,6 @@
|
|||
use-ncsi;
|
||||
};
|
||||
|
||||
&udma {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -822,9 +822,13 @@
|
|||
"irq-pvddcore1-ocp-alert","",
|
||||
"","",
|
||||
/*O4-O7 line 232-239*/
|
||||
"","","","","","","","",
|
||||
"","","","",
|
||||
"presence-lower-fanboard1","",
|
||||
"presence-lower-fanboard2","",
|
||||
/*P0-P3 line 240-247*/
|
||||
"","","","","","","","",
|
||||
"presence-upper-fanboard1","",
|
||||
"presence-upper-fanboard2","",
|
||||
"","","","",
|
||||
/*P4-P7 line 248-255*/
|
||||
"","","","","","","","";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -845,7 +845,14 @@
|
|||
};
|
||||
|
||||
&i2c7 {
|
||||
multi-master;
|
||||
status = "okay";
|
||||
|
||||
ipmb@10 {
|
||||
compatible = "ipmb-dev";
|
||||
reg = <(0x10 | I2C_OWN_SLAVE_ADDRESS)>;
|
||||
i2c-protocol;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c8 {
|
||||
|
|
@ -1328,6 +1335,20 @@
|
|||
&i2c12 {
|
||||
status = "okay";
|
||||
|
||||
gpio@27 {
|
||||
compatible = "nxp,pca9555";
|
||||
reg = <0x27>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
gpio-line-names =
|
||||
"PEX0_MODE_SEL1_R","PEX0_MODE_SEL2_R",
|
||||
"PEX0_MODE_SEL3_R","PEX0_MODE_SEL4_R",
|
||||
"","","","",
|
||||
"UART_MUX_SEL","RST_SMB_NIC_R_N",
|
||||
"RST_SMB_N","RST_CP2102N_N",
|
||||
"SPI_MUX_SEL","","","";
|
||||
};
|
||||
|
||||
// SWB FRU
|
||||
eeprom@52 {
|
||||
compatible = "atmel,24c64";
|
||||
|
|
@ -1758,11 +1779,11 @@
|
|||
"","BIOS_DEBUG_MODE",
|
||||
/*H0-H3 line 112-119*/
|
||||
"FM_IOEXP_U538_INT_N","",
|
||||
"FM_IOEXP_U539_INT_N","",
|
||||
"FM_IOEXP_U540_INT_N","",
|
||||
"FM_IOEXP_U541_INT_N","",
|
||||
"FM_IOEXP_U539_INT_N","FM_MODULE_PWR_EN_N_1B",
|
||||
"FM_IOEXP_U540_INT_N","FM_MODULE_PWR_EN_N_2B",
|
||||
"FM_IOEXP_U541_INT_N","FM_MODULE_PWR_EN_N_3B",
|
||||
/*H4-H7 line 120-127*/
|
||||
"FM_IOEXP_PDB2_U1003_INT_N","",
|
||||
"FM_IOEXP_PDB2_U1003_INT_N","FM_MODULE_PWR_EN_N_4B",
|
||||
"","",
|
||||
"","",
|
||||
"FM_MAIN_PWREN_RMC_EN_ISO_R","",
|
||||
|
|
|
|||
|
|
@ -2806,13 +2806,13 @@
|
|||
#size-cells = <0>;
|
||||
|
||||
eeprom@0 {
|
||||
at25,byte-len = <0x80000>;
|
||||
at25,addr-mode = <4>;
|
||||
at25,page-size = <256>;
|
||||
|
||||
compatible = "atmel,at25";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <1000000>;
|
||||
|
||||
address-width = <24>;
|
||||
pagesize = <256>;
|
||||
size = <0x80000>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -2823,13 +2823,13 @@
|
|||
#size-cells = <0>;
|
||||
|
||||
eeprom@0 {
|
||||
at25,byte-len = <0x80000>;
|
||||
at25,addr-mode = <4>;
|
||||
at25,page-size = <256>;
|
||||
|
||||
compatible = "atmel,at25";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <1000000>;
|
||||
|
||||
address-width = <24>;
|
||||
pagesize = <256>;
|
||||
size = <0x80000>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -2840,13 +2840,13 @@
|
|||
#size-cells = <0>;
|
||||
|
||||
eeprom@0 {
|
||||
at25,byte-len = <0x80000>;
|
||||
at25,addr-mode = <4>;
|
||||
at25,page-size = <256>;
|
||||
|
||||
compatible = "atmel,at25";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <1000000>;
|
||||
|
||||
address-width = <24>;
|
||||
pagesize = <256>;
|
||||
size = <0x80000>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -2857,13 +2857,13 @@
|
|||
#size-cells = <0>;
|
||||
|
||||
eeprom@0 {
|
||||
at25,byte-len = <0x80000>;
|
||||
at25,addr-mode = <4>;
|
||||
at25,page-size = <256>;
|
||||
|
||||
compatible = "atmel,at25";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <1000000>;
|
||||
|
||||
address-width = <24>;
|
||||
pagesize = <256>;
|
||||
size = <0x80000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -3181,13 +3181,13 @@
|
|||
#size-cells = <0>;
|
||||
|
||||
eeprom@0 {
|
||||
at25,byte-len = <0x80000>;
|
||||
at25,addr-mode = <4>;
|
||||
at25,page-size = <256>;
|
||||
|
||||
compatible = "atmel,at25";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <1000000>;
|
||||
|
||||
address-width = <24>;
|
||||
pagesize = <256>;
|
||||
size = <0x80000>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -3198,13 +3198,13 @@
|
|||
#size-cells = <0>;
|
||||
|
||||
eeprom@0 {
|
||||
at25,byte-len = <0x80000>;
|
||||
at25,addr-mode = <4>;
|
||||
at25,page-size = <256>;
|
||||
|
||||
compatible = "atmel,at25";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <1000000>;
|
||||
|
||||
address-width = <24>;
|
||||
pagesize = <256>;
|
||||
size = <0x80000>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -3215,13 +3215,13 @@
|
|||
#size-cells = <0>;
|
||||
|
||||
eeprom@0 {
|
||||
at25,byte-len = <0x80000>;
|
||||
at25,addr-mode = <4>;
|
||||
at25,page-size = <256>;
|
||||
|
||||
compatible = "atmel,at25";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <1000000>;
|
||||
|
||||
address-width = <24>;
|
||||
pagesize = <256>;
|
||||
size = <0x80000>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -3232,13 +3232,13 @@
|
|||
#size-cells = <0>;
|
||||
|
||||
eeprom@0 {
|
||||
at25,byte-len = <0x80000>;
|
||||
at25,addr-mode = <4>;
|
||||
at25,page-size = <256>;
|
||||
|
||||
compatible = "atmel,at25";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <1000000>;
|
||||
|
||||
address-width = <24>;
|
||||
pagesize = <256>;
|
||||
size = <0x80000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -3556,13 +3556,13 @@
|
|||
#size-cells = <0>;
|
||||
|
||||
eeprom@0 {
|
||||
at25,byte-len = <0x80000>;
|
||||
at25,addr-mode = <4>;
|
||||
at25,page-size = <256>;
|
||||
|
||||
compatible = "atmel,at25";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <1000000>;
|
||||
|
||||
address-width = <24>;
|
||||
pagesize = <256>;
|
||||
size = <0x80000>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -3573,13 +3573,13 @@
|
|||
#size-cells = <0>;
|
||||
|
||||
eeprom@0 {
|
||||
at25,byte-len = <0x80000>;
|
||||
at25,addr-mode = <4>;
|
||||
at25,page-size = <256>;
|
||||
|
||||
compatible = "atmel,at25";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <1000000>;
|
||||
|
||||
address-width = <24>;
|
||||
pagesize = <256>;
|
||||
size = <0x80000>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -3590,13 +3590,13 @@
|
|||
#size-cells = <0>;
|
||||
|
||||
eeprom@0 {
|
||||
at25,byte-len = <0x80000>;
|
||||
at25,addr-mode = <4>;
|
||||
at25,page-size = <256>;
|
||||
|
||||
compatible = "atmel,at25";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <1000000>;
|
||||
|
||||
address-width = <24>;
|
||||
pagesize = <256>;
|
||||
size = <0x80000>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -3607,13 +3607,13 @@
|
|||
#size-cells = <0>;
|
||||
|
||||
eeprom@0 {
|
||||
at25,byte-len = <0x80000>;
|
||||
at25,addr-mode = <4>;
|
||||
at25,page-size = <256>;
|
||||
|
||||
compatible = "atmel,at25";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <1000000>;
|
||||
|
||||
address-width = <24>;
|
||||
pagesize = <256>;
|
||||
size = <0x80000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -3931,13 +3931,13 @@
|
|||
#size-cells = <0>;
|
||||
|
||||
eeprom@0 {
|
||||
at25,byte-len = <0x80000>;
|
||||
at25,addr-mode = <4>;
|
||||
at25,page-size = <256>;
|
||||
|
||||
compatible = "atmel,at25";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <1000000>;
|
||||
|
||||
address-width = <24>;
|
||||
pagesize = <256>;
|
||||
size = <0x80000>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -3948,13 +3948,13 @@
|
|||
#size-cells = <0>;
|
||||
|
||||
eeprom@0 {
|
||||
at25,byte-len = <0x80000>;
|
||||
at25,addr-mode = <4>;
|
||||
at25,page-size = <256>;
|
||||
|
||||
compatible = "atmel,at25";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <1000000>;
|
||||
|
||||
address-width = <24>;
|
||||
pagesize = <256>;
|
||||
size = <0x80000>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -3965,13 +3965,13 @@
|
|||
#size-cells = <0>;
|
||||
|
||||
eeprom@0 {
|
||||
at25,byte-len = <0x80000>;
|
||||
at25,addr-mode = <4>;
|
||||
at25,page-size = <256>;
|
||||
|
||||
compatible = "atmel,at25";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <1000000>;
|
||||
|
||||
address-width = <24>;
|
||||
pagesize = <256>;
|
||||
size = <0x80000>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -3982,13 +3982,13 @@
|
|||
#size-cells = <0>;
|
||||
|
||||
eeprom@0 {
|
||||
at25,byte-len = <0x80000>;
|
||||
at25,addr-mode = <4>;
|
||||
at25,page-size = <256>;
|
||||
|
||||
compatible = "atmel,at25";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <1000000>;
|
||||
|
||||
address-width = <24>;
|
||||
pagesize = <256>;
|
||||
size = <0x80000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
246
arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-msx4-bmc.dts
Normal file
246
arch/arm/boot/dts/aspeed/aspeed-bmc-nvidia-msx4-bmc.dts
Normal file
|
|
@ -0,0 +1,246 @@
|
|||
// SPDX-License-Identifier: GPL-2.0
|
||||
/dts-v1/;
|
||||
|
||||
#include "aspeed-g6.dtsi"
|
||||
#include <dt-bindings/gpio/aspeed-gpio.h>
|
||||
#include <dt-bindings/i2c/i2c.h>
|
||||
|
||||
/ {
|
||||
model = "AST2600 MSX4 BMC";
|
||||
compatible = "nvidia,msx4-bmc", "aspeed,ast2600";
|
||||
|
||||
aliases {
|
||||
serial0 = &uart1;
|
||||
serial1 = &uart2;
|
||||
serial2 = &uart3;
|
||||
serial3 = &uart4;
|
||||
serial4 = &uart5;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = "uart5:115200n8";
|
||||
};
|
||||
|
||||
memory@80000000 {
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x80000000>;
|
||||
};
|
||||
|
||||
reserved-memory {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
||||
gfx_memory: framebuffer {
|
||||
compatible = "shared-dma-pool";
|
||||
size = <0x01000000>;
|
||||
alignment = <0x01000000>;
|
||||
reusable;
|
||||
};
|
||||
|
||||
video_engine_memory: jpegbuffer {
|
||||
compatible = "shared-dma-pool";
|
||||
size = <0x02000000>; /* 32M */
|
||||
alignment = <0x01000000>;
|
||||
reusable;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&ehci1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&fmc {
|
||||
status = "okay";
|
||||
|
||||
flash@0 {
|
||||
compatible = "jedec,spi-nor";
|
||||
label = "bmc";
|
||||
status = "okay";
|
||||
#include "openbmc-flash-layout-128.dtsi"
|
||||
};
|
||||
|
||||
flash@1 {
|
||||
compatible = "jedec,spi-nor";
|
||||
label = "alt-bmc";
|
||||
spi-tx-bus-width = <1>;
|
||||
spi-rx-bus-width = <1>;
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&gfx {
|
||||
memory-region = <&gfx_memory>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gpio0 {
|
||||
gpio-line-names =
|
||||
/*A0-A7*/ "","","","","","","","",
|
||||
/*B0-B7*/ "ASSERT_BMC_READY","","","","","","","",
|
||||
/*C0-C7*/ "MON_PWR_GOOD","","","","","","","FP_ID_LED_N",
|
||||
/*D0-D7*/ "","","","","","","","",
|
||||
/*E0-E7*/ "","","","","","","","",
|
||||
/*F0-F7*/ "","","","","","","","",
|
||||
/*G0-G7*/ "","","FP_LED_STATUS_GREEN_N","FP_LED_STATUS_AMBER_N",
|
||||
"","","","",
|
||||
/*H0-H7*/ "","","","","","","","",
|
||||
/*I0-I7*/ "","","","","","","","",
|
||||
/*J0-J7*/ "","","","","","","","",
|
||||
/*K0-K7*/ "","","","","","","","",
|
||||
/*L0-L7*/ "","","","","","","","",
|
||||
/*M0-M7*/ "","","","","","","","",
|
||||
/*N0-N7*/ "","","","","","","","",
|
||||
/*O0-O7*/ "","","","","","","","",
|
||||
/*P0-P7*/ "MON_PWR_BTN_L","ASSERT_PWR_BTN_L","MON_RST_BTN_L",
|
||||
"ASSERT_RST_BTN_L","","ASSERT_NMI_BTN_L","","",
|
||||
/*Q0-Q7*/ "","","MEMORY_HOT_0","MEMORY_HOT_1","","","","",
|
||||
/*R0-R7*/ "ID_BTN","","","","","VBAT_GPIO","","",
|
||||
/*S0-S7*/ "","","RST_PCA_MUX","","","","","",
|
||||
/*T0-T7*/ "","","","","","","","",
|
||||
/*U0-U7*/ "","","","","","","","",
|
||||
/*V0-V7*/ "","","","","","","","",
|
||||
/*W0-W7*/ "","","","","","","","",
|
||||
/*X0-X7*/ "","","","","","","","",
|
||||
/*Y0-Y7*/ "","","","","","","","",
|
||||
/*Z0-Z7*/ "","","","","","","","";
|
||||
};
|
||||
|
||||
&gpio1 {
|
||||
gpio-line-names =
|
||||
/*18A0-18A7*/ "","","","","","","","",
|
||||
/*18B0-18B7*/ "","","","","","","","",
|
||||
/*18C0-18C7*/ "","","","","","","","",
|
||||
/*18D0-18D7*/ "","","","","","","","",
|
||||
/*18E0-18E3*/ "","","BMC_INIT_DONE","";
|
||||
};
|
||||
|
||||
// Devices on these busses are available after POST
|
||||
// however there isn't a great way to defer probing
|
||||
// until that point today, as the BMC doesn't
|
||||
// have direct control over when the host completes
|
||||
// POST, especially from the kernel.
|
||||
&i2c0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c4 {
|
||||
status = "okay";
|
||||
|
||||
eeprom@51 {
|
||||
compatible = "atmel,24c256";
|
||||
reg = <0x51>;
|
||||
pagesize = <64>;
|
||||
label = "sku";
|
||||
};
|
||||
};
|
||||
|
||||
&i2c5 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c6 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c7 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c8 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c9 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c10 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c11 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c12 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c13 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c15 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&kcs1 {
|
||||
aspeed,lpc-io-reg = <0xca0>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&kcs2 {
|
||||
aspeed,lpc-io-reg = <0xca8>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&kcs3 {
|
||||
aspeed,lpc-io-reg = <0xca2>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&lpc_reset {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&rtc {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sgpiom0 {
|
||||
ngpios = <80>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart_routing {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart3 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart4 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart5 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&video {
|
||||
memory-region = <&video_engine_memory>;
|
||||
status = "okay";
|
||||
};
|
||||
|
|
@ -68,13 +68,12 @@
|
|||
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
|
||||
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
|
||||
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
|
||||
clocks = <&syscon ASPEED_CLK_HPLL>;
|
||||
arm,cpu-registers-not-fw-configured;
|
||||
always-on;
|
||||
};
|
||||
|
||||
edac: sdram@1e6e0000 {
|
||||
compatible = "aspeed,ast2600-sdram-edac", "syscon";
|
||||
compatible = "aspeed,ast2600-sdram-edac";
|
||||
reg = <0x1e6e0000 0x174>;
|
||||
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
|
@ -866,15 +865,6 @@
|
|||
interrupt-controller;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
udma: dma-controller@1e79e000 {
|
||||
compatible = "aspeed,ast2600-udma";
|
||||
reg = <0x1e79e000 0x1000>;
|
||||
interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dma-channels = <28>;
|
||||
#dma-cells = <1>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -88,13 +88,13 @@
|
|||
#size-cells = <0>;
|
||||
|
||||
eeprom@0 {
|
||||
at25,byte-len = <0x80000>;
|
||||
at25,addr-mode = <4>;
|
||||
at25,page-size = <256>;
|
||||
|
||||
compatible = "atmel,at25";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <1000000>;
|
||||
|
||||
address-width = <24>;
|
||||
pagesize = <256>;
|
||||
size = <0x80000>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -105,13 +105,13 @@
|
|||
#size-cells = <0>;
|
||||
|
||||
eeprom@0 {
|
||||
at25,byte-len = <0x80000>;
|
||||
at25,addr-mode = <4>;
|
||||
at25,page-size = <256>;
|
||||
|
||||
compatible = "atmel,at25";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <1000000>;
|
||||
|
||||
address-width = <24>;
|
||||
pagesize = <256>;
|
||||
size = <0x80000>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -122,13 +122,13 @@
|
|||
#size-cells = <0>;
|
||||
|
||||
eeprom@0 {
|
||||
at25,byte-len = <0x80000>;
|
||||
at25,addr-mode = <4>;
|
||||
at25,page-size = <256>;
|
||||
|
||||
compatible = "atmel,at25";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <1000000>;
|
||||
|
||||
address-width = <24>;
|
||||
pagesize = <256>;
|
||||
size = <0x80000>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -139,13 +139,13 @@
|
|||
#size-cells = <0>;
|
||||
|
||||
eeprom@0 {
|
||||
at25,byte-len = <0x80000>;
|
||||
at25,addr-mode = <4>;
|
||||
at25,page-size = <256>;
|
||||
|
||||
compatible = "atmel,at25";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <1000000>;
|
||||
|
||||
address-width = <24>;
|
||||
pagesize = <256>;
|
||||
size = <0x80000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -257,13 +257,13 @@
|
|||
#size-cells = <0>;
|
||||
|
||||
eeprom@0 {
|
||||
at25,byte-len = <0x80000>;
|
||||
at25,addr-mode = <4>;
|
||||
at25,page-size = <256>;
|
||||
|
||||
compatible = "atmel,at25";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <1000000>;
|
||||
|
||||
address-width = <24>;
|
||||
pagesize = <256>;
|
||||
size = <0x80000>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -274,13 +274,13 @@
|
|||
#size-cells = <0>;
|
||||
|
||||
eeprom@0 {
|
||||
at25,byte-len = <0x80000>;
|
||||
at25,addr-mode = <4>;
|
||||
at25,page-size = <256>;
|
||||
|
||||
compatible = "atmel,at25";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <1000000>;
|
||||
|
||||
address-width = <24>;
|
||||
pagesize = <256>;
|
||||
size = <0x80000>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -291,13 +291,13 @@
|
|||
#size-cells = <0>;
|
||||
|
||||
eeprom@0 {
|
||||
at25,byte-len = <0x80000>;
|
||||
at25,addr-mode = <4>;
|
||||
at25,page-size = <256>;
|
||||
|
||||
compatible = "atmel,at25";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <1000000>;
|
||||
|
||||
address-width = <24>;
|
||||
pagesize = <256>;
|
||||
size = <0x80000>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -308,13 +308,13 @@
|
|||
#size-cells = <0>;
|
||||
|
||||
eeprom@0 {
|
||||
at25,byte-len = <0x80000>;
|
||||
at25,addr-mode = <4>;
|
||||
at25,page-size = <256>;
|
||||
|
||||
compatible = "atmel,at25";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <1000000>;
|
||||
|
||||
address-width = <24>;
|
||||
pagesize = <256>;
|
||||
size = <0x80000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -739,13 +739,13 @@
|
|||
#size-cells = <0>;
|
||||
|
||||
eeprom@0 {
|
||||
at25,byte-len = <0x80000>;
|
||||
at25,addr-mode = <4>;
|
||||
at25,page-size = <256>;
|
||||
|
||||
compatible = "atmel,at25";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <1000000>;
|
||||
|
||||
address-width = <24>;
|
||||
pagesize = <256>;
|
||||
size = <0x80000>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -756,13 +756,13 @@
|
|||
#size-cells = <0>;
|
||||
|
||||
eeprom@0 {
|
||||
at25,byte-len = <0x80000>;
|
||||
at25,addr-mode = <4>;
|
||||
at25,page-size = <256>;
|
||||
|
||||
compatible = "atmel,at25";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <1000000>;
|
||||
|
||||
address-width = <24>;
|
||||
pagesize = <256>;
|
||||
size = <0x80000>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -773,13 +773,13 @@
|
|||
#size-cells = <0>;
|
||||
|
||||
eeprom@0 {
|
||||
at25,byte-len = <0x80000>;
|
||||
at25,addr-mode = <4>;
|
||||
at25,page-size = <256>;
|
||||
|
||||
compatible = "atmel,at25";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <1000000>;
|
||||
|
||||
address-width = <24>;
|
||||
pagesize = <256>;
|
||||
size = <0x80000>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -790,13 +790,13 @@
|
|||
#size-cells = <0>;
|
||||
|
||||
eeprom@0 {
|
||||
at25,byte-len = <0x80000>;
|
||||
at25,addr-mode = <4>;
|
||||
at25,page-size = <256>;
|
||||
|
||||
compatible = "atmel,at25";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <1000000>;
|
||||
|
||||
address-width = <24>;
|
||||
pagesize = <256>;
|
||||
size = <0x80000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -1114,13 +1114,13 @@
|
|||
#size-cells = <0>;
|
||||
|
||||
eeprom@0 {
|
||||
at25,byte-len = <0x80000>;
|
||||
at25,addr-mode = <4>;
|
||||
at25,page-size = <256>;
|
||||
|
||||
compatible = "atmel,at25";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <1000000>;
|
||||
|
||||
address-width = <24>;
|
||||
pagesize = <256>;
|
||||
size = <0x80000>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -1131,13 +1131,13 @@
|
|||
#size-cells = <0>;
|
||||
|
||||
eeprom@0 {
|
||||
at25,byte-len = <0x80000>;
|
||||
at25,addr-mode = <4>;
|
||||
at25,page-size = <256>;
|
||||
|
||||
compatible = "atmel,at25";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <1000000>;
|
||||
|
||||
address-width = <24>;
|
||||
pagesize = <256>;
|
||||
size = <0x80000>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -1148,13 +1148,13 @@
|
|||
#size-cells = <0>;
|
||||
|
||||
eeprom@0 {
|
||||
at25,byte-len = <0x80000>;
|
||||
at25,addr-mode = <4>;
|
||||
at25,page-size = <256>;
|
||||
|
||||
compatible = "atmel,at25";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <1000000>;
|
||||
|
||||
address-width = <24>;
|
||||
pagesize = <256>;
|
||||
size = <0x80000>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
@ -1165,13 +1165,13 @@
|
|||
#size-cells = <0>;
|
||||
|
||||
eeprom@0 {
|
||||
at25,byte-len = <0x80000>;
|
||||
at25,addr-mode = <4>;
|
||||
at25,page-size = <256>;
|
||||
|
||||
compatible = "atmel,at25";
|
||||
reg = <0>;
|
||||
spi-max-frequency = <1000000>;
|
||||
|
||||
address-width = <24>;
|
||||
pagesize = <256>;
|
||||
size = <0x80000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -415,7 +415,7 @@
|
|||
* The firmware will find whether the emmc2bus alias is defined, and if
|
||||
* so, it'll edit the dma-ranges property below accordingly.
|
||||
*/
|
||||
emmc2bus: emmc2bus {
|
||||
emmc2bus: emmc2-bus@fe000000 {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
|
|
@ -542,7 +542,7 @@
|
|||
};
|
||||
};
|
||||
|
||||
scb {
|
||||
scb-bus@fc000000 {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
|
|
|
|||
|
|
@ -87,12 +87,13 @@
|
|||
};
|
||||
};
|
||||
|
||||
base_fpga_region {
|
||||
base_fpga_region: fpga-region {
|
||||
compatible = "fpga-region";
|
||||
fpga-mgr = <&fpgamgr0>;
|
||||
|
||||
#address-cells = <0x1>;
|
||||
#size-cells = <0x1>;
|
||||
ranges;
|
||||
};
|
||||
|
||||
can0: can@ffc00000 {
|
||||
|
|
@ -785,6 +786,9 @@
|
|||
ocram: sram@ffff0000 {
|
||||
compatible = "mmio-sram";
|
||||
reg = <0xffff0000 0x10000>;
|
||||
#address-cells = <0x1>;
|
||||
#size-cells = <0x1>;
|
||||
ranges;
|
||||
};
|
||||
|
||||
qspi: spi@ff705000 {
|
||||
|
|
|
|||
|
|
@ -80,12 +80,13 @@
|
|||
};
|
||||
};
|
||||
|
||||
base_fpga_region {
|
||||
base_fpga_region: fpga-region {
|
||||
#address-cells = <0x1>;
|
||||
#size-cells = <0x1>;
|
||||
|
||||
compatible = "fpga-region";
|
||||
fpga-mgr = <&fpga_mgr>;
|
||||
ranges;
|
||||
};
|
||||
|
||||
clkmgr@ffd04000 {
|
||||
|
|
@ -686,6 +687,9 @@
|
|||
ocram: sram@ffe00000 {
|
||||
compatible = "mmio-sram";
|
||||
reg = <0xffe00000 0x40000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
};
|
||||
|
||||
eccmgr: eccmgr {
|
||||
|
|
|
|||
|
|
@ -102,4 +102,5 @@ dtb-$(CONFIG_SOC_LAN966) += \
|
|||
lan966x-kontron-kswitch-d10-mmt-8g.dtb \
|
||||
lan966x-pcb8290.dtb \
|
||||
lan966x-pcb8291.dtb \
|
||||
lan966x-pcb8309.dtb
|
||||
lan966x-pcb8309.dtb \
|
||||
lan966x-pcb8385.dtb
|
||||
|
|
|
|||
131
arch/arm/boot/dts/microchip/lan966x-pcb8385.dts
Normal file
131
arch/arm/boot/dts/microchip/lan966x-pcb8385.dts
Normal file
|
|
@ -0,0 +1,131 @@
|
|||
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
|
||||
/*
|
||||
* lan966x-pcb8385.dts - Device Tree file for PCB8385
|
||||
*/
|
||||
/dts-v1/;
|
||||
|
||||
#include "lan966x.dtsi"
|
||||
#include "dt-bindings/phy/phy-lan966x-serdes.h"
|
||||
|
||||
/ {
|
||||
model = "Microchip EVB - LAN9668";
|
||||
compatible = "microchip,lan9668-pcb8385", "microchip,lan9668", "microchip,lan966";
|
||||
|
||||
aliases {
|
||||
serial0 = &usart3;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial0:115200n8";
|
||||
};
|
||||
|
||||
gpio-restart {
|
||||
compatible = "gpio-restart";
|
||||
gpios = <&gpio 59 GPIO_ACTIVE_LOW>;
|
||||
open-source;
|
||||
priority = <200>;
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led-p1-green {
|
||||
label = "cu0:green";
|
||||
gpios = <&sgpio_out 2 0 GPIO_ACTIVE_LOW>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-p1-yellow {
|
||||
label = "cu0:yellow";
|
||||
gpios = <&sgpio_out 2 1 GPIO_ACTIVE_LOW>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-p2-green {
|
||||
label = "cu1:green";
|
||||
gpios = <&sgpio_out 3 0 GPIO_ACTIVE_LOW>;
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led-p2-yellow {
|
||||
label = "cu1:yellow";
|
||||
gpios = <&sgpio_out 3 1 GPIO_ACTIVE_LOW>;
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&aes {
|
||||
status = "reserved"; /* Reserved by secure OS */
|
||||
};
|
||||
|
||||
&flx0 {
|
||||
atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&flx3 {
|
||||
atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gpio {
|
||||
fc0_b_pins: fc0-b-pins {
|
||||
/* SCL, SDA */
|
||||
pins = "GPIO_25", "GPIO_26";
|
||||
function = "fc0_b";
|
||||
};
|
||||
|
||||
fc3_b_pins: fc3-b-pins {
|
||||
/* RX, TX */
|
||||
pins = "GPIO_52", "GPIO_53";
|
||||
function = "fc3_b";
|
||||
};
|
||||
|
||||
sgpio_a_pins: sgpio-a-pins {
|
||||
/* SCK, D0, D1, LD */
|
||||
pins = "GPIO_32", "GPIO_33", "GPIO_34", "GPIO_35";
|
||||
function = "sgpio_a";
|
||||
};
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
pinctrl-0 = <&fc0_b_pins>;
|
||||
pinctrl-names = "default";
|
||||
dmas = <0>, <0>;
|
||||
i2c-analog-filter;
|
||||
i2c-digital-filter;
|
||||
i2c-digital-filter-width-ns = <35>;
|
||||
i2c-sda-hold-time-ns = <1500>;
|
||||
status = "okay";
|
||||
|
||||
eeprom@54 {
|
||||
compatible = "atmel,24c01";
|
||||
reg = <0x54>;
|
||||
};
|
||||
|
||||
eeprom@55 {
|
||||
compatible = "atmel,24c01";
|
||||
reg = <0x55>;
|
||||
};
|
||||
};
|
||||
|
||||
&sgpio {
|
||||
pinctrl-0 = <&sgpio_a_pins>;
|
||||
pinctrl-names = "default";
|
||||
microchip,sgpio-port-ranges = <0 3>;
|
||||
status = "okay";
|
||||
|
||||
gpio@0 {
|
||||
ngpios = <64>;
|
||||
};
|
||||
gpio@1 {
|
||||
ngpios = <64>;
|
||||
};
|
||||
};
|
||||
|
||||
&usart3 {
|
||||
pinctrl-0 = <&fc3_b_pins>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
|
@ -414,10 +414,26 @@
|
|||
dma-names = "tx", "rx";
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
atmel,fifo-size = <32>;
|
||||
atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
spi0: spi@400 {
|
||||
compatible = "microchip,sama7d65-spi", "atmel,at91rm9200-spi";
|
||||
reg = <0x400 0x200>;
|
||||
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 34>;
|
||||
clock-names = "spi_clk";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
dmas = <&dma1 AT91_XDMAC_DT_PERID(6)>,
|
||||
<&dma1 AT91_XDMAC_DT_PERID(5)>;
|
||||
dma-names = "tx", "rx";
|
||||
atmel,fifo-size = <32>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c0: i2c@600 {
|
||||
compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c";
|
||||
reg = <0x600 0x200>;
|
||||
|
|
@ -442,6 +458,22 @@
|
|||
#size-cells = <1>;
|
||||
status = "disabled";
|
||||
|
||||
uart1: serial@200 {
|
||||
compatible = "microchip,sama7d65-usart", "atmel,at91sam9260-usart";
|
||||
reg = <0x200 0x200>;
|
||||
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 35>;
|
||||
clock-names = "usart";
|
||||
dmas = <&dma0 AT91_XDMAC_DT_PERID(8)>,
|
||||
<&dma0 AT91_XDMAC_DT_PERID(7)>;
|
||||
dma-names = "tx", "rx";
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
atmel,fifo-size = <32>;
|
||||
atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
spi1: spi@400 {
|
||||
compatible = "microchip,sama7d65-spi", "atmel,at91rm9200-spi";
|
||||
reg = <0x400 0x200>;
|
||||
|
|
@ -492,9 +524,39 @@
|
|||
dma-names = "tx", "rx";
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
atmel,fifo-size = <32>;
|
||||
atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
spi2: spi@400 {
|
||||
compatible = "microchip,sama7d65-spi", "atmel,at91rm9200-spi";
|
||||
reg = <0x400 0x200>;
|
||||
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 36>;
|
||||
clock-names = "spi_clk";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
dmas = <&dma1 AT91_XDMAC_DT_PERID(10)>,
|
||||
<&dma1 AT91_XDMAC_DT_PERID(9)>;
|
||||
dma-names = "tx", "rx";
|
||||
atmel,fifo-size = <32>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c2: i2c@600 {
|
||||
compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c";
|
||||
reg = <0x600 0x200>;
|
||||
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 36>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
dmas = <&dma1 AT91_XDMAC_DT_PERID(10)>,
|
||||
<&dma1 AT91_XDMAC_DT_PERID(9)>;
|
||||
dma-names = "tx", "rx";
|
||||
atmel,fifo-size = <32>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
flx3: flexcom@e182c000 {
|
||||
|
|
@ -517,10 +579,26 @@
|
|||
dma-names = "tx", "rx";
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
atmel,fifo-size = <32>;
|
||||
atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
spi3: spi@400 {
|
||||
compatible = "microchip,sama7d65-spi", "atmel,at91rm9200-spi";
|
||||
reg = <0x400 0x200>;
|
||||
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 37>;
|
||||
clock-names = "spi_clk";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
dmas = <&dma0 AT91_XDMAC_DT_PERID(12)>,
|
||||
<&dma0 AT91_XDMAC_DT_PERID(11)>;
|
||||
dma-names = "tx", "rx";
|
||||
atmel,fifo-size = <32>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c3: i2c@600 {
|
||||
compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c";
|
||||
reg = <0x600 0x200>;
|
||||
|
|
@ -576,6 +654,20 @@
|
|||
atmel,fifo-size = <32>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c4: i2c@600 {
|
||||
compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c";
|
||||
reg = <0x600 0x200>;
|
||||
interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 38>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
dmas = <&dma1 AT91_XDMAC_DT_PERID(14)>,
|
||||
<&dma1 AT91_XDMAC_DT_PERID(13)>;
|
||||
dma-names = "tx", "rx";
|
||||
atmel,fifo-size = <32>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
flx5: flexcom@e201c000 {
|
||||
|
|
@ -587,6 +679,37 @@
|
|||
#size-cells = <1>;
|
||||
status = "disabled";
|
||||
|
||||
uart5: serial@200 {
|
||||
compatible = "microchip,sama7d65-usart", "atmel,at91sam9260-usart";
|
||||
reg = <0x200 0x200>;
|
||||
interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 39>;
|
||||
clock-names = "usart";
|
||||
dmas = <&dma0 AT91_XDMAC_DT_PERID(16)>,
|
||||
<&dma0 AT91_XDMAC_DT_PERID(15)>;
|
||||
dma-names = "tx", "rx";
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
atmel,fifo-size = <32>;
|
||||
atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
spi5: spi@400 {
|
||||
compatible = "microchip,sama7d65-spi", "atmel,at91rm9200-spi";
|
||||
reg = <0x400 0x200>;
|
||||
interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 39>;
|
||||
clock-names = "spi_clk";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
dmas = <&dma0 AT91_XDMAC_DT_PERID(16)>,
|
||||
<&dma0 AT91_XDMAC_DT_PERID(15)>;
|
||||
dma-names = "tx", "rx";
|
||||
atmel,fifo-size = <32>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c5: i2c@600 {
|
||||
compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c";
|
||||
reg = <0x600 0x200>;
|
||||
|
|
@ -617,10 +740,44 @@
|
|||
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 40>;
|
||||
clock-names = "usart";
|
||||
dmas = <&dma1 AT91_XDMAC_DT_PERID(18)>,
|
||||
<&dma1 AT91_XDMAC_DT_PERID(17)>;
|
||||
dma-names = "tx", "rx";
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
|
||||
atmel,fifo-size = <32>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
spi6: spi@400 {
|
||||
compatible = "microchip,sama7d65-spi", "atmel,at91rm9200-spi";
|
||||
reg = <0x400 0x200>;
|
||||
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 40>;
|
||||
clock-names = "spi_clk";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
dmas = <&dma1 AT91_XDMAC_DT_PERID(18)>,
|
||||
<&dma1 AT91_XDMAC_DT_PERID(17)>;
|
||||
dma-names = "tx", "rx";
|
||||
atmel,fifo-size = <32>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c6: i2c@600 {
|
||||
compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c";
|
||||
reg = <0x600 0x200>;
|
||||
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 40>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
dmas = <&dma1 AT91_XDMAC_DT_PERID(18)>,
|
||||
<&dma1 AT91_XDMAC_DT_PERID(17)>;
|
||||
dma-names = "tx", "rx";
|
||||
atmel,fifo-size = <32>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
flx7: flexcom@e2024000 {
|
||||
|
|
@ -647,6 +804,35 @@
|
|||
atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
spi7: spi@400 {
|
||||
compatible = "microchip,sama7d65-spi", "atmel,at91rm9200-spi";
|
||||
reg = <0x400 0x200>;
|
||||
interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 41>;
|
||||
clock-names = "spi_clk";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
dmas = <&dma1 AT91_XDMAC_DT_PERID(20)>,
|
||||
<&dma1 AT91_XDMAC_DT_PERID(19)>;
|
||||
dma-names = "tx", "rx";
|
||||
atmel,fifo-size = <32>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c7: i2c@600 {
|
||||
compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c";
|
||||
reg = <0x600 0x200>;
|
||||
interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 41>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
dmas = <&dma1 AT91_XDMAC_DT_PERID(20)>,
|
||||
<&dma1 AT91_XDMAC_DT_PERID(19)>;
|
||||
dma-names = "tx", "rx";
|
||||
atmel,fifo-size = <32>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
flx8: flexcom@e281c000 {
|
||||
|
|
@ -658,6 +844,37 @@
|
|||
#size-cells = <1>;
|
||||
status = "disabled";
|
||||
|
||||
uart8: serial@200 {
|
||||
compatible = "microchip,sama7d65-usart", "atmel,at91sam9260-usart";
|
||||
reg = <0x200 0x200>;
|
||||
interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 42>;
|
||||
clock-names = "usart";
|
||||
dmas = <&dma0 AT91_XDMAC_DT_PERID(22)>,
|
||||
<&dma0 AT91_XDMAC_DT_PERID(21)>;
|
||||
dma-names = "tx", "rx";
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
atmel,fifo-size = <32>;
|
||||
atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
spi8: spi@400 {
|
||||
compatible = "microchip,sama7d65-spi", "atmel,at91rm9200-spi";
|
||||
reg = <0x400 0x200>;
|
||||
interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 42>;
|
||||
clock-names = "spi_clk";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
dmas = <&dma0 AT91_XDMAC_DT_PERID(22)>,
|
||||
<&dma0 AT91_XDMAC_DT_PERID(21)>;
|
||||
dma-names = "tx", "rx";
|
||||
atmel,fifo-size = <32>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c8: i2c@600 {
|
||||
compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c";
|
||||
reg = <0x600 0x200>;
|
||||
|
|
@ -682,6 +899,37 @@
|
|||
#size-cells = <1>;
|
||||
status = "disabled";
|
||||
|
||||
uart9: serial@200 {
|
||||
compatible = "microchip,sama7d65-usart", "atmel,at91sam9260-usart";
|
||||
reg = <0x200 0x200>;
|
||||
interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 43>;
|
||||
clock-names = "usart";
|
||||
dmas = <&dma0 AT91_XDMAC_DT_PERID(24)>,
|
||||
<&dma0 AT91_XDMAC_DT_PERID(23)>;
|
||||
dma-names = "tx", "rx";
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
atmel,fifo-size = <32>;
|
||||
atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
spi9: spi@400 {
|
||||
compatible = "microchip,sama7d65-spi", "atmel,at91rm9200-spi";
|
||||
reg = <0x400 0x200>;
|
||||
interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 43>;
|
||||
clock-names = "spi_clk";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
dmas = <&dma0 AT91_XDMAC_DT_PERID(24)>,
|
||||
<&dma0 AT91_XDMAC_DT_PERID(23)>;
|
||||
dma-names = "tx", "rx";
|
||||
atmel,fifo-size = <32>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c9: i2c@600 {
|
||||
compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c";
|
||||
reg = <0x600 0x200>;
|
||||
|
|
@ -706,6 +954,37 @@
|
|||
#size-cells = <1>;
|
||||
status = "disabled";
|
||||
|
||||
uart10: serial@200 {
|
||||
compatible = "microchip,sama7d65-usart", "atmel,at91sam9260-usart";
|
||||
reg = <0x200 0x200>;
|
||||
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 44>;
|
||||
clock-names = "usart";
|
||||
dmas = <&dma0 AT91_XDMAC_DT_PERID(26)>,
|
||||
<&dma0 AT91_XDMAC_DT_PERID(25)>;
|
||||
dma-names = "tx", "rx";
|
||||
atmel,use-dma-rx;
|
||||
atmel,use-dma-tx;
|
||||
atmel,fifo-size = <32>;
|
||||
atmel,usart-mode = <AT91_USART_MODE_SERIAL>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
spi10: spi@400 {
|
||||
compatible = "microchip,sama7d65-spi", "atmel,at91rm9200-spi";
|
||||
reg = <0x400 0x200>;
|
||||
interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&pmc PMC_TYPE_PERIPHERAL 44>;
|
||||
clock-names = "spi_clk";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
dmas = <&dma0 AT91_XDMAC_DT_PERID(26)>,
|
||||
<&dma0 AT91_XDMAC_DT_PERID(25)>;
|
||||
dma-names = "tx", "rx";
|
||||
atmel,fifo-size = <32>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c10: i2c@600 {
|
||||
compatible = "microchip,sama7d65-i2c", "microchip,sam9x60-i2c";
|
||||
reg = <0x600 0x200>;
|
||||
|
|
|
|||
|
|
@ -1,93 +0,0 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-only
|
||||
/*
|
||||
* calao-dab-mmx.dtsi - Device Tree Include file for Calao DAB-MMX Daughter Board
|
||||
*
|
||||
* Copyright (C) 2011 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
||||
*/
|
||||
|
||||
/ {
|
||||
ahb {
|
||||
apb {
|
||||
usart1: serial@fffb4000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
usart3: serial@fffd0000 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
i2c-gpio@0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
user_led1 {
|
||||
label = "user_led1";
|
||||
gpios = <&pioB 20 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
/*
|
||||
* led already used by mother board but active as high
|
||||
* user_led2 {
|
||||
* label = "user_led2";
|
||||
* gpios = <&pioB 21 GPIO_ACTIVE_LOW>;
|
||||
* };
|
||||
*/
|
||||
user_led3 {
|
||||
label = "user_led3";
|
||||
gpios = <&pioB 22 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
user_led4 {
|
||||
label = "user_led4";
|
||||
gpios = <&pioB 23 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
red {
|
||||
label = "red";
|
||||
gpios = <&pioB 24 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
orange {
|
||||
label = "orange";
|
||||
gpios = <&pioB 30 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
green {
|
||||
label = "green";
|
||||
gpios = <&pioB 31 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
};
|
||||
|
||||
gpio_keys {
|
||||
compatible = "gpio-keys";
|
||||
|
||||
button-user-pb1 {
|
||||
label = "user_pb1";
|
||||
gpios = <&pioB 25 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <0x100>;
|
||||
};
|
||||
|
||||
button-user-pb2 {
|
||||
label = "user_pb2";
|
||||
gpios = <&pioB 13 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <0x101>;
|
||||
};
|
||||
|
||||
button-user-pb3 {
|
||||
label = "user_pb3";
|
||||
gpios = <&pioA 26 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <0x102>;
|
||||
};
|
||||
|
||||
button-user-pb4 {
|
||||
label = "user_pb4";
|
||||
gpios = <&pioC 9 GPIO_ACTIVE_LOW>;
|
||||
linux,code = <0x103>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -154,7 +154,7 @@
|
|||
status = "disabled";
|
||||
reg = <0xf0842000 0x200>;
|
||||
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clk NPCM7XX_CLK_AHB>;
|
||||
clocks = <&clk NPCM7XX_CLK_AHB>;
|
||||
clock-names = "clk_mmc";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc8_pins
|
||||
|
|
@ -166,7 +166,7 @@
|
|||
status = "disabled";
|
||||
reg = <0xf0840000 0x200>;
|
||||
interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clk NPCM7XX_CLK_AHB>;
|
||||
clocks = <&clk NPCM7XX_CLK_AHB>;
|
||||
clock-names = "clk_sdhc";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&sd1_pins>;
|
||||
|
|
|
|||
|
|
@ -230,7 +230,11 @@
|
|||
reset-names = "dsi";
|
||||
power-domains = <&pd_core>;
|
||||
operating-points-v2 = <&dsi_dvfs_opp_table>;
|
||||
nvidia,mipi-calibrate = <&csi 3>; /* DSI pad */
|
||||
status = "disabled";
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -343,7 +343,11 @@
|
|||
reset-names = "dsi";
|
||||
power-domains = <&pd_core>;
|
||||
operating-points-v2 = <&dsia_dvfs_opp_table>;
|
||||
nvidia,mipi-calibrate = <&csi 3>; /* DSIA pad */
|
||||
status = "disabled";
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
|
||||
dsi@54400000 {
|
||||
|
|
@ -356,7 +360,11 @@
|
|||
reset-names = "dsi";
|
||||
power-domains = <&pd_core>;
|
||||
operating-points-v2 = <&dsib_dvfs_opp_table>;
|
||||
nvidia,mipi-calibrate = <&csi 4>; /* DSIB pad */
|
||||
status = "disabled";
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -23,6 +23,14 @@
|
|||
stdout-path = &uart1;
|
||||
};
|
||||
|
||||
epd_pmic_supply: regulator-epd-pmic-in {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "epd_pmic_supply";
|
||||
gpio = <&gpio2 14 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
startup-delay-us = <20000>;
|
||||
};
|
||||
|
||||
gpio_keys: gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
|
||||
|
|
@ -119,8 +127,33 @@
|
|||
vdd-supply = <&ldo5_reg>;
|
||||
};
|
||||
|
||||
/* TODO: TPS65185 PMIC for E Ink at 0x68 */
|
||||
tps65185: pmic@68 {
|
||||
compatible = "ti,tps65185";
|
||||
reg = <0x68>;
|
||||
interrupt-parent = <&gpio2>;
|
||||
interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
|
||||
vin-supply = <&epd_pmic_supply>;
|
||||
pwr-good-gpios = <&gpio2 13 GPIO_ACTIVE_HIGH>;
|
||||
vcom-ctrl-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
|
||||
wakeup-gpios = <&gpio2 7 GPIO_ACTIVE_HIGH>;
|
||||
enable-gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
regulators {
|
||||
vcom_reg: vcom {
|
||||
regulator-name = "vcom";
|
||||
};
|
||||
|
||||
vposneg_reg: vposneg {
|
||||
regulator-name = "vposneg";
|
||||
regulator-min-microvolt = <15000000>;
|
||||
regulator-max-microvolt = <15000000>;
|
||||
};
|
||||
|
||||
v3p3_reg: v3p3 {
|
||||
regulator-name = "v3p3";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
|
|
|
|||
|
|
@ -58,6 +58,16 @@
|
|||
};
|
||||
};
|
||||
|
||||
epd_pmic_supply: regulator-epd-pmic-in {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "epd_pmic_supply";
|
||||
gpio = <&gpio1 27 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
startup-delay-us = <20000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_epd_pmic_supply>;
|
||||
};
|
||||
|
||||
sd2_pwrseq: pwrseq {
|
||||
compatible = "mmc-pwrseq-simple";
|
||||
pinctrl-names = "default";
|
||||
|
|
@ -135,7 +145,34 @@
|
|||
pinctrl-0 = <&pinctrl_i2c2>;
|
||||
status = "okay";
|
||||
|
||||
/* TODO: TPS65185 PMIC for E Ink at 0x68 */
|
||||
pmic@68 {
|
||||
compatible = "ti,tps65185";
|
||||
reg = <0x68>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_epd_pmic>;
|
||||
pwr-good-gpios = <&gpio3 28 GPIO_ACTIVE_HIGH>;
|
||||
vcom-ctrl-gpios = <&gpio4 21 GPIO_ACTIVE_HIGH>;
|
||||
enable-gpios = <&gpio3 30 GPIO_ACTIVE_HIGH>;
|
||||
wakeup-gpios = <&gpio3 29 GPIO_ACTIVE_HIGH>;
|
||||
vin-supply = <&epd_pmic_supply>;
|
||||
interrupts-extended = <&gpio4 15 IRQ_TYPE_LEVEL_LOW>;
|
||||
|
||||
regulators {
|
||||
vcom {
|
||||
regulator-name = "vcom";
|
||||
};
|
||||
|
||||
vposneg {
|
||||
regulator-name = "vposneg";
|
||||
regulator-min-microvolt = <15000000>;
|
||||
regulator-max-microvolt = <15000000>;
|
||||
};
|
||||
|
||||
v3p3 {
|
||||
regulator-name = "v3p3";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
|
|
@ -161,6 +198,27 @@
|
|||
>;
|
||||
};
|
||||
|
||||
pinctrl_epd_pmic: epd-pmic-grp {
|
||||
fsl,pins = <
|
||||
/* PWRUP */
|
||||
MX50_PAD_EPDC_PWRCTRL1__GPIO3_30 0x0
|
||||
/* WAKEUP */
|
||||
MX50_PAD_EPDC_PWRCTRL0__GPIO3_29 0x0
|
||||
/* VCOMCTRL */
|
||||
MX50_PAD_EPDC_VCOM0__GPIO4_21 0x0
|
||||
/* PWRGOOD: enable internal 100k pull-up */
|
||||
MX50_PAD_EPDC_PWRSTAT__GPIO3_28 0xe0
|
||||
/* INT: enable internal 100k pull-up */
|
||||
MX50_PAD_ECSPI1_SS0__GPIO4_15 0xe0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_epd_pmic_supply: epd-pmic-supply-grp {
|
||||
fsl,pins = <
|
||||
MX50_PAD_EIM_CRE__GPIO1_27 0x0
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_gpiokeys: gpiokeysgrp {
|
||||
fsl,pins = <
|
||||
MX50_PAD_CSPI_MISO__GPIO4_10 0x0
|
||||
|
|
|
|||
|
|
@ -36,8 +36,12 @@
|
|||
&gpmi {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpmi_nand>;
|
||||
nand-on-flash-bbt;
|
||||
status = "okay";
|
||||
|
||||
nand@0 {
|
||||
reg = <0>;
|
||||
nand-on-flash-bbt;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
|
|
|
|||
|
|
@ -172,8 +172,12 @@
|
|||
&gpmi {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpmi_nand>;
|
||||
nand-on-flash-bbt;
|
||||
status = "okay";
|
||||
|
||||
nand@0 {
|
||||
reg = <0>;
|
||||
nand-on-flash-bbt;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
|
|
|
|||
|
|
@ -102,8 +102,12 @@
|
|||
&gpmi {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpmi_nand>;
|
||||
nand-on-flash-bbt;
|
||||
status = "okay";
|
||||
|
||||
nand@0 {
|
||||
reg = <0>;
|
||||
nand-on-flash-bbt;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
|
|
|
|||
|
|
@ -73,8 +73,12 @@
|
|||
&gpmi {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpmi_nand>;
|
||||
nand-on-flash-bbt;
|
||||
status = "disabled";
|
||||
|
||||
nand@0 {
|
||||
reg = <0>;
|
||||
nand-on-flash-bbt;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
|
|
|
|||
|
|
@ -260,10 +260,14 @@
|
|||
&gpmi {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpmi_nand>;
|
||||
nand-on-flash-bbt;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
status = "okay";
|
||||
|
||||
nand@0 {
|
||||
reg = <0>;
|
||||
nand-on-flash-bbt;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
|
|
|
|||
|
|
@ -252,9 +252,13 @@
|
|||
&gpmi {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpmi_nand>;
|
||||
nand-on-flash-bbt;
|
||||
fsl,no-blockmark-swap;
|
||||
status = "okay";
|
||||
|
||||
nand@0 {
|
||||
reg = <0>;
|
||||
nand-on-flash-bbt;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
|
|
|
|||
|
|
@ -166,6 +166,8 @@
|
|||
compatible = "fsl,imx6q-gpmi-nand";
|
||||
reg = <0x00112000 0x2000>, <0x00114000 0x2000>;
|
||||
reg-names = "gpmi-nand", "bch";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
interrupts = <0 15 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "bch";
|
||||
clocks = <&clks IMX6QDL_CLK_GPMI_IO>,
|
||||
|
|
@ -875,6 +877,7 @@
|
|||
gpc: gpc@20dc000 {
|
||||
compatible = "fsl,imx6q-gpc";
|
||||
reg = <0x020dc000 0x4000>;
|
||||
#address-cells = <0>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <3>;
|
||||
interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
|
|
|||
|
|
@ -37,6 +37,16 @@
|
|||
stdout-path = &uart1;
|
||||
};
|
||||
|
||||
epd_pmic_supply: regulator-epd-pmic-in {
|
||||
compatible = "regulator-fixed";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_epd_pmic_supply>;
|
||||
regulator-name = "epd_pmic_supply";
|
||||
gpio = <&gpio2 14 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
startup-delay-us = <20000>;
|
||||
};
|
||||
|
||||
gpio_keys: gpio-keys {
|
||||
compatible = "gpio-keys";
|
||||
pinctrl-names = "default";
|
||||
|
|
@ -147,8 +157,35 @@
|
|||
touchscreen-inverted-x;
|
||||
};
|
||||
|
||||
/* TODO: TPS65185 PMIC for E Ink at 0x68 */
|
||||
tps65185: pmic@68 {
|
||||
compatible = "ti,tps65185";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_tps65185_gpio>;
|
||||
reg = <0x68>;
|
||||
interrupt-parent = <&gpio2>;
|
||||
interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
|
||||
vin-supply = <&epd_pmic_supply>;
|
||||
pwr-good-gpios = <&gpio2 13 GPIO_ACTIVE_HIGH>;
|
||||
vcom-ctrl-gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
|
||||
wakeup-gpios = <&gpio2 7 GPIO_ACTIVE_HIGH>;
|
||||
enable-gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
regulators {
|
||||
vcom_reg: vcom {
|
||||
regulator-name = "vcom";
|
||||
};
|
||||
|
||||
vposneg_reg: vposneg {
|
||||
regulator-name = "vposneg";
|
||||
regulator-min-microvolt = <15000000>;
|
||||
regulator-max-microvolt = <15000000>;
|
||||
};
|
||||
|
||||
v3p3_reg: v3p3 {
|
||||
regulator-name = "v3p3";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
|
|
@ -328,6 +365,12 @@
|
|||
>;
|
||||
};
|
||||
|
||||
pinctrl_epd_pmic_supply: epdc-pmic-supplygrp {
|
||||
fsl,pins = <
|
||||
MX6SL_PAD_EPDC_PWRWAKEUP__GPIO2_IO14 0x40010059 /* pwrall */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_gpio_keys: gpio-keysgrp {
|
||||
fsl,pins = <
|
||||
MX6SL_PAD_SD1_DAT1__GPIO5_IO08 0x17059
|
||||
|
|
@ -425,6 +468,16 @@
|
|||
>;
|
||||
};
|
||||
|
||||
pinctrl_tps65185_gpio: tps65185-gpio-grp {
|
||||
fsl,pins = <
|
||||
MX6SL_PAD_EPDC_VCOM0__GPIO2_IO03 0x40010059 /* vcom_ctrl */
|
||||
MX6SL_PAD_EPDC_PWRCTRL0__GPIO2_IO07 0x40010059 /* wakeup */
|
||||
MX6SL_PAD_EPDC_PWRCTRL1__GPIO2_IO08 0x40010059 /* enable */
|
||||
MX6SL_PAD_EPDC_PWRCTRL2__GPIO2_IO09 0x17059 /* nINT */
|
||||
MX6SL_PAD_EPDC_PWRSTAT__GPIO2_IO13 0x17059 /* pwr-good */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart1: uart1grp {
|
||||
fsl,pins = <
|
||||
MX6SL_PAD_UART1_TXD__UART1_TX_DATA 0x1b0b1
|
||||
|
|
|
|||
|
|
@ -26,6 +26,11 @@
|
|||
compatible = "kobo,tolino-shine3", "fsl,imx6sl";
|
||||
};
|
||||
|
||||
&epd_pmic_supply {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_epd_pmic_supply>;
|
||||
};
|
||||
|
||||
&gpio_keys {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpio_keys>;
|
||||
|
|
@ -59,6 +64,12 @@
|
|||
>;
|
||||
};
|
||||
|
||||
pinctrl_epd_pmic_supply: epdc-pmic-supplygrp {
|
||||
fsl,pins = <
|
||||
MX6SL_PAD_EPDC_PWRWAKEUP__GPIO2_IO14 0x40010059
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_gpio_keys: gpio-keysgrp {
|
||||
fsl,pins = <
|
||||
MX6SL_PAD_SD1_DAT1__GPIO5_IO08 0x17059 /* PWR_SW */
|
||||
|
|
@ -159,6 +170,16 @@
|
|||
>;
|
||||
};
|
||||
|
||||
pinctrl_tps65185_gpio: tps65185-gpio-grp {
|
||||
fsl,pins = <
|
||||
MX6SL_PAD_EPDC_VCOM0__GPIO2_IO03 0x40010059 /* vcom_ctrl */
|
||||
MX6SL_PAD_EPDC_PWRCTRL0__GPIO2_IO07 0x40010059 /* wakeup */
|
||||
MX6SL_PAD_EPDC_PWRCTRL1__GPIO2_IO08 0x40010059 /* enable */
|
||||
MX6SL_PAD_EPDC_PWRCTRL2__GPIO2_IO09 0x17059 /* nINT */
|
||||
MX6SL_PAD_EPDC_PWRSTAT__GPIO2_IO13 0x17059 /* pwr-good */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart1: uart1grp {
|
||||
fsl,pins = <
|
||||
MX6SL_PAD_UART1_TXD__UART1_TX_DATA 0x1b0b1
|
||||
|
|
@ -308,6 +329,11 @@
|
|||
pinctrl-0 = <&pinctrl_ricoh_gpio>;
|
||||
};
|
||||
|
||||
&tps65185 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_tps65185_gpio>;
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart1>;
|
||||
|
|
|
|||
|
|
@ -776,7 +776,7 @@
|
|||
};
|
||||
|
||||
lcdif: lcdif@20f8000 {
|
||||
compatible = "fsl,imx6sl-lcdif", "fsl,imx28-lcdif";
|
||||
compatible = "fsl,imx6sl-lcdif", "fsl,imx6sx-lcdif";
|
||||
reg = <0x020f8000 0x4000>;
|
||||
interrupts = <0 39 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clks IMX6SL_CLK_LCDIF_PIX>,
|
||||
|
|
|
|||
|
|
@ -16,8 +16,67 @@
|
|||
/ {
|
||||
model = "Kobo Clara 2E";
|
||||
compatible = "kobo,clara2e-b", "kobo,clara2e", "fsl,imx6sll";
|
||||
|
||||
epd_pmic_supply: regulator-epd-pmic-in {
|
||||
compatible = "regulator-fixed";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_epd_pmic_supply>;
|
||||
regulator-name = "epd_pmic_supply";
|
||||
gpio = <&gpio2 14 GPIO_ACTIVE_HIGH>;
|
||||
enable-active-high;
|
||||
startup-delay-us = <20000>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
/* EPD PMIC JD9930 at 0x18 */
|
||||
jd9930: pmic@18 {
|
||||
compatible = "fitipower,jd9930", "fitipower,fp9931";
|
||||
reg = <0x18>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_jd9930_gpio>;
|
||||
vin-supply = <&epd_pmic_supply>;
|
||||
pg-gpios = <&gpio2 7 GPIO_ACTIVE_HIGH>;
|
||||
en-ts-gpios = <&gpio2 9 GPIO_ACTIVE_HIGH>;
|
||||
enable-gpios = <&gpio2 8 GPIO_ACTIVE_HIGH>;
|
||||
fitipower,tdly-ms = <2 2 2 2>;
|
||||
|
||||
regulators {
|
||||
vcom_reg: vcom {
|
||||
regulator-name = "vcom";
|
||||
/*
|
||||
* For optimal performance these should be
|
||||
* tuned on a per batch basis e.g. using
|
||||
* overlays.
|
||||
*/
|
||||
regulator-min-microvolt = <2352840>;
|
||||
regulator-max-microvolt = <2352840>;
|
||||
};
|
||||
|
||||
vposneg_reg: vposneg {
|
||||
regulator-name = "vposneg";
|
||||
regulator-min-microvolt = <15060000>;
|
||||
regulator-max-microvolt = <15060000>;
|
||||
};
|
||||
|
||||
v3p3_reg: v3p3 {
|
||||
regulator-name = "v3p3";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&iomuxc {
|
||||
pinctrl_jd9930_gpio: jd9930-gpiogrp {
|
||||
fsl,pins = <
|
||||
MX6SLL_PAD_EPDC_PWR_CTRL0__GPIO2_IO07 0x17059 /* PG */
|
||||
MX6SLL_PAD_EPDC_PWR_CTRL1__GPIO2_IO08 0x40010059 /* EN */
|
||||
MX6SLL_PAD_EPDC_PWR_CTRL2__GPIO2_IO09 0x40010059 /* EN_TS */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_epd_pmic_supply: epd-pmic-supplygrp {
|
||||
fsl,pins = <
|
||||
MX6SLL_PAD_EPDC_PWR_WAKE__GPIO2_IO14 0x40010059
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -36,6 +36,11 @@
|
|||
soc-supply = <&dcdc1_reg>;
|
||||
};
|
||||
|
||||
&epd_pmic_supply {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_epd_pmic_supply>;
|
||||
};
|
||||
|
||||
&gpio_keys {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpio_keys>;
|
||||
|
|
@ -69,6 +74,12 @@
|
|||
>;
|
||||
};
|
||||
|
||||
pinctrl_epd_pmic_supply: epdc-pmic-supplygrp {
|
||||
fsl,pins = <
|
||||
MX6SLL_PAD_EPDC_PWR_WAKE__GPIO2_IO14 0x40010059
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_gpio_keys: gpio-keysgrp {
|
||||
fsl,pins = <
|
||||
MX6SLL_PAD_SD1_DATA1__GPIO5_IO08 0x17059 /* PWR_SW */
|
||||
|
|
@ -169,6 +180,16 @@
|
|||
>;
|
||||
};
|
||||
|
||||
pinctrl_tps65185_gpio: tps65185-gpio-grp {
|
||||
fsl,pins = <
|
||||
MX6SLL_PAD_EPDC_VCOM0__GPIO2_IO03 0x40010059 /* vcom_ctrl */
|
||||
MX6SLL_PAD_EPDC_PWR_CTRL0__GPIO2_IO07 0x40010059 /* wakeup */
|
||||
MX6SLL_PAD_EPDC_PWR_CTRL1__GPIO2_IO08 0x40010059 /* enable */
|
||||
MX6SLL_PAD_EPDC_PWR_CTRL2__GPIO2_IO09 0x17059 /* nINT */
|
||||
MX6SLL_PAD_EPDC_PWR_STAT__GPIO2_IO13 0x17059 /* pwr-good */
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_uart1: uart1grp {
|
||||
fsl,pins = <
|
||||
MX6SLL_PAD_UART1_TXD__UART1_DCE_TX 0x1b0b1
|
||||
|
|
@ -310,6 +331,11 @@
|
|||
pinctrl-0 = <&pinctrl_ricoh_gpio>;
|
||||
};
|
||||
|
||||
&tps65185 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_tps65185_gpio>;
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_uart1>;
|
||||
|
|
|
|||
|
|
@ -657,7 +657,7 @@
|
|||
};
|
||||
|
||||
lcdif: lcd-controller@20f8000 {
|
||||
compatible = "fsl,imx6sll-lcdif", "fsl,imx28-lcdif";
|
||||
compatible = "fsl,imx6sll-lcdif", "fsl,imx6sx-lcdif";
|
||||
reg = <0x020f8000 0x4000>;
|
||||
interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clks IMX6SLL_CLK_LCDIF_PIX>,
|
||||
|
|
|
|||
|
|
@ -224,7 +224,7 @@
|
|||
gpmi: nand-controller@1806000 {
|
||||
compatible = "fsl,imx6sx-gpmi-nand";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x01806000 0x2000>, <0x01808000 0x4000>;
|
||||
reg-names = "gpmi-nand", "bch";
|
||||
interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
|
|
|||
|
|
@ -133,8 +133,12 @@
|
|||
&gpmi {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpmi_nand>;
|
||||
nand-on-flash-bbt;
|
||||
status = "okay";
|
||||
|
||||
nand@0 {
|
||||
reg = <0>;
|
||||
nand-on-flash-bbt;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
|
|
|
|||
|
|
@ -101,8 +101,12 @@
|
|||
&gpmi {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpmi_nand>;
|
||||
nand-on-flash-bbt;
|
||||
status = "disabled";
|
||||
|
||||
nand@0 {
|
||||
reg = <0>;
|
||||
nand-on-flash-bbt;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
|
|
|
|||
|
|
@ -63,8 +63,12 @@
|
|||
&gpmi {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpmi_nand>;
|
||||
nand-on-flash-bbt;
|
||||
status = "disabled";
|
||||
|
||||
nand@0 {
|
||||
reg = <0>;
|
||||
nand-on-flash-bbt;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
|
|
|
|||
|
|
@ -296,9 +296,13 @@
|
|||
&gpmi {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpmi_nand>;
|
||||
nand-on-flash-bbt;
|
||||
fsl,no-blockmark-swap;
|
||||
status = "okay";
|
||||
|
||||
nand@0 {
|
||||
reg = <0>;
|
||||
nand-on-flash-bbt;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
|
|
|
|||
|
|
@ -160,11 +160,15 @@
|
|||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpmi_nand>;
|
||||
fsl,use-minimum-ecc;
|
||||
nand-on-flash-bbt;
|
||||
nand-ecc-mode = "hw";
|
||||
nand-ecc-strength = <8>;
|
||||
nand-ecc-step-size = <512>;
|
||||
status = "okay";
|
||||
|
||||
nand@0 {
|
||||
reg = <0>;
|
||||
nand-on-flash-bbt;
|
||||
nand-ecc-mode = "hw";
|
||||
nand-ecc-strength = <8>;
|
||||
nand-ecc-step-size = <512>;
|
||||
};
|
||||
};
|
||||
|
||||
/* I2C3_SDA/SCL on SODIMM 194/196 (e.g. RTC on carrier board) */
|
||||
|
|
|
|||
|
|
@ -43,11 +43,15 @@
|
|||
&gpmi {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_gpmi_nand>;
|
||||
nand-ecc-mode = "hw";
|
||||
nand-ecc-strength = <0>;
|
||||
nand-ecc-step-size = <0>;
|
||||
nand-on-flash-bbt;
|
||||
status = "okay";
|
||||
|
||||
nand@0 {
|
||||
reg = <0>;
|
||||
nand-ecc-mode = "hw";
|
||||
nand-ecc-strength = <0>;
|
||||
nand-ecc-step-size = <0>;
|
||||
nand-on-flash-bbt;
|
||||
};
|
||||
};
|
||||
|
||||
&iomuxc {
|
||||
|
|
|
|||
Some files were not shown because too many files have changed in this diff Show more
Loading…
Add table
Add a link
Reference in a new issue