Merge remote-tracking branch 'torvalds/master' into perf-tools-next

Merge with upstream to pick up fixes from perf-tools and from other
tools/ parts that interact with tools/perf.

Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
This commit is contained in:
Arnaldo Carvalho de Melo 2026-01-26 17:03:53 -03:00
commit d3b402c5a2
1017 changed files with 10399 additions and 5838 deletions

View file

@ -12,6 +12,7 @@
#
Aaron Durbin <adurbin@google.com>
Abel Vesa <abelvesa@kernel.org> <abel.vesa@nxp.com>
Abel Vesa <abelvesa@kernel.org> <abel.vesa@linaro.org>
Abel Vesa <abelvesa@kernel.org> <abelvesa@gmail.com>
Abhijeet Dharmapurikar <quic_adharmap@quicinc.com> <adharmap@codeaurora.org>
Abhinav Kumar <quic_abhinavk@quicinc.com> <abhinavk@codeaurora.org>
@ -207,6 +208,7 @@ Daniel Borkmann <daniel@iogearbox.net> <daniel.borkmann@tik.ee.ethz.ch>
Daniel Borkmann <daniel@iogearbox.net> <dborkmann@redhat.com>
Daniel Borkmann <daniel@iogearbox.net> <dborkman@redhat.com>
Daniel Borkmann <daniel@iogearbox.net> <dxchgb@gmail.com>
Daniel Thompson <danielt@kernel.org> <daniel.thompson@linaro.org>
Danilo Krummrich <dakr@kernel.org> <dakr@redhat.com>
David Brownell <david-b@pacbell.net>
David Collins <quic_collinsd@quicinc.com> <collinsd@codeaurora.org>
@ -416,6 +418,7 @@ Juha Yrjola <at solidboot.com>
Juha Yrjola <juha.yrjola@nokia.com>
Juha Yrjola <juha.yrjola@solidboot.com>
Julien Thierry <julien.thierry.kdev@gmail.com> <julien.thierry@arm.com>
Justin Iurman <justin.iurman@gmail.com> <justin.iurman@uliege.be>
Iskren Chernev <me@iskren.info> <iskren.chernev@gmail.com>
Kalle Valo <kvalo@kernel.org> <kvalo@codeaurora.org>
Kalle Valo <kvalo@kernel.org> <quic_kvalo@quicinc.com>
@ -472,6 +475,10 @@ Linas Vepstas <linas@austin.ibm.com>
Linus Lüssing <linus.luessing@c0d3.blue> <linus.luessing@ascom.ch>
Linus Lüssing <linus.luessing@c0d3.blue> <linus.luessing@web.de>
Linus Lüssing <linus.luessing@c0d3.blue> <ll@simonwunderlich.de>
Linus Walleij <linusw@kernel.org> <linus.walleij@ericsson.com>
Linus Walleij <linusw@kernel.org> <linus.walleij@stericsson.com>
Linus Walleij <linusw@kernel.org> <linus.walleij@linaro.org>
Linus Walleij <linusw@kernel.org> <triad@df.lth.se>
<linux-hardening@vger.kernel.org> <kernel-hardening@lists.openwall.com>
Li Yang <leoyang.li@nxp.com> <leoli@freescale.com>
Li Yang <leoyang.li@nxp.com> <leo@zh-kernel.org>
@ -789,6 +796,7 @@ Sven Eckelmann <sven@narfation.org> <sven.eckelmann@open-mesh.com>
Sven Eckelmann <sven@narfation.org> <sven.eckelmann@openmesh.com>
Sven Eckelmann <sven@narfation.org> <sven@open-mesh.com>
Sven Peter <sven@kernel.org> <sven@svenpeter.dev>
Szymon Wilczek <swilczek.lx@gmail.com> <szymonwilczek@gmx.com>
Takashi YOSHII <takashi.yoshii.zj@renesas.com>
Tamizh Chelvam Raja <quic_tamizhr@quicinc.com> <tamizhr@codeaurora.org>
Taniya Das <quic_tdas@quicinc.com> <tdas@codeaurora.org>
@ -796,6 +804,7 @@ Tanzir Hasan <tanzhasanwork@gmail.com> <tanzirh@google.com>
Tejun Heo <htejun@gmail.com>
Tomeu Vizoso <tomeu@tomeuvizoso.net> <tomeu.vizoso@collabora.com>
Thomas Graf <tgraf@suug.ch>
Thomas Gleixner <tglx@kernel.org> <tglx@linutronix.de>
Thomas Körper <socketcan@esd.eu> <thomas.koerper@esd.eu>
Thomas Pedersen <twp@codeaurora.org>
Thorsten Blum <thorsten.blum@linux.dev> <thorsten.blum@toblux.com>
@ -870,6 +879,8 @@ Wolfram Sang <wsa@kernel.org> <wsa@the-dreams.de>
Yakir Yang <kuankuan.y@gmail.com> <ykk@rock-chips.com>
Yanteng Si <si.yanteng@linux.dev> <siyanteng@loongson.cn>
Ying Huang <huang.ying.caritas@gmail.com> <ying.huang@intel.com>
Yixun Lan <dlan@kernel.org> <dlan@gentoo.org>
Yixun Lan <dlan@kernel.org> <yixun.lan@amlogic.com>
Yosry Ahmed <yosry.ahmed@linux.dev> <yosryahmed@google.com>
Yu-Chun Lin <eleanor.lin@realtek.com> <eleanor15x@gmail.com>
Yusuke Goda <goda.yusuke@renesas.com>

View file

@ -1398,7 +1398,7 @@ D: SRM environment driver (for Alpha systems)
P: 1024D/8399E1BB 250D 3BCF 7127 0D8C A444 A961 1DBD 5E75 8399 E1BB
N: Thomas Gleixner
E: tglx@linutronix.de
E: tglx@kernel.org
D: NAND flash hardware support, JFFS2 on NAND flash
N: Jérôme Glisse
@ -2231,6 +2231,10 @@ S: Markham, Ontario
S: L3R 8B2
S: Canada
N: Krzysztof Kozlowski
E: krzk@kernel.org
D: NFC network subsystem and drivers maintainer
N: Christian Krafft
D: PowerPC Cell support

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@ -1,5 +1,5 @@
What: /sys/kernel/time/aux_clocks/<ID>/enable
Date: May 2025
Contact: Thomas Gleixner <tglx@linutronix.de>
Contact: Thomas Gleixner <tglx@kernel.org>
Description:
Controls the enablement of auxiliary clock timekeepers.

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@ -17,14 +17,14 @@ Date: January 2012
contact: Lee Jones <lee@kernel.org>
Description:
Read-only attribute common to all SoCs. Contains the SoC machine
name (e.g. Ux500).
name (e.g. DB8500).
What: /sys/devices/socX/family
Date: January 2012
contact: Lee Jones <lee@kernel.org>
Description:
Read-only attribute common to all SoCs. Contains SoC family name
(e.g. DB8500).
(e.g. ux500).
On many of ARM based silicon with SMCCC v1.2+ compliant firmware
this will contain the JEDEC JEP106 manufacturers identification

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@ -2917,6 +2917,41 @@ Kernel parameters
for Movable pages. "nn[KMGTPE]", "nn%", and "mirror"
are exclusive, so you cannot specify multiple forms.
kfence.burst= [MM,KFENCE] The number of additional successive
allocations to be attempted through KFENCE for each
sample interval.
Format: <unsigned integer>
Default: 0
kfence.check_on_panic=
[MM,KFENCE] Whether to check all KFENCE-managed objects'
canaries on panic.
Format: <bool>
Default: false
kfence.deferrable=
[MM,KFENCE] Whether to use a deferrable timer to trigger
allocations. This avoids forcing CPU wake-ups if the
system is idle, at the risk of a less predictable
sample interval.
Format: <bool>
Default: CONFIG_KFENCE_DEFERRABLE
kfence.sample_interval=
[MM,KFENCE] KFENCE's sample interval in milliseconds.
Format: <unsigned integer>
0 - Disable KFENCE.
>0 - Enabled KFENCE with given sample interval.
Default: CONFIG_KFENCE_SAMPLE_INTERVAL
kfence.skip_covered_thresh=
[MM,KFENCE] If pool utilization reaches this threshold
(pool usage%), KFENCE limits currently covered
allocations of the same source from further filling
up the pool.
Format: <unsigned integer>
Default: 75
kgdbdbgp= [KGDB,HW,EARLY] kgdb over EHCI usb debug port.
Format: <Controller#>[,poll interval]
The controller # is the number of the ehci usb debug

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@ -105,7 +105,7 @@ information.
Manual fan control on the other hand, is not exposed directly by the AWCC
interface. Instead it let's us control a fan `boost` value. This `boost` value
has the following aproximate behavior over the fan pwm:
has the following approximate behavior over the fan pwm:
::

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@ -303,6 +303,14 @@ netdev_max_backlog
Maximum number of packets, queued on the INPUT side, when the interface
receives packets faster than kernel can process them.
qdisc_max_burst
------------------
Maximum number of packets that can be temporarily stored before
reaching qdisc.
Default: 1000
netdev_rss_key
--------------

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@ -231,6 +231,8 @@ eventually gets pushed out to disk. This tunable is used to define when dirty
inode is old enough to be eligible for writeback by the kernel flusher threads.
And, it is also used as the interval to wakeup dirtytime_writeback thread.
Setting this to zero disables periodic dirtytime writeback.
dirty_writeback_centisecs
=========================
@ -494,6 +496,10 @@ memory allocations.
The default value depends on CONFIG_MEM_ALLOC_PROFILING_ENABLED_BY_DEFAULT.
When CONFIG_MEM_ALLOC_PROFILING_DEBUG=y, this control is read-only to avoid
warnings produced by allocations made while profiling is disabled and freed
when it's enabled.
memory_failure_early_kill
=========================

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@ -7,7 +7,9 @@ ISA string ordering in /proc/cpuinfo
------------------------------------
The canonical order of ISA extension names in the ISA string is defined in
chapter 27 of the unprivileged specification.
Chapter 27 of the RISC-V Instruction Set Manual Volume I Unprivileged ISA
(Document Version 20191213).
The specification uses vague wording, such as should, when it comes to ordering,
so for our purposes the following rules apply:

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@ -14,7 +14,7 @@ set of mailbox registers.
More details on the interface can be found in chapter
"7 Host System Management Port (HSMP)" of the family/model PPR
Eg: https://www.amd.com/content/dam/amd/en/documents/epyc-technical-docs/programmer-references/55898_B1_pub_0_50.zip
Eg: https://docs.amd.com/v/u/en-US/55898_B1_pub_0_50
HSMP interface is supported on EPYC line of server CPUs and MI300A (APU).
@ -185,7 +185,7 @@ what happened. The transaction returns 0 on success.
More details on the interface and message definitions can be found in chapter
"7 Host System Management Port (HSMP)" of the respective family/model PPR
eg: https://www.amd.com/content/dam/amd/en/documents/epyc-technical-docs/programmer-references/55898_B1_pub_0_50.zip
eg: https://docs.amd.com/v/u/en-US/55898_B1_pub_0_50
User space C-APIs are made available by linking against the esmi library,
which is provided by the E-SMS project https://www.amd.com/en/developer/e-sms.html.

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@ -17,7 +17,7 @@ with the generic one and look at this one in parallel for the x86 specifics.
Needless to say, code should use the generic functions - this file is *only*
here to *document* the inner workings of x86 topology.
Started by Thomas Gleixner <tglx@linutronix.de> and Borislav Petkov <bp@alien8.de>.
Started by Thomas Gleixner <tglx@kernel.org> and Borislav Petkov <bp@alien8.de>.
The main aim of the topology facilities is to present adequate interfaces to
code which needs to know/query/use the structure of the running system wrt

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@ -8,7 +8,7 @@ CPU hotplug in the Kernel
Srivatsa Vaddagiri <vatsa@in.ibm.com>,
Ashok Raj <ashok.raj@intel.com>,
Joel Schopp <jschopp@austin.ibm.com>,
Thomas Gleixner <tglx@linutronix.de>
Thomas Gleixner <tglx@kernel.org>
Introduction
============

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@ -439,6 +439,6 @@ Credits
The following people have contributed to this document:
1. Thomas Gleixner tglx@linutronix.de
1. Thomas Gleixner tglx@kernel.org
2. Ingo Molnar mingo@elte.hu

View file

@ -209,4 +209,4 @@ testing. Thanks a lot.
The following people have contributed to this document:
Thomas Gleixner\ tglx@linutronix.de
Thomas Gleixner\ tglx@kernel.org

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@ -1105,7 +1105,6 @@ properties:
- gateworks,imx8mp-gw74xx # i.MX8MP Gateworks Board
- gateworks,imx8mp-gw75xx-2x # i.MX8MP Gateworks Board
- gateworks,imx8mp-gw82xx-2x # i.MX8MP Gateworks Board
- gocontroll,moduline-display # GOcontroll Moduline Display controller
- prt,prt8ml # Protonic PRT8ML
- skov,imx8mp-skov-basic # SKOV i.MX8MP baseboard without frontplate
- skov,imx8mp-skov-revb-hdmi # SKOV i.MX8MP climate control without panel
@ -1164,6 +1163,14 @@ properties:
- const: engicam,icore-mx8mp # i.MX8MP Engicam i.Core MX8M Plus SoM
- const: fsl,imx8mp
- description: Ka-Ro TX8P-ML81 SoM based boards
items:
- enum:
- gocontroll,moduline-display
- gocontroll,moduline-display-106
- const: karo,tx8p-ml81
- const: fsl,imx8mp
- description: Kontron i.MX8MP OSM-S SoM based Boards
items:
- const: kontron,imx8mp-bl-osm-s # Kontron BL i.MX8MP OSM-S Board

View file

@ -11,7 +11,7 @@ maintainers:
- Jitao shi <jitao.shi@mediatek.com>
description: |
MediaTek DP and eDP are different hardwares and there are some features
MediaTek DP and eDP are different hardware and there are some features
which are not supported for eDP. For example, audio is not supported for
eDP. Therefore, we need to use two different compatibles to describe them.
In addition, We just need to enable the power domain of DP, so the clock

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@ -16,7 +16,8 @@ properties:
- brcm,iproc-nic-i2c
reg:
maxItems: 1
minItems: 1
maxItems: 2
clock-frequency:
enum: [ 100000, 400000 ]
@ -41,8 +42,15 @@ allOf:
contains:
const: brcm,iproc-nic-i2c
then:
properties:
reg:
minItems: 2
required:
- brcm,ape-hsls-addr-mask
else:
properties:
reg:
maxItems: 1
unevaluatedProperties: false

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@ -74,6 +74,37 @@ allOf:
- description: aggre UFS CARD AXI clock
- description: RPMH CC IPA clock
- if:
properties:
compatible:
contains:
enum:
- qcom,sa8775p-config-noc
- qcom,sa8775p-dc-noc
- qcom,sa8775p-gem-noc
- qcom,sa8775p-gpdsp-anoc
- qcom,sa8775p-lpass-ag-noc
- qcom,sa8775p-mmss-noc
- qcom,sa8775p-nspa-noc
- qcom,sa8775p-nspb-noc
- qcom,sa8775p-pcie-anoc
- qcom,sa8775p-system-noc
then:
properties:
clocks: false
- if:
properties:
compatible:
contains:
enum:
- qcom,sa8775p-clk-virt
- qcom,sa8775p-mc-virt
then:
properties:
reg: false
clocks: false
unevaluatedProperties: false
examples:

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@ -25,6 +25,10 @@ properties:
items:
- const: pci1de4,1
reg:
maxItems: 1
description: The PCI Bus-Device-Function address.
'#interrupt-cells':
const: 2
description: |
@ -101,6 +105,7 @@ unevaluatedProperties: false
required:
- compatible
- reg
- '#interrupt-cells'
- interrupt-controller
- pci-ep-bus@1
@ -111,8 +116,9 @@ examples:
#address-cells = <3>;
#size-cells = <2>;
rp1@0,0 {
dev@0,0 {
compatible = "pci1de4,1";
reg = <0x10000 0x0 0x0 0x0 0x0>;
ranges = <0x01 0x00 0x00000000 0x82010000 0x00 0x00 0x00 0x400000>;
#address-cells = <3>;
#size-cells = <2>;

View file

@ -56,7 +56,7 @@ properties:
clocks:
minItems: 5
maxItems: 7
maxItems: 6
clock-names:
minItems: 5
@ -67,7 +67,6 @@ properties:
- enum: [rchng, refgen]
- const: pipe
- const: pipediv2
- const: phy_aux
power-domains:
maxItems: 1
@ -180,6 +179,7 @@ allOf:
contains:
enum:
- qcom,glymur-qmp-gen5x4-pcie-phy
- qcom,qcs8300-qmp-gen4x2-pcie-phy
- qcom,sa8775p-qmp-gen4x2-pcie-phy
- qcom,sa8775p-qmp-gen4x4-pcie-phy
- qcom,sc8280xp-qmp-gen3x1-pcie-phy
@ -197,19 +197,6 @@ allOf:
clock-names:
minItems: 6
- if:
properties:
compatible:
contains:
enum:
- qcom,qcs8300-qmp-gen4x2-pcie-phy
then:
properties:
clocks:
minItems: 7
clock-names:
minItems: 7
- if:
properties:
compatible:

View file

@ -49,6 +49,10 @@ properties:
items:
- const: mclk
interrupts:
maxItems: 1
description: Headphone detect interrupt
port:
$ref: audio-graph-port.yaml#
unevaluatedProperties: false

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@ -47,6 +47,12 @@ properties:
reg:
maxItems: 1
clocks:
maxItems: 1
clock-names:
const: mclk
interrupts:
maxItems: 1
description: The CODEC's interrupt output.
@ -98,6 +104,7 @@ properties:
- 4 # Use GPIO2 for jack-detect
- 5 # Use GPIO3 for jack-detect
- 6 # Use GPIO4 for jack-detect
- 7 # Use HDA header for jack-detect
realtek,jack-detect-not-inverted:
description:
@ -121,6 +128,10 @@ properties:
- 2 # Scale current by 1.0
- 3 # Scale current by 1.5
port:
$ref: audio-graph-port.yaml#
unevaluatedProperties: false
required:
- compatible
- reg

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@ -70,6 +70,9 @@ properties:
"#sound-dai-cells":
const: 0
port:
$ref: /schemas/graph.yaml#/properties/port
required:
- compatible
- reg

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@ -8,7 +8,7 @@ title: Marvell MMP Timer
maintainers:
- Daniel Lezcano <daniel.lezcano@linaro.org>
- Thomas Gleixner <tglx@linutronix.de>
- Thomas Gleixner <tglx@kernel.org>
- Rob Herring <robh@kernel.org>
properties:

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@ -48,8 +48,8 @@ properties:
enum: [1, 2]
default: 2
description:
Number of lanes available per direction. Note that it is assume same
number of lanes is used both directions at once.
Number of lanes available per direction. Note that it is assumed that
the same number of lanes are used in both directions at once.
vdd-hba-supply:
description:

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@ -406,7 +406,6 @@ allOf:
compatible:
contains:
enum:
- qcom,ipq5018-dwc3
- qcom,ipq6018-dwc3
- qcom,ipq8074-dwc3
- qcom,msm8953-dwc3
@ -428,6 +427,7 @@ allOf:
compatible:
contains:
enum:
- qcom,msm8994-dwc3
- qcom,msm8996-dwc3
- qcom,qcs404-dwc3
- qcom,sdm660-dwc3
@ -451,6 +451,7 @@ allOf:
compatible:
contains:
enum:
- qcom,ipq5018-dwc3
- qcom,ipq5332-dwc3
then:
properties:
@ -488,7 +489,6 @@ allOf:
enum:
- qcom,ipq4019-dwc3
- qcom,ipq8064-dwc3
- qcom,msm8994-dwc3
- qcom,qcs615-dwc3
- qcom,qcs8300-dwc3
- qcom,qdu1000-dwc3

View file

@ -420,7 +420,6 @@ allOf:
compatible:
contains:
enum:
- qcom,ipq5018-dwc3
- qcom,ipq6018-dwc3
- qcom,ipq8074-dwc3
- qcom,msm8953-dwc3
@ -443,6 +442,7 @@ allOf:
compatible:
contains:
enum:
- qcom,msm8994-dwc3
- qcom,msm8996-dwc3
- qcom,qcs404-dwc3
- qcom,sdm660-dwc3
@ -467,6 +467,7 @@ allOf:
compatible:
contains:
enum:
- qcom,ipq5018-dwc3
- qcom,ipq5332-dwc3
then:
properties:
@ -509,7 +510,6 @@ allOf:
- qcom,ipq4019-dwc3
- qcom,ipq8064-dwc3
- qcom,kaanapali-dwc3
- qcom,msm8994-dwc3
- qcom,qcs615-dwc3
- qcom,qcs8300-dwc3
- qcom,qdu1000-dwc3

View file

@ -996,11 +996,11 @@ The following people have contributed to the NAND driver:
2. David Woodhouse\ dwmw2@infradead.org
3. Thomas Gleixner\ tglx@linutronix.de
3. Thomas Gleixner\ tglx@kernel.org
A lot of users have provided bugfixes, improvements and helping hands
for testing. Thanks a lot.
The following people have contributed to this document:
1. Thomas Gleixner\ tglx@linutronix.de
1. Thomas Gleixner\ tglx@kernel.org

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@ -416,6 +416,7 @@ lm_change yes no no
lm_breaker_owns_lease: yes no no
lm_lock_expirable yes no no
lm_expire_lock no no yes
lm_open_conflict yes no no
====================== ============= ================= =========
buffer_head

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@ -15,7 +15,7 @@ and SB Temperature Sensor Interface (SB-TSI)).
More details on the interface can be found in chapter
"5 Advanced Platform Management Link (APML)" of the family/model PPR [1]_.
.. [1] https://www.amd.com/content/dam/amd/en/documents/epyc-technical-docs/programmer-references/55898_B1_pub_0_50.zip
.. [1] https://docs.amd.com/v/u/en-US/55898_B1_pub_0_50
SBRMI device

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@ -33,6 +33,16 @@ Boot parameter:
sysctl:
/proc/sys/vm/mem_profiling
1: Enable memory profiling.
0: Disable memory profiling.
The default value depends on CONFIG_MEM_ALLOC_PROFILING_ENABLED_BY_DEFAULT.
When CONFIG_MEM_ALLOC_PROFILING_DEBUG=y, this control is read-only to avoid
warnings produced by allocations made while profiling is disabled and freed
when it's enabled.
Runtime info:
/proc/allocinfo

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@ -0,0 +1,175 @@
# SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)
#
# Copyright (c) 2025 Valve Corporation.
#
---
name: dev-energymodel
doc: |
Energy model netlink interface to notify its changes.
protocol: genetlink
uapi-header: linux/dev_energymodel.h
definitions:
-
type: flags
name: perf-state-flags
entries:
-
name: perf-state-inefficient
doc: >-
The performance state is inefficient. There is in this perf-domain,
another performance state with a higher frequency but a lower or
equal power cost.
-
type: flags
name: perf-domain-flags
entries:
-
name: perf-domain-microwatts
doc: >-
The power values are in micro-Watts or some other scale.
-
name: perf-domain-skip-inefficiencies
doc: >-
Skip inefficient states when estimating energy consumption.
-
name: perf-domain-artificial
doc: >-
The power values are artificial and might be created by platform
missing real power information.
attribute-sets:
-
name: perf-domain
doc: >-
Information on a single performance domains.
attributes:
-
name: pad
type: pad
-
name: perf-domain-id
type: u32
doc: >-
A unique ID number for each performance domain.
-
name: flags
type: u64
doc: >-
Bitmask of performance domain flags.
enum: perf-domain-flags
-
name: cpus
type: u64
multi-attr: true
doc: >-
CPUs that belong to this performance domain.
-
name: perf-table
doc: >-
Performance states table.
attributes:
-
name: perf-domain-id
type: u32
doc: >-
A unique ID number for each performance domain.
-
name: perf-state
type: nest
nested-attributes: perf-state
multi-attr: true
-
name: perf-state
doc: >-
Performance state of a performance domain.
attributes:
-
name: pad
type: pad
-
name: performance
type: u64
doc: >-
CPU performance (capacity) at a given frequency.
-
name: frequency
type: u64
doc: >-
The frequency in KHz, for consistency with CPUFreq.
-
name: power
type: u64
doc: >-
The power consumed at this level (by 1 CPU or by a registered
device). It can be a total power: static and dynamic.
-
name: cost
type: u64
doc: >-
The cost coefficient associated with this level, used during energy
calculation. Equal to: power * max_frequency / frequency.
-
name: flags
type: u64
doc: >-
Bitmask of performance state flags.
enum: perf-state-flags
operations:
list:
-
name: get-perf-domains
attribute-set: perf-domain
doc: Get the list of information for all performance domains.
do:
request:
attributes:
- perf-domain-id
reply:
attributes: &perf-domain-attrs
- pad
- perf-domain-id
- flags
- cpus
dump:
reply:
attributes: *perf-domain-attrs
-
name: get-perf-table
attribute-set: perf-table
doc: Get the energy model table of a performance domain.
do:
request:
attributes:
- perf-domain-id
reply:
attributes:
- perf-domain-id
- perf-state
-
name: perf-domain-created
doc: A performance domain is created.
notify: get-perf-table
mcgrp: event
-
name: perf-domain-updated
doc: A performance domain is updated.
notify: get-perf-table
mcgrp: event
-
name: perf-domain-deleted
doc: A performance domain is deleted.
attribute-set: perf-table
event:
attributes:
- perf-domain-id
mcgrp: event
mcast-groups:
list:
-
name: event

View file

@ -1,113 +0,0 @@
# SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)
name: em
doc: |
Energy model netlink interface to notify its changes.
protocol: genetlink
uapi-header: linux/energy_model.h
attribute-sets:
-
name: pds
attributes:
-
name: pd
type: nest
nested-attributes: pd
multi-attr: true
-
name: pd
attributes:
-
name: pad
type: pad
-
name: pd-id
type: u32
-
name: flags
type: u64
-
name: cpus
type: string
-
name: pd-table
attributes:
-
name: pd-id
type: u32
-
name: ps
type: nest
nested-attributes: ps
multi-attr: true
-
name: ps
attributes:
-
name: pad
type: pad
-
name: performance
type: u64
-
name: frequency
type: u64
-
name: power
type: u64
-
name: cost
type: u64
-
name: flags
type: u64
operations:
list:
-
name: get-pds
attribute-set: pds
doc: Get the list of information for all performance domains.
do:
reply:
attributes:
- pd
-
name: get-pd-table
attribute-set: pd-table
doc: Get the energy model table of a performance domain.
do:
request:
attributes:
- pd-id
reply:
attributes:
- pd-id
- ps
-
name: pd-created
doc: A performance domain is created.
notify: get-pd-table
mcgrp: event
-
name: pd-updated
doc: A performance domain is updated.
notify: get-pd-table
mcgrp: event
-
name: pd-deleted
doc: A performance domain is deleted.
attribute-set: pd-table
event:
attributes:
- pd-id
mcgrp: event
mcast-groups:
list:
-
name: event

View file

@ -39,6 +39,8 @@ attribute-sets:
-
name: ipproto
type: u8
checks:
min: 1
-
name: type
type: u8

View file

@ -142,7 +142,7 @@ attribute-sets:
name: ifindex
doc: |
ifindex of the netdev to which the pool belongs.
May be reported as 0 if the page pool was allocated for a netdev
May not be reported if the page pool was allocated for a netdev
which got destroyed already (page pools may outlast their netdevs
because they wait for all memory to be returned).
type: u32
@ -601,7 +601,9 @@ operations:
name: page-pool-get
doc: |
Get / dump information about Page Pools.
(Only Page Pools associated with a net_device can be listed.)
Only Page Pools associated by the driver with a net_device
can be listed. ifindex will not be reported if the net_device
no longer exists.
attribute-set: page-pool
do:
request:

View file

@ -0,0 +1,41 @@
.. SPDX-License-Identifier: GPL-2.0
Linux kernel project continuity
===============================
The Linux kernel development project is widely distributed, with over
100 maintainers each working to keep changes moving through their own
repositories. The final step, though, is a centralized one where changes
are pulled into the mainline repository. That is normally done by Linus
Torvalds but, as was demonstrated by the 4.19 release in 2018, there are
others who can do that work when the need arises.
Should the maintainers of that repository become unwilling or unable to
do that work going forward (including facilitating a transition), the
project will need to find one or more replacements without delay. The
process by which that will be done is listed below. $ORGANIZER is the
last Maintainer Summit organizer or the current Linux Foundation (LF)
Technical Advisory Board (TAB) Chair as a backup.
- Within 72 hours, $ORGANIZER will open a discussion with the invitees
of the most recently concluded Maintainers Summit. A meeting of those
invitees and the TAB, either online or in-person, will be set as soon
as possible in a way that maximizes the number of people who can
participate.
- If there has been no Maintainers Summit in the last 15 months, the set of
invitees for this meeting will be determined by the TAB.
- The invitees to this meeting may bring in other maintainers as needed.
- This meeting, chaired by $ORGANIZER, will consider options for the
ongoing management of the top-level kernel repository consistent with
the expectation that it maximizes the long term health of the project
and its community.
- Within two weeks, a representative of this group will communicate to the
broader community, using the ksummit@lists.linux.dev mailing list, what
the next steps will be.
The Linux Foundation, as guided by the TAB, will take the steps
necessary to support and implement this plan.

View file

@ -68,6 +68,7 @@ beyond).
stable-kernel-rules
management-style
researcher-guidelines
conclave
Dealing with bugs
-----------------

View file

@ -363,6 +363,18 @@ just do it. As a result, a sequence of smaller series gets merged quicker and
with better review coverage. Re-posting large series also increases the mailing
list traffic.
Limit patches outstanding on mailing list
-----------------------------------------
Avoid having more than 15 patches, across all series, outstanding for
review on the mailing list for a single tree. In other words, a maximum of
15 patches under review on net, and a maximum of 15 patches under review on
net-next.
This limit is intended to focus developer effort on testing patches before
upstream review. Aiding the quality of upstream submissions, and easing the
load on reviewers.
.. _rcs:
Local variable ordering ("reverse xmas tree", "RCS")

View file

@ -57,8 +57,10 @@ Submitting Patches for Given SoC
All typical platform related patches should be sent via SoC submaintainers
(platform-specific maintainers). This includes also changes to per-platform or
shared defconfigs (scripts/get_maintainer.pl might not provide correct
addresses in such case).
shared defconfigs. Note that scripts/get_maintainer.pl might not provide
correct addresses for the shared defconfig, so ignore its output and manually
create CC-list based on MAINTAINERS file or use something like
``scripts/get_maintainer.pl -f drivers/soc/FOO/``).
Submitting Patches to the Main SoC Maintainers
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
@ -114,9 +116,9 @@ coordinating how the changes get merged through different maintainer trees.
Usually the branch that includes a driver change will also include the
corresponding change to the devicetree binding description, to ensure they are
in fact compatible. This means that the devicetree branch can end up causing
warnings in the "make dtbs_check" step. If a devicetree change depends on
warnings in the ``make dtbs_check`` step. If a devicetree change depends on
missing additions to a header file in include/dt-bindings/, it will fail the
"make dtbs" step and not get merged.
``make dtbs`` step and not get merged.
There are multiple ways to deal with this:

View file

@ -22,7 +22,7 @@
Srivatsa Vaddagiri <vatsa@in.ibm.com>,
Ashok Raj <ashok.raj@intel.com>,
Joel Schopp <jschopp@austin.ibm.com>,
Thomas Gleixner <tglx@linutronix.de>
Thomas Gleixner <tglx@kernel.org>
简介
====

View file

@ -404,6 +404,6 @@ kernel/irq/chip.c
感谢以下人士对本文档作出的贡献:
1. Thomas Gleixner tglx@linutronix.de
1. Thomas Gleixner tglx@kernel.org
2. Ingo Molnar mingo@elte.hu

View file

@ -44,7 +44,7 @@ member and userspace must populate the type member with a value from
struct v4l2_isp_params_buffer *params =
(struct v4l2_isp_params_buffer *)buffer;
params->version = MALI_C55_PARAM_BUFFER_V1;
params->version = V4L2_ISP_PARAMS_VERSION_V1;
params->data_size = 0;
void *data = (void *)params->data;

View file

@ -314,6 +314,7 @@ R: Mauro Carvalho Chehab <mchehab@kernel.org>
R: Shuai Xue <xueshuai@linux.alibaba.com>
L: linux-acpi@vger.kernel.org
F: drivers/acpi/apei/
F: drivers/firmware/efi/cper*
ACPI COMPONENT ARCHITECTURE (ACPICA)
M: "Rafael J. Wysocki" <rafael@kernel.org>
@ -1283,6 +1284,7 @@ F: include/uapi/drm/amdxdna_accel.h
AMD XGBE DRIVER
M: "Shyam Sundar S K" <Shyam-sundar.S-k@amd.com>
M: Raju Rangoju <Raju.Rangoju@amd.com>
L: netdev@vger.kernel.org
S: Maintained
F: arch/arm64/boot/dts/amd/amd-seattle-xgbe*.dtsi
@ -2011,7 +2013,7 @@ ARM AND ARM64 SoC SUB-ARCHITECTURES (COMMON PARTS)
M: Arnd Bergmann <arnd@arndb.de>
M: Krzysztof Kozlowski <krzk@kernel.org>
M: Alexandre Belloni <alexandre.belloni@bootlin.com>
M: Linus Walleij <linus.walleij@linaro.org>
M: Linus Walleij <linusw@kernel.org>
R: Drew Fustini <fustini@kernel.org>
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
L: soc@lists.linux.dev
@ -2158,7 +2160,7 @@ M: Alice Ryhl <aliceryhl@google.com>
L: dri-devel@lists.freedesktop.org
S: Supported
W: https://rust-for-linux.com/tyr-gpu-driver
W https://drm.pages.freedesktop.org/maintainer-tools/drm-rust.html
W: https://drm.pages.freedesktop.org/maintainer-tools/drm-rust.html
B: https://gitlab.freedesktop.org/panfrost/linux/-/issues
T: git https://gitlab.freedesktop.org/drm/rust/kernel.git
F: Documentation/devicetree/bindings/gpu/arm,mali-valhall-csf.yaml
@ -3130,6 +3132,7 @@ F: drivers/*/*ma35*
K: ma35d1
ARM/NUVOTON NPCM ARCHITECTURE
M: Andrew Jeffery <andrew@codeconstruct.com.au>
M: Avi Fishman <avifishman70@gmail.com>
M: Tomer Maimon <tmaimon77@gmail.com>
M: Tali Perry <tali.perry1@gmail.com>
@ -3138,6 +3141,7 @@ R: Nancy Yuen <yuenn@google.com>
R: Benjamin Fair <benjaminfair@google.com>
L: openbmc@lists.ozlabs.org (moderated for non-subscribers)
S: Supported
T: git git://git.kernel.org/pub/scm/linux/kernel/git/bmc/linux.git
F: Documentation/devicetree/bindings/*/*/*npcm*
F: Documentation/devicetree/bindings/*/*npcm*
F: Documentation/devicetree/bindings/rtc/nuvoton,nct3018y.yaml
@ -5801,7 +5805,8 @@ F: drivers/power/supply/cw2015_battery.c
CEPH COMMON CODE (LIBCEPH)
M: Ilya Dryomov <idryomov@gmail.com>
M: Xiubo Li <xiubli@redhat.com>
M: Alex Markuze <amarkuze@redhat.com>
M: Viacheslav Dubeyko <slava@dubeyko.com>
L: ceph-devel@vger.kernel.org
S: Supported
W: http://ceph.com/
@ -5812,8 +5817,9 @@ F: include/linux/crush/
F: net/ceph/
CEPH DISTRIBUTED FILE SYSTEM CLIENT (CEPH)
M: Xiubo Li <xiubli@redhat.com>
M: Ilya Dryomov <idryomov@gmail.com>
M: Alex Markuze <amarkuze@redhat.com>
M: Viacheslav Dubeyko <slava@dubeyko.com>
L: ceph-devel@vger.kernel.org
S: Supported
W: http://ceph.com/
@ -6172,7 +6178,7 @@ F: include/linux/clk.h
CLOCKSOURCE, CLOCKEVENT DRIVERS
M: Daniel Lezcano <daniel.lezcano@linaro.org>
M: Thomas Gleixner <tglx@linutronix.de>
M: Thomas Gleixner <tglx@kernel.org>
L: linux-kernel@vger.kernel.org
S: Supported
T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git timers/core
@ -6417,6 +6423,7 @@ F: include/linux/blk-cgroup.h
CONTROL GROUP - CPUSET
M: Waiman Long <longman@redhat.com>
R: Chen Ridong <chenridong@huaweicloud.com>
L: cgroups@vger.kernel.org
S: Maintained
T: git git://git.kernel.org/pub/scm/linux/kernel/git/tj/cgroup.git
@ -6538,7 +6545,7 @@ S: Maintained
F: drivers/cpufreq/virtual-cpufreq.c
CPU HOTPLUG
M: Thomas Gleixner <tglx@linutronix.de>
M: Thomas Gleixner <tglx@kernel.org>
M: Peter Zijlstra <peterz@infradead.org>
L: linux-kernel@vger.kernel.org
S: Maintained
@ -6705,6 +6712,7 @@ S: Maintained
T: git https://git.kernel.org/pub/scm/linux/kernel/git/ebiggers/linux.git libcrypto-next
T: git https://git.kernel.org/pub/scm/linux/kernel/git/ebiggers/linux.git libcrypto-fixes
F: lib/crypto/
F: scripts/crypto/
CRYPTO SPEED TEST COMPARE
M: Wang Jinchao <wangjinchao@xfusion.com>
@ -6965,7 +6973,7 @@ F: Documentation/scsi/dc395x.rst
F: drivers/scsi/dc395x.*
DEBUGOBJECTS:
M: Thomas Gleixner <tglx@linutronix.de>
M: Thomas Gleixner <tglx@kernel.org>
L: linux-kernel@vger.kernel.org
S: Maintained
T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git core/debugobjects
@ -8067,7 +8075,7 @@ W: https://rust-for-linux.com/nova-gpu-driver
Q: https://patchwork.freedesktop.org/project/nouveau/
B: https://gitlab.freedesktop.org/drm/nova/-/issues
C: irc://irc.oftc.net/nouveau
T: git https://gitlab.freedesktop.org/drm/nova.git nova-next
T: git https://gitlab.freedesktop.org/drm/rust/kernel.git drm-rust-next
F: Documentation/gpu/nova/
F: drivers/gpu/nova-core/
@ -8079,7 +8087,7 @@ W: https://rust-for-linux.com/nova-gpu-driver
Q: https://patchwork.freedesktop.org/project/nouveau/
B: https://gitlab.freedesktop.org/drm/nova/-/issues
C: irc://irc.oftc.net/nouveau
T: git https://gitlab.freedesktop.org/drm/nova.git nova-next
T: git https://gitlab.freedesktop.org/drm/rust/kernel.git drm-rust-next
F: Documentation/gpu/nova/
F: drivers/gpu/drm/nova/
F: include/uapi/drm/nova_drm.h
@ -8357,6 +8365,7 @@ X: drivers/gpu/drm/msm/
X: drivers/gpu/drm/nova/
X: drivers/gpu/drm/radeon/
X: drivers/gpu/drm/tegra/
X: drivers/gpu/drm/tyr/
X: drivers/gpu/drm/xe/
DRM DRIVERS AND COMMON INFRASTRUCTURE [RUST]
@ -9298,12 +9307,12 @@ M: Lukasz Luba <lukasz.luba@arm.com>
M: "Rafael J. Wysocki" <rafael@kernel.org>
L: linux-pm@vger.kernel.org
S: Maintained
F: kernel/power/energy_model.c
F: include/linux/energy_model.h
F: Documentation/netlink/specs/dev-energymodel.yaml
F: Documentation/power/energy-model.rst
F: Documentation/netlink/specs/em.yaml
F: include/uapi/linux/energy_model.h
F: include/linux/energy_model.h
F: include/uapi/linux/dev_energymodel.h
F: kernel/power/em_netlink*.*
F: kernel/power/energy_model.c
EPAPR HYPERVISOR BYTE CHANNEL DEVICE DRIVER
M: Laurentiu Tudor <laurentiu.tudor@nxp.com>
@ -9511,6 +9520,7 @@ F: arch/arm/boot/compressed/efi-header.S
F: arch/x86/platform/efi/
F: drivers/firmware/efi/
F: include/linux/efi*.h
X: drivers/firmware/efi/cper*
EXTERNAL CONNECTOR SUBSYSTEM (EXTCON)
M: MyungJoo Ham <myungjoo.ham@samsung.com>
@ -10367,7 +10377,7 @@ F: include/uapi/linux/fuse.h
F: tools/testing/selftests/filesystems/fuse/
FUTEX SUBSYSTEM
M: Thomas Gleixner <tglx@linutronix.de>
M: Thomas Gleixner <tglx@kernel.org>
M: Ingo Molnar <mingo@redhat.com>
R: Peter Zijlstra <peterz@infradead.org>
R: Darren Hart <dvhart@infradead.org>
@ -10511,7 +10521,7 @@ F: drivers/base/arch_topology.c
F: include/linux/arch_topology.h
GENERIC ENTRY CODE
M: Thomas Gleixner <tglx@linutronix.de>
M: Thomas Gleixner <tglx@kernel.org>
M: Peter Zijlstra <peterz@infradead.org>
M: Andy Lutomirski <luto@kernel.org>
L: linux-kernel@vger.kernel.org
@ -10624,7 +10634,7 @@ F: drivers/uio/uio_pci_generic.c
GENERIC VDSO LIBRARY
M: Andy Lutomirski <luto@kernel.org>
M: Thomas Gleixner <tglx@linutronix.de>
M: Thomas Gleixner <tglx@kernel.org>
M: Vincenzo Frascino <vincenzo.frascino@arm.com>
L: linux-kernel@vger.kernel.org
S: Maintained
@ -11237,7 +11247,7 @@ F: drivers/hid/hid-logitech-hidpp.c
HIGH-RESOLUTION TIMERS, TIMER WHEEL, CLOCKEVENTS
M: Anna-Maria Behnsen <anna-maria@linutronix.de>
M: Frederic Weisbecker <frederic@kernel.org>
M: Thomas Gleixner <tglx@linutronix.de>
M: Thomas Gleixner <tglx@kernel.org>
L: linux-kernel@vger.kernel.org
S: Maintained
T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git timers/core
@ -11260,7 +11270,7 @@ R: Boqun Feng <boqun.feng@gmail.com>
R: FUJITA Tomonori <fujita.tomonori@gmail.com>
R: Frederic Weisbecker <frederic@kernel.org>
R: Lyude Paul <lyude@redhat.com>
R: Thomas Gleixner <tglx@linutronix.de>
R: Thomas Gleixner <tglx@kernel.org>
R: Anna-Maria Behnsen <anna-maria@linutronix.de>
R: John Stultz <jstultz@google.com>
R: Stephen Boyd <sboyd@kernel.org>
@ -13162,6 +13172,7 @@ F: Documentation/devicetree/bindings/interconnect/
F: Documentation/driver-api/interconnect.rst
F: drivers/interconnect/
F: include/dt-bindings/interconnect/
F: include/linux/interconnect-clk.h
F: include/linux/interconnect-provider.h
F: include/linux/interconnect.h
@ -13330,7 +13341,7 @@ F: Documentation/devicetree/bindings/sound/irondevice,*
F: sound/soc/codecs/sma*
IRQ DOMAINS (IRQ NUMBER MAPPING LIBRARY)
M: Thomas Gleixner <tglx@linutronix.de>
M: Thomas Gleixner <tglx@kernel.org>
S: Maintained
T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git irq/core
F: Documentation/core-api/irq/irq-domain.rst
@ -13340,7 +13351,7 @@ F: kernel/irq/irqdomain.c
F: kernel/irq/msi.c
IRQ SUBSYSTEM
M: Thomas Gleixner <tglx@linutronix.de>
M: Thomas Gleixner <tglx@kernel.org>
L: linux-kernel@vger.kernel.org
S: Maintained
T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git irq/core
@ -13353,7 +13364,7 @@ F: kernel/irq/
F: lib/group_cpus.c
IRQCHIP DRIVERS
M: Thomas Gleixner <tglx@linutronix.de>
M: Thomas Gleixner <tglx@kernel.org>
L: linux-kernel@vger.kernel.org
S: Maintained
T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git irq/core
@ -14447,7 +14458,7 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/akpm/mm.git mm-nonmm-unstab
F: lib/*
LICENSES and SPDX stuff
M: Thomas Gleixner <tglx@linutronix.de>
M: Thomas Gleixner <tglx@kernel.org>
M: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
L: linux-spdx@vger.kernel.org
S: Maintained
@ -14875,6 +14886,7 @@ LSILOGIC MPT FUSION DRIVERS (FC/SAS/SPI)
M: Sathya Prakash <sathya.prakash@broadcom.com>
M: Sreekanth Reddy <sreekanth.reddy@broadcom.com>
M: Suganath Prabu Subramani <suganath-prabu.subramani@broadcom.com>
M: Ranjan Kumar <ranjan.kumar@broadcom.com>
L: MPT-FusionLinux.pdl@broadcom.com
L: linux-scsi@vger.kernel.org
S: Supported
@ -18283,7 +18295,7 @@ X: net/wireless/
X: tools/testing/selftests/net/can/
NETWORKING [IOAM]
M: Justin Iurman <justin.iurman@uliege.be>
M: Justin Iurman <justin.iurman@gmail.com>
S: Maintained
F: Documentation/networking/ioam6*
F: include/linux/ioam6*
@ -18418,9 +18430,11 @@ M: Jakub Kicinski <kuba@kernel.org>
M: Sabrina Dubroca <sd@queasysnail.net>
L: netdev@vger.kernel.org
S: Maintained
F: Documentation/networking/tls*
F: include/net/tls.h
F: include/uapi/linux/tls.h
F: net/tls/*
F: net/tls/
F: tools/testing/selftests/net/tls.c
NETWORKING [SOCKETS]
M: Eric Dumazet <edumazet@google.com>
@ -18473,9 +18487,8 @@ F: include/uapi/linux/nexthop.h
F: net/ipv4/nexthop.c
NFC SUBSYSTEM
M: Krzysztof Kozlowski <krzk@kernel.org>
L: netdev@vger.kernel.org
S: Maintained
S: Orphan
F: Documentation/devicetree/bindings/net/nfc/
F: drivers/nfc/
F: include/net/nfc/
@ -18572,7 +18585,7 @@ NOHZ, DYNTICKS SUPPORT
M: Anna-Maria Behnsen <anna-maria@linutronix.de>
M: Frederic Weisbecker <frederic@kernel.org>
M: Ingo Molnar <mingo@kernel.org>
M: Thomas Gleixner <tglx@linutronix.de>
M: Thomas Gleixner <tglx@kernel.org>
L: linux-kernel@vger.kernel.org
S: Maintained
T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git timers/nohz
@ -20757,7 +20770,7 @@ F: drivers/platform/x86/portwell-ec.c
POSIX CLOCKS and TIMERS
M: Anna-Maria Behnsen <anna-maria@linutronix.de>
M: Frederic Weisbecker <frederic@kernel.org>
M: Thomas Gleixner <tglx@linutronix.de>
M: Thomas Gleixner <tglx@kernel.org>
L: linux-kernel@vger.kernel.org
S: Maintained
T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git timers/core
@ -21092,6 +21105,10 @@ S: Maintained
F: rust/helpers/pwm.c
F: rust/kernel/pwm.rs
PWM SUBSYSTEM DRIVERS [RUST]
R: Michal Wilczynski <m.wilczynski@samsung.com>
F: drivers/pwm/*.rs
PXA GPIO DRIVER
M: Robert Jarzmik <robert.jarzmik@free.fr>
L: linux-gpio@vger.kernel.org
@ -22521,7 +22538,7 @@ F: drivers/mailbox/riscv-sbi-mpxy-mbox.c
F: include/linux/mailbox/riscv-rpmi-message.h
RISC-V SPACEMIT SoC Support
M: Yixun Lan <dlan@gentoo.org>
M: Yixun Lan <dlan@kernel.org>
L: linux-riscv@lists.infradead.org
L: spacemit@lists.linux.dev
S: Maintained
@ -26268,7 +26285,7 @@ F: drivers/net/wireless/ti/
TIMEKEEPING, CLOCKSOURCE CORE, NTP, ALARMTIMER
M: John Stultz <jstultz@google.com>
M: Thomas Gleixner <tglx@linutronix.de>
M: Thomas Gleixner <tglx@kernel.org>
R: Stephen Boyd <sboyd@kernel.org>
L: linux-kernel@vger.kernel.org
S: Supported
@ -28199,7 +28216,7 @@ F: net/lapb/
F: net/x25/
X86 ARCHITECTURE (32-BIT AND 64-BIT)
M: Thomas Gleixner <tglx@linutronix.de>
M: Thomas Gleixner <tglx@kernel.org>
M: Ingo Molnar <mingo@redhat.com>
M: Borislav Petkov <bp@alien8.de>
M: Dave Hansen <dave.hansen@linux.intel.com>
@ -28215,7 +28232,7 @@ F: tools/testing/selftests/x86
X86 CPUID DATABASE
M: Borislav Petkov <bp@alien8.de>
M: Thomas Gleixner <tglx@linutronix.de>
M: Thomas Gleixner <tglx@kernel.org>
M: x86@kernel.org
R: Ahmed S. Darwish <darwi@linutronix.de>
L: x86-cpuid@lists.linux.dev
@ -28231,7 +28248,7 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git x86/asm
F: arch/x86/entry/
X86 HARDWARE VULNERABILITIES
M: Thomas Gleixner <tglx@linutronix.de>
M: Thomas Gleixner <tglx@kernel.org>
M: Borislav Petkov <bp@alien8.de>
M: Peter Zijlstra <peterz@infradead.org>
M: Josh Poimboeuf <jpoimboe@kernel.org>

View file

@ -2,7 +2,7 @@
VERSION = 6
PATCHLEVEL = 19
SUBLEVEL = 0
EXTRAVERSION = -rc4
EXTRAVERSION = -rc7
NAME = Baby Opossum Posse
# *DOCUMENTATION*

View file

@ -12,6 +12,17 @@
model = "Actiontec MI424WR rev A/C";
compatible = "actiontec,mi424wr-ac", "intel,ixp42x";
/* Connect the switch to EthC */
spi {
ethernet-switch@0 {
ethernet-ports {
ethernet-port@4 {
ethernet = <&ethc>;
};
};
};
};
soc {
/* EthB used for WAN */
ethernet@c8009000 {

View file

@ -12,6 +12,17 @@
model = "Actiontec MI424WR rev D";
compatible = "actiontec,mi424wr-d", "intel,ixp42x";
/* Connect the switch to EthB */
spi {
ethernet-switch@0 {
ethernet-ports {
ethernet-port@4 {
ethernet = <&ethb>;
};
};
};
};
soc {
/* EthB used for LAN */
ethernet@c8009000 {

View file

@ -152,7 +152,6 @@
};
ethernet-port@4 {
reg = <4>;
ethernet = <&ethc>;
phy-mode = "mii";
fixed-link {
speed = <100>;

View file

@ -54,6 +54,7 @@
&mdio0 {
pinctrl-0 = <&miim_a_pins>;
pinctrl-names = "default";
reset-gpios = <&gpio 53 GPIO_ACTIVE_LOW>;
status = "okay";
ext_phy0: ethernet-phy@7 {

View file

@ -527,7 +527,7 @@
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 37>;
#address-cells = <1>;
#size-cells = <1>;
#size-cells = <0>;
dmas = <&dma0 AT91_XDMAC_DT_PERID(12)>,
<&dma0 AT91_XDMAC_DT_PERID(11)>;
dma-names = "tx", "rx";
@ -676,7 +676,7 @@
flx9: flexcom@e2820000 {
compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
reg = <0xe2820000 0x200>;
ranges = <0x0 0xe281c000 0x800>;
ranges = <0x0 0xe2820000 0x800>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 43>;
#address-cells = <1>;
#size-cells = <1>;

View file

@ -248,14 +248,14 @@
linux,default-trigger = "nand-disk";
};
ledg3: led@10 {
reg = <10>;
ledg3: led@a {
reg = <0xa>;
label = "system:green3:live";
linux,default-trigger = "heartbeat";
};
ledb3: led@11 {
reg = <11>;
ledb3: led@b {
reg = <0xb>;
label = "system:blue3:cpu";
linux,default-trigger = "cpu0";
};

View file

@ -398,13 +398,13 @@
#size-cells = <0>;
led-control = <0x0 0x0 0x3f83f8 0x0>;
sysled0@3 {
led@3 {
reg = <3>;
label = "system:green:status";
linux,default-trigger = "default-on";
};
sysled1@4 {
led@4 {
reg = <4>;
label = "system:green:act";
linux,default-trigger = "heartbeat";

View file

@ -225,13 +225,13 @@
#size-cells = <0>;
led-control = <0x0 0x0 0x3f83f8 0x0>;
sysled3: led3@3 {
sysled3: led@3 {
reg = <3>;
label = "system:red:power";
linux,default-trigger = "default-on";
};
sysled4: led4@4 {
sysled4: led@4 {
reg = <4>;
label = "system:green:act";
linux,default-trigger = "heartbeat";

View file

@ -153,13 +153,13 @@
#size-cells = <0>;
led-control = <0x0 0x0 0x3f83f8 0x0>;
sysled3: led3@3 {
sysled3: led@3 {
reg = <3>;
label = "system:red:power";
linux,default-trigger = "default-on";
};
sysled4: led4@4 {
sysled4: led@4 {
reg = <4>;
label = "system:green:act";
linux,default-trigger = "heartbeat";

View file

@ -337,7 +337,7 @@
pinctrl-0 = <&pinctrl_rtc>;
reg = <0x32>;
interrupt-parent = <&gpio4>;
interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
};
};

View file

@ -30,7 +30,6 @@ config ARCH_NPCM7XX
select ARM_ERRATA_764369 if SMP
select ARM_ERRATA_720789
select ARM_ERRATA_754322
select ARM_ERRATA_794072
select PL310_ERRATA_588369
select PL310_ERRATA_727915
select MFD_SYSCON

View file

@ -7,15 +7,13 @@ dtb-$(CONFIG_ARCH_BCM2835) += bcm2711-rpi-400.dtb \
bcm2711-rpi-4-b.dtb \
bcm2711-rpi-cm4-io.dtb \
bcm2712-rpi-5-b.dtb \
bcm2712-rpi-5-b-ovl-rp1.dtb \
bcm2712-d-rpi-5-b.dtb \
bcm2837-rpi-2-b.dtb \
bcm2837-rpi-3-a-plus.dtb \
bcm2837-rpi-3-b.dtb \
bcm2837-rpi-3-b-plus.dtb \
bcm2837-rpi-cm3-io3.dtb \
bcm2837-rpi-zero-2-w.dtb \
rp1.dtbo
bcm2837-rpi-zero-2-w.dtb
subdir-y += bcmbca
subdir-y += northstar2

View file

@ -1,22 +1,16 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/*
* bcm2712-rpi-5-b-ovl-rp1.dts is the overlay-ready DT which will make
* the RP1 driver to load the RP1 dtb overlay at runtime, while
* bcm2712-rpi-5-b.dts (this file) is the fully defined one (i.e. it
* already contains RP1 node, so no overlay is loaded nor needed).
* This file is intended to host the override nodes for the RP1 peripherals,
* e.g. to declare the phy of the ethernet interface or the custom pin setup
* for several RP1 peripherals.
* This in turn is due to the fact that there's no current generic
* infrastructure to reference nodes (i.e. the nodes in rp1-common.dtsi) that
* are not yet defined in the DT since they are loaded at runtime via overlay.
* As a loose attempt to separate RP1 customizations from SoC peripherals
* definitioni, this file is intended to host the override nodes for the RP1
* peripherals, e.g. to declare the phy of the ethernet interface or custom
* pin setup.
* All other nodes that do not have anything to do with RP1 should be added
* to the included bcm2712-rpi-5-b-ovl-rp1.dts instead.
* to the included bcm2712-rpi-5-b-base.dtsi instead.
*/
/dts-v1/;
#include "bcm2712-rpi-5-b-ovl-rp1.dts"
#include "bcm2712-rpi-5-b-base.dtsi"
/ {
aliases {
@ -25,7 +19,26 @@
};
&pcie2 {
#include "rp1-nexus.dtsi"
pci@0,0 {
reg = <0x0 0x0 0x0 0x0 0x0>;
ranges;
bus-range = <0 1>;
device_type = "pci";
#address-cells = <3>;
#size-cells = <2>;
dev@0,0 {
compatible = "pci1de4,1";
reg = <0x10000 0x0 0x0 0x0 0x0>;
ranges = <0x1 0x0 0x0 0x82010000 0x0 0x0 0x0 0x400000>;
interrupt-controller;
#interrupt-cells = <2>;
#address-cells = <3>;
#size-cells = <2>;
#include "rp1-common.dtsi"
};
};
};
&rp1_eth {

View file

@ -1,14 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
rp1_nexus {
compatible = "pci1de4,1";
#address-cells = <3>;
#size-cells = <2>;
ranges = <0x01 0x00 0x00000000
0x02000000 0x00 0x00000000
0x0 0x400000>;
interrupt-controller;
#interrupt-cells = <2>;
#include "rp1-common.dtsi"
};

View file

@ -1,11 +0,0 @@
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
/dts-v1/;
/plugin/;
&pcie2 {
#address-cells = <3>;
#size-cells = <2>;
#include "rp1-nexus.dtsi"
};

View file

@ -113,6 +113,7 @@
ethphy0f: ethernet-phy@1 { /* SMSC LAN8740Ai */
compatible = "ethernet-phy-id0007.c110",
"ethernet-phy-ieee802.3-c22";
clocks = <&clk IMX8MP_CLK_ENET_QOS>;
interrupt-parent = <&gpio3>;
interrupts = <19 IRQ_TYPE_LEVEL_LOW>;
pinctrl-0 = <&pinctrl_ethphy0>;

View file

@ -9,7 +9,7 @@
#include "imx8mp-tx8p-ml81.dtsi"
/ {
compatible = "gocontroll,moduline-display", "fsl,imx8mp";
compatible = "gocontroll,moduline-display-106", "karo,tx8p-ml81", "fsl,imx8mp";
chassis-type = "embedded";
hardware = "Moduline Display V1.06";
model = "GOcontroll Moduline Display baseboard";

View file

@ -47,6 +47,7 @@
<&clk IMX8MP_SYS_PLL2_100M>,
<&clk IMX8MP_SYS_PLL2_50M>;
assigned-clock-rates = <266000000>, <100000000>, <50000000>;
nvmem-cells = <&eth_mac1>;
phy-handle = <&ethphy0>;
phy-mode = "rmii";
pinctrl-0 = <&pinctrl_eqos>;
@ -75,6 +76,10 @@
};
};
&fec {
nvmem-cells = <&eth_mac2>;
};
&gpio1 {
gpio-line-names = "SODIMM_152",
"SODIMM_42",

View file

@ -263,6 +263,7 @@
regulator-max-microvolt = <3000000>;
gpio = <&lsio_gpio4 7 GPIO_ACTIVE_HIGH>;
enable-active-high;
off-on-delay-us = <4800>;
};
reg_audio: regulator-audio {
@ -576,7 +577,7 @@
compatible = "isil,isl29023";
reg = <0x44>;
interrupt-parent = <&lsio_gpio4>;
interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
interrupts = <11 IRQ_TYPE_LEVEL_LOW>;
};
pressure-sensor@60 {

View file

@ -172,25 +172,25 @@
&lpuart0 {
compatible = "fsl,imx8qm-lpuart", "fsl,imx8qxp-lpuart";
dmas = <&edma2 13 0 0>, <&edma2 12 0 1>;
dmas = <&edma2 12 0 FSL_EDMA_RX>, <&edma2 13 0 0>;
dma-names = "rx","tx";
};
&lpuart1 {
compatible = "fsl,imx8qm-lpuart", "fsl,imx8qxp-lpuart";
dmas = <&edma2 15 0 0>, <&edma2 14 0 1>;
dmas = <&edma2 14 0 FSL_EDMA_RX>, <&edma2 15 0 0>;
dma-names = "rx","tx";
};
&lpuart2 {
compatible = "fsl,imx8qm-lpuart", "fsl,imx8qxp-lpuart";
dmas = <&edma2 17 0 0>, <&edma2 16 0 1>;
dmas = <&edma2 16 0 FSL_EDMA_RX>, <&edma2 17 0 0>;
dma-names = "rx","tx";
};
&lpuart3 {
compatible = "fsl,imx8qm-lpuart", "fsl,imx8qxp-lpuart";
dmas = <&edma2 19 0 0>, <&edma2 18 0 1>;
dmas = <&edma2 18 0 FSL_EDMA_RX>, <&edma2 19 0 0>;
dma-names = "rx","tx";
};

View file

@ -406,8 +406,6 @@
"",
"",
"",
"",
"",
"SMARC_SDIO_WP";
};
@ -582,7 +580,7 @@
ethphy1: ethernet-phy@1 {
reg = <1>;
interrupt-parent = <&som_gpio_expander_1>;
interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
interrupts = <6 IRQ_TYPE_EDGE_FALLING>;
ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
ti,tx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
};

View file

@ -828,7 +828,7 @@
interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <3>;
#size-cells = <0>;
clocks = <&scmi_clk IMX95_CLK_BUSAON>,
clocks = <&scmi_clk IMX95_CLK_BUSWAKEUP>,
<&scmi_clk IMX95_CLK_I3C2SLOW>;
clock-names = "pclk", "fast_clk";
status = "disabled";

View file

@ -192,7 +192,7 @@
reset-assert-us = <500000>;
reset-deassert-us = <500>;
interrupt-parent = <&expander2>;
interrupts = <6 IRQ_TYPE_EDGE_FALLING>;
interrupts = <6 IRQ_TYPE_LEVEL_LOW>;
};
};
};

View file

@ -675,10 +675,7 @@
snps,lfps_filter_quirk;
snps,dis_u2_susphy_quirk;
snps,dis_u3_susphy_quirk;
snps,tx_de_emphasis_quirk;
snps,tx_de_emphasis = <1>;
snps,dis_enblslpm_quirk;
snps,gctl-reset-quirk;
usb-role-switch;
role-switch-default-mode = "host";
port {

View file

@ -202,19 +202,6 @@
nvidia,outputs = <&dsia &dsib &sor0 &sor1>;
nvidia,head = <0>;
interconnects = <&mc TEGRA210_MC_DISPLAY0A &emc>,
<&mc TEGRA210_MC_DISPLAY0B &emc>,
<&mc TEGRA210_MC_DISPLAY0C &emc>,
<&mc TEGRA210_MC_DISPLAYHC &emc>,
<&mc TEGRA210_MC_DISPLAYD &emc>,
<&mc TEGRA210_MC_DISPLAYT &emc>;
interconnect-names = "wina",
"winb",
"winc",
"cursor",
"wind",
"wint";
};
dc@54240000 {
@ -230,15 +217,6 @@
nvidia,outputs = <&dsia &dsib &sor0 &sor1>;
nvidia,head = <1>;
interconnects = <&mc TEGRA210_MC_DISPLAY0AB &emc>,
<&mc TEGRA210_MC_DISPLAY0BB &emc>,
<&mc TEGRA210_MC_DISPLAY0CB &emc>,
<&mc TEGRA210_MC_DISPLAYHCB &emc>;
interconnect-names = "wina",
"winb",
"winc",
"cursor";
};
dsia: dsi@54300000 {
@ -1052,7 +1030,6 @@
#iommu-cells = <1>;
#reset-cells = <1>;
#interconnect-cells = <1>;
};
emc: external-memory-controller@7001b000 {
@ -1066,7 +1043,6 @@
nvidia,memory-controller = <&mc>;
operating-points-v2 = <&emc_icc_dvfs_opp_table>;
#interconnect-cells = <0>;
#cooling-cells = <2>;
};

View file

@ -5788,8 +5788,12 @@
clocks = <&rpmhcc RPMH_CXO_CLK>;
clock-names = "xo";
power-domains = <&rpmhpd SC8280XP_NSP>;
power-domain-names = "nsp";
power-domains = <&rpmhpd SC8280XP_NSP>,
<&rpmhpd SC8280XP_CX>,
<&rpmhpd SC8280XP_MXC>;
power-domain-names = "nsp",
"cx",
"mxc";
memory-region = <&pil_nsp0_mem>;
@ -5919,8 +5923,12 @@
clocks = <&rpmhcc RPMH_CXO_CLK>;
clock-names = "xo";
power-domains = <&rpmhpd SC8280XP_NSP>;
power-domain-names = "nsp";
power-domains = <&rpmhpd SC8280XP_NSP>,
<&rpmhpd SC8280XP_CX>,
<&rpmhpd SC8280XP_MXC>;
power-domain-names = "nsp",
"cx",
"mxc";
memory-region = <&pil_nsp1_mem>;

View file

@ -31,9 +31,9 @@
};
&display_panel {
status = "okay";
compatible = "samsung,sofef00-ams628nw01", "samsung,sofef00";
compatible = "samsung,sofef00";
status = "okay";
};
&bq27441_fg {

View file

@ -4133,8 +4133,6 @@
usb_1: usb@a600000 {
compatible = "qcom,sm8550-dwc3", "qcom,snps-dwc3";
reg = <0x0 0x0a600000 0x0 0xfc100>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>,
<&gcc GCC_USB30_PRIM_MASTER_CLK>,

View file

@ -5150,9 +5150,6 @@
dma-coherent;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
ports {

View file

@ -1399,10 +1399,10 @@
<&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
<&gcc GCC_UFS_PHY_AHB_CLK>,
<&gcc GCC_UFS_PHY_UNIPRO_CORE_CLK>,
<&gcc GCC_UFS_PHY_ICE_CORE_CLK>,
<&rpmhcc RPMH_CXO_CLK>,
<&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>,
<&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>;
<&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>,
<&gcc GCC_UFS_PHY_ICE_CORE_CLK>;
clock-names = "core_clk",
"bus_aggr_clk",
"iface_clk",

View file

@ -199,7 +199,7 @@
compatible = "brcm,bcm43455-fmac", "brcm,bcm4329-fmac";
reg = <1>;
interrupt-parent = <&gpio0>;
interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>;
interrupts = <RK_PA3 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "host-wake";
pinctrl-names = "default";
pinctrl-0 = <&wifi_host_wake>;

View file

@ -14,7 +14,8 @@
joystick_mux_controller: mux-controller {
compatible = "gpio-mux";
pinctrl = <&mux_en_pins>;
pinctrl-0 = <&mux_en_pins>;
pinctrl-names = "default";
#mux-control-cells = <0>;
mux-gpios = <&gpio3 RK_PB3 GPIO_ACTIVE_LOW>,

View file

@ -424,9 +424,7 @@
&pcie0 {
ep-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>;
max-link-speed = <2>;
num-lanes = <2>;
pinctrl-names = "default";
status = "okay";
vpcie12v-supply = <&vcc12v_dcin>;

View file

@ -71,7 +71,6 @@
};
&pcie0 {
max-link-speed = <1>;
num-lanes = <1>;
vpcie3v3-supply = <&vcc3v3_sys>;
};

View file

@ -969,7 +969,6 @@
};
&spi1 {
max-freq = <10000000>;
status = "okay";
spiflash: flash@0 {

View file

@ -40,13 +40,13 @@
button-up {
label = "Volume Up";
linux,code = <KEY_VOLUMEUP>;
press-threshold-microvolt = <100000>;
press-threshold-microvolt = <2000>;
};
button-down {
label = "Volume Down";
linux,code = <KEY_VOLUMEDOWN>;
press-threshold-microvolt = <600000>;
press-threshold-microvolt = <300000>;
};
};

View file

@ -483,7 +483,7 @@
pinctrl-names = "default";
pinctrl-0 = <&q7_thermal_pin &bios_disable_override_hog_pin>;
gpios {
gpio-pins {
bios_disable_override_hog_pin: bios-disable-override-hog-pin {
rockchip,pins =
<3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_down>;

View file

@ -529,11 +529,11 @@
rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
};
vsel1_gpio: vsel1-gpio {
vsel1_gpio: vsel1-gpio-pin {
rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
};
vsel2_gpio: vsel2-gpio {
vsel2_gpio: vsel2-gpio-pin {
rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
};
};

View file

@ -11,7 +11,6 @@
#include "rk3568-wolfvision-pf5-display.dtsi"
&st7789 {
compatible = "jasonic,jt240mhqs-hwt-ek-e3",
"sitronix,st7789v";
compatible = "jasonic,jt240mhqs-hwt-ek-e3";
rotation = <270>;
};

View file

@ -201,6 +201,7 @@
pinctrl-names = "default";
pinctrl-0 = <&hp_det_l>;
simple-audio-card,bitclock-master = <&masterdai>;
simple-audio-card,format = "i2s";
simple-audio-card,hp-det-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_LOW>;
simple-audio-card,mclk-fs = <256>;
@ -211,15 +212,16 @@
"Headphones", "HPOR",
"IN1P", "Microphone Jack";
simple-audio-card,widgets =
"Headphone", "Headphone Jack",
"Headphone", "Headphones",
"Microphone", "Microphone Jack";
simple-audio-card,codec {
sound-dai = <&rt5616>;
};
simple-audio-card,cpu {
masterdai: simple-audio-card,cpu {
sound-dai = <&sai2>;
system-clock-frequency = <12288000>;
};
};
};
@ -727,10 +729,12 @@
rt5616: audio-codec@1b {
compatible = "realtek,rt5616";
reg = <0x1b>;
assigned-clocks = <&cru CLK_SAI2_MCLKOUT>;
assigned-clocks = <&cru CLK_SAI2_MCLKOUT_TO_IO>;
assigned-clock-rates = <12288000>;
clocks = <&cru CLK_SAI2_MCLKOUT>;
clocks = <&cru CLK_SAI2_MCLKOUT_TO_IO>;
clock-names = "mclk";
pinctrl-0 = <&sai2m0_mclk>;
pinctrl-names = "default";
#sound-dai-cells = <0>;
};
};

View file

@ -1261,7 +1261,7 @@
gpu: gpu@27800000 {
compatible = "rockchip,rk3576-mali", "arm,mali-bifrost";
reg = <0x0 0x27800000 0x0 0x200000>;
reg = <0x0 0x27800000 0x0 0x20000>;
assigned-clocks = <&scmi_clk SCMI_CLK_GPU>;
assigned-clock-rates = <198000000>;
clocks = <&cru CLK_GPU>;

View file

@ -1200,7 +1200,7 @@
status = "disabled";
};
rknn_mmu_1: iommu@fdac9000 {
rknn_mmu_1: iommu@fdaca000 {
compatible = "rockchip,rk3588-iommu", "rockchip,rk3568-iommu";
reg = <0x0 0xfdaca000 0x0 0x100>;
interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH 0>;
@ -1230,7 +1230,7 @@
status = "disabled";
};
rknn_mmu_2: iommu@fdad9000 {
rknn_mmu_2: iommu@fdada000 {
compatible = "rockchip,rk3588-iommu", "rockchip,rk3568-iommu";
reg = <0x0 0xfdada000 0x0 0x100>;
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH 0>;

View file

@ -14,7 +14,7 @@
};
&main_pmx0 {
gpmc0_pins_default: gpmc0-pins-default {
gpmc0_pins_default: gpmc0-default-pins {
pinctrl-single,pins = <
AM62X_IOPAD(0x003c, PIN_INPUT, 0) /* (K19) GPMC0_AD0 */
AM62X_IOPAD(0x0040, PIN_INPUT, 0) /* (L19) GPMC0_AD1 */

View file

@ -30,13 +30,10 @@
<&main_pktdma 0xc206 15>, /* egress slice 1 */
<&main_pktdma 0xc207 15>, /* egress slice 1 */
<&main_pktdma 0x4200 15>, /* ingress slice 0 */
<&main_pktdma 0x4201 15>, /* ingress slice 1 */
<&main_pktdma 0x4202 0>, /* mgmnt rsp slice 0 */
<&main_pktdma 0x4203 0>; /* mgmnt rsp slice 1 */
<&main_pktdma 0x4201 15>; /* ingress slice 1 */
dma-names = "tx0-0", "tx0-1", "tx0-2", "tx0-3",
"tx1-0", "tx1-1", "tx1-2", "tx1-3",
"rx0", "rx1",
"rxmgm0", "rxmgm1";
"rx0", "rx1";
firmware-name = "ti-pruss/am65x-sr2-pru0-prueth-fw.elf",
"ti-pruss/am65x-sr2-rtu0-prueth-fw.elf",

View file

@ -20,13 +20,13 @@
};
&main_pmx0 {
main_gpio1_exp_header_gpio_pins_default: main-gpio1-exp-header-gpio-pins-default {
main_gpio1_exp_header_gpio_pins_default: main-gpio1-exp-header-gpio-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(0x0220, PIN_INPUT, 7) /* (D14) SPI1_CS1.GPIO1_48 */
>;
};
main_spi1_pins_default: main-spi1-pins-default {
main_spi1_pins_default: main-spi1-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(0x0224, PIN_INPUT, 0) /* (C14) SPI1_CLK */
AM64X_IOPAD(0x021C, PIN_OUTPUT, 0) /* (B14) SPI1_CS0 */
@ -35,7 +35,7 @@
>;
};
main_uart3_pins_default: main-uart3-pins-default {
main_uart3_pins_default: main-uart3-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(0x0048, PIN_INPUT, 2) /* (U20) GPMC0_AD3.UART3_RXD */
AM64X_IOPAD(0x004c, PIN_OUTPUT, 2) /* (U18) GPMC0_AD4.UART3_TXD */
@ -52,7 +52,7 @@
&main_spi1 {
pinctrl-names = "default";
pinctrl-0 = <&main_spi1_pins_default>;
ti,pindir-d0-out-d1-in = <1>;
ti,pindir-d0-out-d1-in;
status = "okay";
};

View file

@ -45,7 +45,7 @@ void arch_efi_call_virt_teardown(void);
* switching to the EFI runtime stack.
*/
#define current_in_efi() \
(!preemptible() && efi_rt_stack_top != NULL && \
(efi_rt_stack_top != NULL && \
on_task_stack(current, READ_ONCE(efi_rt_stack_top[-1]), 1))
#define ARCH_EFI_IRQ_FLAGS_MASK (PSR_D_BIT | PSR_A_BIT | PSR_I_BIT | PSR_F_BIT)

View file

@ -300,6 +300,8 @@ void kvm_get_kimage_voffset(struct alt_instr *alt,
__le32 *origptr, __le32 *updptr, int nr_inst);
void kvm_compute_final_ctr_el0(struct alt_instr *alt,
__le32 *origptr, __le32 *updptr, int nr_inst);
void kvm_pan_patch_el2_entry(struct alt_instr *alt,
__le32 *origptr, __le32 *updptr, int nr_inst);
void __noreturn __cold nvhe_hyp_panic_handler(u64 esr, u64 spsr, u64 elr_virt,
u64 elr_phys, u64 par, uintptr_t vcpu, u64 far, u64 hpfar);

View file

@ -119,22 +119,6 @@ static inline unsigned long *vcpu_hcr(struct kvm_vcpu *vcpu)
return (unsigned long *)&vcpu->arch.hcr_el2;
}
static inline void vcpu_clear_wfx_traps(struct kvm_vcpu *vcpu)
{
vcpu->arch.hcr_el2 &= ~HCR_TWE;
if (atomic_read(&vcpu->arch.vgic_cpu.vgic_v3.its_vpe.vlpi_count) ||
vcpu->kvm->arch.vgic.nassgireq)
vcpu->arch.hcr_el2 &= ~HCR_TWI;
else
vcpu->arch.hcr_el2 |= HCR_TWI;
}
static inline void vcpu_set_wfx_traps(struct kvm_vcpu *vcpu)
{
vcpu->arch.hcr_el2 |= HCR_TWE;
vcpu->arch.hcr_el2 |= HCR_TWI;
}
static inline unsigned long vcpu_get_vsesr(struct kvm_vcpu *vcpu)
{
return vcpu->arch.vsesr_el2;

View file

@ -87,7 +87,15 @@ typedef u64 kvm_pte_t;
#define KVM_PTE_LEAF_ATTR_HI_SW GENMASK(58, 55)
#define KVM_PTE_LEAF_ATTR_HI_S1_XN BIT(54)
#define __KVM_PTE_LEAF_ATTR_HI_S1_XN BIT(54)
#define __KVM_PTE_LEAF_ATTR_HI_S1_UXN BIT(54)
#define __KVM_PTE_LEAF_ATTR_HI_S1_PXN BIT(53)
#define KVM_PTE_LEAF_ATTR_HI_S1_XN \
({ cpus_have_final_cap(ARM64_KVM_HVHE) ? \
(__KVM_PTE_LEAF_ATTR_HI_S1_UXN | \
__KVM_PTE_LEAF_ATTR_HI_S1_PXN) : \
__KVM_PTE_LEAF_ATTR_HI_S1_XN; })
#define KVM_PTE_LEAF_ATTR_HI_S2_XN GENMASK(54, 53)
@ -293,8 +301,8 @@ typedef bool (*kvm_pgtable_force_pte_cb_t)(u64 addr, u64 end,
* children.
* @KVM_PGTABLE_WALK_SHARED: Indicates the page-tables may be shared
* with other software walkers.
* @KVM_PGTABLE_WALK_HANDLE_FAULT: Indicates the page-table walk was
* invoked from a fault handler.
* @KVM_PGTABLE_WALK_IGNORE_EAGAIN: Don't terminate the walk early if
* the walker returns -EAGAIN.
* @KVM_PGTABLE_WALK_SKIP_BBM_TLBI: Visit and update table entries
* without Break-before-make's
* TLB invalidation.
@ -307,7 +315,7 @@ enum kvm_pgtable_walk_flags {
KVM_PGTABLE_WALK_TABLE_PRE = BIT(1),
KVM_PGTABLE_WALK_TABLE_POST = BIT(2),
KVM_PGTABLE_WALK_SHARED = BIT(3),
KVM_PGTABLE_WALK_HANDLE_FAULT = BIT(4),
KVM_PGTABLE_WALK_IGNORE_EAGAIN = BIT(4),
KVM_PGTABLE_WALK_SKIP_BBM_TLBI = BIT(5),
KVM_PGTABLE_WALK_SKIP_CMO = BIT(6),
};

View file

@ -2,7 +2,7 @@
#ifndef __ASM_SUSPEND_H
#define __ASM_SUSPEND_H
#define NR_CTX_REGS 13
#define NR_CTX_REGS 14
#define NR_CALLEE_SAVED_REGS 12
/*

View file

@ -91,7 +91,8 @@
*/
#define pstate_field(op1, op2) ((op1) << Op1_shift | (op2) << Op2_shift)
#define PSTATE_Imm_shift CRm_shift
#define SET_PSTATE(x, r) __emit_inst(0xd500401f | PSTATE_ ## r | ((!!x) << PSTATE_Imm_shift))
#define ENCODE_PSTATE(x, r) (0xd500401f | PSTATE_ ## r | ((!!x) << PSTATE_Imm_shift))
#define SET_PSTATE(x, r) __emit_inst(ENCODE_PSTATE(x, r))
#define PSTATE_PAN pstate_field(0, 4)
#define PSTATE_UAO pstate_field(0, 3)

View file

@ -402,7 +402,7 @@ int swsusp_arch_suspend(void)
* Memory allocated by get_safe_page() will be dealt with by the hibernate code,
* we don't need to free it here.
*/
int swsusp_arch_resume(void)
int __nocfi swsusp_arch_resume(void)
{
int rc;
void *zero_page;

View file

@ -86,6 +86,7 @@ KVM_NVHE_ALIAS(kvm_patch_vector_branch);
KVM_NVHE_ALIAS(kvm_update_va_mask);
KVM_NVHE_ALIAS(kvm_get_kimage_voffset);
KVM_NVHE_ALIAS(kvm_compute_final_ctr_el0);
KVM_NVHE_ALIAS(kvm_pan_patch_el2_entry);
KVM_NVHE_ALIAS(spectre_bhb_patch_loop_iter);
KVM_NVHE_ALIAS(spectre_bhb_patch_loop_mitigation_enable);
KVM_NVHE_ALIAS(spectre_bhb_patch_wa3);

View file

@ -968,20 +968,18 @@ static int sve_set_common(struct task_struct *target,
vq = sve_vq_from_vl(task_get_vl(target, type));
/* Enter/exit streaming mode */
if (system_supports_sme()) {
switch (type) {
case ARM64_VEC_SVE:
target->thread.svcr &= ~SVCR_SM_MASK;
set_tsk_thread_flag(target, TIF_SVE);
break;
case ARM64_VEC_SME:
target->thread.svcr |= SVCR_SM_MASK;
set_tsk_thread_flag(target, TIF_SME);
break;
default:
WARN_ON_ONCE(1);
return -EINVAL;
}
switch (type) {
case ARM64_VEC_SVE:
target->thread.svcr &= ~SVCR_SM_MASK;
set_tsk_thread_flag(target, TIF_SVE);
break;
case ARM64_VEC_SME:
target->thread.svcr |= SVCR_SM_MASK;
set_tsk_thread_flag(target, TIF_SME);
break;
default:
WARN_ON_ONCE(1);
return -EINVAL;
}
/* Always zero V regs, FPSR, and FPCR */

View file

@ -449,12 +449,28 @@ static int restore_sve_fpsimd_context(struct user_ctxs *user)
if (user->sve_size < SVE_SIG_CONTEXT_SIZE(vq))
return -EINVAL;
if (sm) {
sme_alloc(current, false);
if (!current->thread.sme_state)
return -ENOMEM;
}
sve_alloc(current, true);
if (!current->thread.sve_state) {
clear_thread_flag(TIF_SVE);
return -ENOMEM;
}
if (sm) {
current->thread.svcr |= SVCR_SM_MASK;
set_thread_flag(TIF_SME);
} else {
current->thread.svcr &= ~SVCR_SM_MASK;
set_thread_flag(TIF_SVE);
}
current->thread.fp_type = FP_STATE_SVE;
err = __copy_from_user(current->thread.sve_state,
(char __user const *)user->sve +
SVE_SIG_REGS_OFFSET,
@ -462,12 +478,6 @@ static int restore_sve_fpsimd_context(struct user_ctxs *user)
if (err)
return -EFAULT;
if (flags & SVE_SIG_FLAG_SM)
current->thread.svcr |= SVCR_SM_MASK;
else
set_thread_flag(TIF_SVE);
current->thread.fp_type = FP_STATE_SVE;
err = read_fpsimd_context(&fpsimd, user);
if (err)
return err;
@ -576,6 +586,10 @@ static int restore_za_context(struct user_ctxs *user)
if (user->za_size < ZA_SIG_CONTEXT_SIZE(vq))
return -EINVAL;
sve_alloc(current, false);
if (!current->thread.sve_state)
return -ENOMEM;
sme_alloc(current, true);
if (!current->thread.sme_state) {
current->thread.svcr &= ~SVCR_ZA_MASK;

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