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perf regs: Refactor use of arch__sample_reg_masks() to perf_reg_name()
arch__sample_reg_masks isn't supported on ARM(32), csky, loongarch, MIPS, RISC-V and s390. The table returned by the function just has the name of a register paired with the corresponding sample_regs_user mask value. For a given perf register we can compute the name with perf_reg_name and the mask is just 1 left-shifted by the perf register number. Change __parse_regs to use this method for finding registers rather than arch__sample_reg_masks, thereby adding __parse_regs support for ARM(32), csky, loongarch, MIPS, RISC-V and s390. As arch__sample_reg_masks is then unused, remove the now unneeded declarations. Signed-off-by: Ian Rogers <irogers@google.com> Tested-by: Thomas Richter <tmricht@linux.ibm.com> Cc: Aditya Bodkhe <aditya.b1@linux.ibm.com> Cc: Adrian Hunter <adrian.hunter@intel.com> Cc: Albert Ou <aou@eecs.berkeley.edu> Cc: Alexandre Ghiti <alex@ghiti.fr> Cc: Andi Kleen <ak@linux.intel.com> Cc: Athira Rajeev <atrajeev@linux.ibm.com> Cc: Chun-Tse Shao <ctshao@google.com> Cc: Dapeng Mi <dapeng1.mi@linux.intel.com> Cc: Dmitriy Vyukov <dvyukov@google.com> Cc: Dr. David Alan Gilbert <linux@treblig.org> Cc: Guo Ren <guoren@kernel.org> Cc: Haibo Xu <haibo1.xu@intel.com> Cc: Howard Chu <howardchu95@gmail.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: James Clark <james.clark@linaro.org> Cc: Jiri Olsa <jolsa@kernel.org> Cc: John Garry <john.g.garry@oracle.com> Cc: Krzysztof Łopatowski <krzysztof.m.lopatowski@gmail.com> Cc: Leo Yan <leo.yan@linux.dev> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Palmer Dabbelt <palmer@dabbelt.com> Cc: Paul Walmsley <pjw@kernel.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Sergei Trofimovich <slyich@gmail.com> Cc: Shimin Guo <shimin.guo@skydio.com> Cc: Stephen Brennan <stephen.s.brennan@oracle.com> Cc: Thomas Falcon <thomas.falcon@intel.com> Cc: Will Deacon <will@kernel.org> Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
This commit is contained in:
Ian Rogers
Arnaldo Carvalho de Melo
parent
f0d98c78f8
commit
3d06db9bad
14 changed files with 76 additions and 282 deletions
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@ -2,10 +2,6 @@
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#include "perf_regs.h"
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#include "../../../util/perf_regs.h"
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static const struct sample_reg sample_reg_masks[] = {
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SMPL_REG_END
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};
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uint64_t arch__intr_reg_mask(void)
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{
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return PERF_REGS_MASK;
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@ -15,8 +11,3 @@ uint64_t arch__user_reg_mask(void)
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{
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return PERF_REGS_MASK;
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}
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const struct sample_reg *arch__sample_reg_masks(void)
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{
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return sample_reg_masks;
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}
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@ -1,18 +1,12 @@
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// SPDX-License-Identifier: GPL-2.0
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#include <inttypes.h>
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#include <stdio.h>
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#include <string.h>
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#include "debug.h"
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#include "symbol.h"
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#include "callchain.h"
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#include "callchain.h" // prototype of arch__add_leaf_frame_record_opts
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#include "perf_regs.h"
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#include "record.h"
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#include "util/perf_regs.h"
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#define SMPL_REG_MASK(b) (1ULL << (b))
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void arch__add_leaf_frame_record_opts(struct record_opts *opts)
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{
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const struct sample_reg *sample_reg_masks = arch__sample_reg_masks();
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opts->sample_user_regs |= sample_reg_masks[PERF_REG_ARM64_LR].mask;
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opts->sample_user_regs |= SMPL_REG_MASK(PERF_REG_ARM64_LR);
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}
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@ -12,48 +12,12 @@
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#include "../../../util/event.h"
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#include "../../../util/perf_regs.h"
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#define SMPL_REG_MASK(b) (1ULL << (b))
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#ifndef HWCAP_SVE
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#define HWCAP_SVE (1 << 22)
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#endif
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static const struct sample_reg sample_reg_masks[] = {
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SMPL_REG(x0, PERF_REG_ARM64_X0),
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SMPL_REG(x1, PERF_REG_ARM64_X1),
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SMPL_REG(x2, PERF_REG_ARM64_X2),
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SMPL_REG(x3, PERF_REG_ARM64_X3),
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SMPL_REG(x4, PERF_REG_ARM64_X4),
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SMPL_REG(x5, PERF_REG_ARM64_X5),
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SMPL_REG(x6, PERF_REG_ARM64_X6),
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SMPL_REG(x7, PERF_REG_ARM64_X7),
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SMPL_REG(x8, PERF_REG_ARM64_X8),
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SMPL_REG(x9, PERF_REG_ARM64_X9),
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SMPL_REG(x10, PERF_REG_ARM64_X10),
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SMPL_REG(x11, PERF_REG_ARM64_X11),
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SMPL_REG(x12, PERF_REG_ARM64_X12),
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SMPL_REG(x13, PERF_REG_ARM64_X13),
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SMPL_REG(x14, PERF_REG_ARM64_X14),
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SMPL_REG(x15, PERF_REG_ARM64_X15),
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SMPL_REG(x16, PERF_REG_ARM64_X16),
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SMPL_REG(x17, PERF_REG_ARM64_X17),
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SMPL_REG(x18, PERF_REG_ARM64_X18),
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SMPL_REG(x19, PERF_REG_ARM64_X19),
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SMPL_REG(x20, PERF_REG_ARM64_X20),
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SMPL_REG(x21, PERF_REG_ARM64_X21),
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SMPL_REG(x22, PERF_REG_ARM64_X22),
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SMPL_REG(x23, PERF_REG_ARM64_X23),
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SMPL_REG(x24, PERF_REG_ARM64_X24),
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SMPL_REG(x25, PERF_REG_ARM64_X25),
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SMPL_REG(x26, PERF_REG_ARM64_X26),
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SMPL_REG(x27, PERF_REG_ARM64_X27),
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SMPL_REG(x28, PERF_REG_ARM64_X28),
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SMPL_REG(x29, PERF_REG_ARM64_X29),
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SMPL_REG(lr, PERF_REG_ARM64_LR),
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SMPL_REG(sp, PERF_REG_ARM64_SP),
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SMPL_REG(pc, PERF_REG_ARM64_PC),
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SMPL_REG(vg, PERF_REG_ARM64_VG),
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SMPL_REG_END
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};
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/* %xNUM */
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#define SDT_OP_REGEX1 "^(x[1-2]?[0-9]|3[0-1])$"
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@ -175,8 +139,3 @@ uint64_t arch__user_reg_mask(void)
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}
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return PERF_REGS_MASK;
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}
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const struct sample_reg *arch__sample_reg_masks(void)
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{
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return sample_reg_masks;
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}
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@ -2,10 +2,6 @@
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#include "perf_regs.h"
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#include "../../util/perf_regs.h"
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static const struct sample_reg sample_reg_masks[] = {
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SMPL_REG_END
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};
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uint64_t arch__intr_reg_mask(void)
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{
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return PERF_REGS_MASK;
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@ -15,8 +11,3 @@ uint64_t arch__user_reg_mask(void)
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{
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return PERF_REGS_MASK;
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}
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const struct sample_reg *arch__sample_reg_masks(void)
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{
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return sample_reg_masks;
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}
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@ -2,10 +2,6 @@
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#include "perf_regs.h"
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#include "../../../util/perf_regs.h"
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static const struct sample_reg sample_reg_masks[] = {
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SMPL_REG_END
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};
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uint64_t arch__intr_reg_mask(void)
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{
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return PERF_REGS_MASK;
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@ -15,8 +11,3 @@ uint64_t arch__user_reg_mask(void)
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{
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return PERF_REGS_MASK;
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}
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const struct sample_reg *arch__sample_reg_masks(void)
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{
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return sample_reg_masks;
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}
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@ -2,10 +2,6 @@
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#include "perf_regs.h"
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#include "../../util/perf_regs.h"
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static const struct sample_reg sample_reg_masks[] = {
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SMPL_REG_END
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};
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uint64_t arch__intr_reg_mask(void)
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{
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return PERF_REGS_MASK;
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@ -15,8 +11,3 @@ uint64_t arch__user_reg_mask(void)
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{
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return PERF_REGS_MASK;
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}
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const struct sample_reg *arch__sample_reg_masks(void)
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{
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return sample_reg_masks;
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}
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@ -18,69 +18,6 @@
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#define PVR_POWER10 0x0080
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#define PVR_POWER11 0x0082
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static const struct sample_reg sample_reg_masks[] = {
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SMPL_REG(r0, PERF_REG_POWERPC_R0),
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SMPL_REG(r1, PERF_REG_POWERPC_R1),
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SMPL_REG(r2, PERF_REG_POWERPC_R2),
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SMPL_REG(r3, PERF_REG_POWERPC_R3),
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SMPL_REG(r4, PERF_REG_POWERPC_R4),
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SMPL_REG(r5, PERF_REG_POWERPC_R5),
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SMPL_REG(r6, PERF_REG_POWERPC_R6),
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SMPL_REG(r7, PERF_REG_POWERPC_R7),
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SMPL_REG(r8, PERF_REG_POWERPC_R8),
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SMPL_REG(r9, PERF_REG_POWERPC_R9),
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SMPL_REG(r10, PERF_REG_POWERPC_R10),
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SMPL_REG(r11, PERF_REG_POWERPC_R11),
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SMPL_REG(r12, PERF_REG_POWERPC_R12),
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SMPL_REG(r13, PERF_REG_POWERPC_R13),
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SMPL_REG(r14, PERF_REG_POWERPC_R14),
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SMPL_REG(r15, PERF_REG_POWERPC_R15),
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SMPL_REG(r16, PERF_REG_POWERPC_R16),
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SMPL_REG(r17, PERF_REG_POWERPC_R17),
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SMPL_REG(r18, PERF_REG_POWERPC_R18),
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SMPL_REG(r19, PERF_REG_POWERPC_R19),
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SMPL_REG(r20, PERF_REG_POWERPC_R20),
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SMPL_REG(r21, PERF_REG_POWERPC_R21),
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SMPL_REG(r22, PERF_REG_POWERPC_R22),
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SMPL_REG(r23, PERF_REG_POWERPC_R23),
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SMPL_REG(r24, PERF_REG_POWERPC_R24),
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SMPL_REG(r25, PERF_REG_POWERPC_R25),
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SMPL_REG(r26, PERF_REG_POWERPC_R26),
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SMPL_REG(r27, PERF_REG_POWERPC_R27),
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SMPL_REG(r28, PERF_REG_POWERPC_R28),
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SMPL_REG(r29, PERF_REG_POWERPC_R29),
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SMPL_REG(r30, PERF_REG_POWERPC_R30),
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SMPL_REG(r31, PERF_REG_POWERPC_R31),
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SMPL_REG(nip, PERF_REG_POWERPC_NIP),
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SMPL_REG(msr, PERF_REG_POWERPC_MSR),
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SMPL_REG(orig_r3, PERF_REG_POWERPC_ORIG_R3),
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SMPL_REG(ctr, PERF_REG_POWERPC_CTR),
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SMPL_REG(link, PERF_REG_POWERPC_LINK),
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SMPL_REG(xer, PERF_REG_POWERPC_XER),
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SMPL_REG(ccr, PERF_REG_POWERPC_CCR),
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SMPL_REG(softe, PERF_REG_POWERPC_SOFTE),
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SMPL_REG(trap, PERF_REG_POWERPC_TRAP),
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SMPL_REG(dar, PERF_REG_POWERPC_DAR),
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SMPL_REG(dsisr, PERF_REG_POWERPC_DSISR),
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SMPL_REG(sier, PERF_REG_POWERPC_SIER),
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SMPL_REG(mmcra, PERF_REG_POWERPC_MMCRA),
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SMPL_REG(mmcr0, PERF_REG_POWERPC_MMCR0),
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SMPL_REG(mmcr1, PERF_REG_POWERPC_MMCR1),
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SMPL_REG(mmcr2, PERF_REG_POWERPC_MMCR2),
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SMPL_REG(mmcr3, PERF_REG_POWERPC_MMCR3),
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SMPL_REG(sier2, PERF_REG_POWERPC_SIER2),
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SMPL_REG(sier3, PERF_REG_POWERPC_SIER3),
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SMPL_REG(pmc1, PERF_REG_POWERPC_PMC1),
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SMPL_REG(pmc2, PERF_REG_POWERPC_PMC2),
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SMPL_REG(pmc3, PERF_REG_POWERPC_PMC3),
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SMPL_REG(pmc4, PERF_REG_POWERPC_PMC4),
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SMPL_REG(pmc5, PERF_REG_POWERPC_PMC5),
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SMPL_REG(pmc6, PERF_REG_POWERPC_PMC6),
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SMPL_REG(sdar, PERF_REG_POWERPC_SDAR),
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SMPL_REG(siar, PERF_REG_POWERPC_SIAR),
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SMPL_REG_END
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};
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/* REG or %rREG */
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#define SDT_OP_REGEX1 "^(%r)?([1-2]?[0-9]|3[0-1])$"
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@ -233,8 +170,3 @@ uint64_t arch__user_reg_mask(void)
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{
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return PERF_REGS_MASK;
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}
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const struct sample_reg *arch__sample_reg_masks(void)
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{
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return sample_reg_masks;
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}
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#include "perf_regs.h"
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#include "../../util/perf_regs.h"
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static const struct sample_reg sample_reg_masks[] = {
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SMPL_REG_END
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};
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uint64_t arch__intr_reg_mask(void)
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{
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return PERF_REGS_MASK;
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@ -15,8 +11,3 @@ uint64_t arch__user_reg_mask(void)
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{
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return PERF_REGS_MASK;
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}
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const struct sample_reg *arch__sample_reg_masks(void)
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{
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return sample_reg_masks;
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}
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@ -2,10 +2,6 @@
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#include "perf_regs.h"
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#include "../../util/perf_regs.h"
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static const struct sample_reg sample_reg_masks[] = {
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SMPL_REG_END
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};
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uint64_t arch__intr_reg_mask(void)
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{
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return PERF_REGS_MASK;
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@ -15,8 +11,3 @@ uint64_t arch__user_reg_mask(void)
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{
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return PERF_REGS_MASK;
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}
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const struct sample_reg *arch__sample_reg_masks(void)
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{
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return sample_reg_masks;
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}
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#include "../../../util/pmu.h"
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#include "../../../util/pmus.h"
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static const struct sample_reg sample_reg_masks[] = {
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SMPL_REG(AX, PERF_REG_X86_AX),
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SMPL_REG(BX, PERF_REG_X86_BX),
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SMPL_REG(CX, PERF_REG_X86_CX),
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SMPL_REG(DX, PERF_REG_X86_DX),
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SMPL_REG(SI, PERF_REG_X86_SI),
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SMPL_REG(DI, PERF_REG_X86_DI),
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SMPL_REG(BP, PERF_REG_X86_BP),
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SMPL_REG(SP, PERF_REG_X86_SP),
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SMPL_REG(IP, PERF_REG_X86_IP),
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SMPL_REG(FLAGS, PERF_REG_X86_FLAGS),
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SMPL_REG(CS, PERF_REG_X86_CS),
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SMPL_REG(SS, PERF_REG_X86_SS),
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#ifdef HAVE_ARCH_X86_64_SUPPORT
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SMPL_REG(R8, PERF_REG_X86_R8),
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SMPL_REG(R9, PERF_REG_X86_R9),
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SMPL_REG(R10, PERF_REG_X86_R10),
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SMPL_REG(R11, PERF_REG_X86_R11),
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SMPL_REG(R12, PERF_REG_X86_R12),
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SMPL_REG(R13, PERF_REG_X86_R13),
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SMPL_REG(R14, PERF_REG_X86_R14),
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SMPL_REG(R15, PERF_REG_X86_R15),
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#endif
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SMPL_REG2(XMM0, PERF_REG_X86_XMM0),
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SMPL_REG2(XMM1, PERF_REG_X86_XMM1),
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SMPL_REG2(XMM2, PERF_REG_X86_XMM2),
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SMPL_REG2(XMM3, PERF_REG_X86_XMM3),
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SMPL_REG2(XMM4, PERF_REG_X86_XMM4),
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SMPL_REG2(XMM5, PERF_REG_X86_XMM5),
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SMPL_REG2(XMM6, PERF_REG_X86_XMM6),
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SMPL_REG2(XMM7, PERF_REG_X86_XMM7),
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SMPL_REG2(XMM8, PERF_REG_X86_XMM8),
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SMPL_REG2(XMM9, PERF_REG_X86_XMM9),
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SMPL_REG2(XMM10, PERF_REG_X86_XMM10),
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SMPL_REG2(XMM11, PERF_REG_X86_XMM11),
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SMPL_REG2(XMM12, PERF_REG_X86_XMM12),
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SMPL_REG2(XMM13, PERF_REG_X86_XMM13),
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SMPL_REG2(XMM14, PERF_REG_X86_XMM14),
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SMPL_REG2(XMM15, PERF_REG_X86_XMM15),
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SMPL_REG_END
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};
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struct sdt_name_reg {
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const char *sdt_name;
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const char *uprobe_name;
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@ -276,11 +234,6 @@ int arch_sdt_arg_parse_op(char *old_op, char **new_op)
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return SDT_ARG_VALID;
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}
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const struct sample_reg *arch__sample_reg_masks(void)
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{
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return sample_reg_masks;
|
||||
}
|
||||
|
||||
uint64_t arch__intr_reg_mask(void)
|
||||
{
|
||||
struct perf_event_attr attr = {
|
||||
|
|
|
|||
|
|
@ -2,7 +2,6 @@
|
|||
#include "arm64-frame-pointer-unwind-support.h"
|
||||
#include "callchain.h"
|
||||
#include "event.h"
|
||||
#include "perf_regs.h" // SMPL_REG_MASK
|
||||
#include "unwind.h"
|
||||
#include <string.h>
|
||||
|
||||
|
|
@ -15,6 +14,8 @@ struct entries {
|
|||
size_t length;
|
||||
};
|
||||
|
||||
#define SMPL_REG_MASK(b) (1ULL << (b))
|
||||
|
||||
static bool get_leaf_frame_caller_enabled(struct perf_sample *sample)
|
||||
{
|
||||
struct regs_dump *regs;
|
||||
|
|
|
|||
|
|
@ -5,15 +5,54 @@
|
|||
#include <string.h>
|
||||
#include <stdio.h>
|
||||
#include "util/debug.h"
|
||||
#include <dwarf-regs.h>
|
||||
#include <subcmd/parse-options.h>
|
||||
#include "util/perf_regs.h"
|
||||
#include "util/parse-regs-options.h"
|
||||
|
||||
static void list_perf_regs(FILE *fp, uint64_t mask)
|
||||
{
|
||||
const char *last_name = NULL;
|
||||
|
||||
fprintf(fp, "available registers: ");
|
||||
for (int reg = 0; reg < 64; reg++) {
|
||||
const char *name;
|
||||
|
||||
if (((1ULL << reg) & mask) == 0)
|
||||
continue;
|
||||
|
||||
name = perf_reg_name(reg, EM_HOST);
|
||||
if (name && (!last_name || strcmp(last_name, name)))
|
||||
fprintf(fp, "%s%s", reg > 0 ? " " : "", name);
|
||||
last_name = name;
|
||||
}
|
||||
fputc('\n', fp);
|
||||
}
|
||||
|
||||
static uint64_t name_to_perf_reg_mask(const char *to_match, uint64_t mask)
|
||||
{
|
||||
uint64_t reg_mask = 0;
|
||||
|
||||
for (int reg = 0; reg < 64; reg++) {
|
||||
const char *name;
|
||||
|
||||
if (((1ULL << reg) & mask) == 0)
|
||||
continue;
|
||||
|
||||
name = perf_reg_name(reg, EM_HOST);
|
||||
if (!name)
|
||||
continue;
|
||||
|
||||
if (!strcasecmp(to_match, name))
|
||||
reg_mask |= 1ULL << reg;
|
||||
}
|
||||
return reg_mask;
|
||||
}
|
||||
|
||||
static int
|
||||
__parse_regs(const struct option *opt, const char *str, int unset, bool intr)
|
||||
{
|
||||
uint64_t *mode = (uint64_t *)opt->value;
|
||||
const struct sample_reg *r = NULL;
|
||||
char *s, *os = NULL, *p;
|
||||
int ret = -1;
|
||||
uint64_t mask;
|
||||
|
|
@ -27,50 +66,41 @@ __parse_regs(const struct option *opt, const char *str, int unset, bool intr)
|
|||
if (*mode)
|
||||
return -1;
|
||||
|
||||
if (intr)
|
||||
mask = arch__intr_reg_mask();
|
||||
else
|
||||
mask = arch__user_reg_mask();
|
||||
|
||||
/* str may be NULL in case no arg is passed to -I */
|
||||
if (str) {
|
||||
/* because str is read-only */
|
||||
s = os = strdup(str);
|
||||
if (!s)
|
||||
return -1;
|
||||
if (!str)
|
||||
return -1;
|
||||
|
||||
for (;;) {
|
||||
p = strchr(s, ',');
|
||||
if (p)
|
||||
*p = '\0';
|
||||
mask = intr ? arch__intr_reg_mask() : arch__user_reg_mask();
|
||||
|
||||
if (!strcmp(s, "?")) {
|
||||
fprintf(stderr, "available registers: ");
|
||||
for (r = arch__sample_reg_masks(); r->name; r++) {
|
||||
if (r->mask & mask)
|
||||
fprintf(stderr, "%s ", r->name);
|
||||
}
|
||||
fputc('\n', stderr);
|
||||
/* just printing available regs */
|
||||
goto error;
|
||||
}
|
||||
for (r = arch__sample_reg_masks(); r->name; r++) {
|
||||
if ((r->mask & mask) && !strcasecmp(s, r->name))
|
||||
break;
|
||||
}
|
||||
if (!r || !r->name) {
|
||||
ui__warning("Unknown register \"%s\", check man page or run \"perf record %s?\"\n",
|
||||
s, intr ? "-I" : "--user-regs=");
|
||||
goto error;
|
||||
}
|
||||
/* because str is read-only */
|
||||
s = os = strdup(str);
|
||||
if (!s)
|
||||
return -1;
|
||||
|
||||
*mode |= r->mask;
|
||||
for (;;) {
|
||||
uint64_t reg_mask;
|
||||
|
||||
if (!p)
|
||||
break;
|
||||
p = strchr(s, ',');
|
||||
if (p)
|
||||
*p = '\0';
|
||||
|
||||
s = p + 1;
|
||||
if (!strcmp(s, "?")) {
|
||||
list_perf_regs(stderr, mask);
|
||||
goto error;
|
||||
}
|
||||
|
||||
reg_mask = name_to_perf_reg_mask(s, mask);
|
||||
if (reg_mask == 0) {
|
||||
ui__warning("Unknown register \"%s\", check man page or run \"perf record %s?\"\n",
|
||||
s, intr ? "-I" : "--user-regs=");
|
||||
goto error;
|
||||
}
|
||||
*mode |= reg_mask;
|
||||
|
||||
if (!p)
|
||||
break;
|
||||
|
||||
s = p + 1;
|
||||
}
|
||||
ret = 0;
|
||||
|
||||
|
|
|
|||
|
|
@ -23,15 +23,6 @@ uint64_t __weak arch__user_reg_mask(void)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static const struct sample_reg sample_reg_masks[] = {
|
||||
SMPL_REG_END
|
||||
};
|
||||
|
||||
const struct sample_reg * __weak arch__sample_reg_masks(void)
|
||||
{
|
||||
return sample_reg_masks;
|
||||
}
|
||||
|
||||
const char *perf_reg_name(int id, uint16_t e_machine)
|
||||
{
|
||||
const char *reg_name = NULL;
|
||||
|
|
|
|||
|
|
@ -7,17 +7,6 @@
|
|||
|
||||
struct regs_dump;
|
||||
|
||||
struct sample_reg {
|
||||
const char *name;
|
||||
uint64_t mask;
|
||||
};
|
||||
|
||||
#define SMPL_REG_MASK(b) (1ULL << (b))
|
||||
#define SMPL_REG(n, b) { .name = #n, .mask = SMPL_REG_MASK(b) }
|
||||
#define SMPL_REG2_MASK(b) (3ULL << (b))
|
||||
#define SMPL_REG2(n, b) { .name = #n, .mask = SMPL_REG2_MASK(b) }
|
||||
#define SMPL_REG_END { .name = NULL }
|
||||
|
||||
enum {
|
||||
SDT_ARG_VALID = 0,
|
||||
SDT_ARG_SKIP,
|
||||
|
|
@ -26,7 +15,6 @@ enum {
|
|||
int arch_sdt_arg_parse_op(char *old_op, char **new_op);
|
||||
uint64_t arch__intr_reg_mask(void);
|
||||
uint64_t arch__user_reg_mask(void);
|
||||
const struct sample_reg *arch__sample_reg_masks(void);
|
||||
|
||||
const char *perf_reg_name(int id, uint16_t e_machine);
|
||||
int perf_reg_value(u64 *valp, struct regs_dump *regs, int id);
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue