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LoongArch: Adjust boot & setup for 32BIT/64BIT
Adjust boot & setup for both 32BIT and 64BIT, including: efi header definition, MAX_IO_PICS definition, kernel entry and environment setup routines, etc. Add a fallback path in fdt_cpu_clk_init() to avoid 0MHz in /proc/cpuinfo if there is no valid clock freq from firmware. Reviewed-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
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708ed32c84
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7b2afeafaf
8 changed files with 43 additions and 27 deletions
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@ -42,7 +42,7 @@ extern unsigned long vm_map_base;
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#endif
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#define DMW_PABITS 48
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#define TO_PHYS_MASK ((1ULL << DMW_PABITS) - 1)
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#define TO_PHYS_MASK ((_ULL(1) << _ULL(DMW_PABITS)) - 1)
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/*
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* Memory above this physical address will be considered highmem.
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@ -12,7 +12,7 @@
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#define dmi_early_unmap(x, l) dmi_unmap(x)
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#define dmi_alloc(l) memblock_alloc(l, PAGE_SIZE)
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static inline void *dmi_remap(u64 phys_addr, unsigned long size)
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static inline void *dmi_remap(phys_addr_t phys_addr, unsigned long size)
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{
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return ((void *)TO_CACHE(phys_addr));
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}
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@ -60,7 +60,12 @@ void spurious_interrupt(void);
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#define arch_trigger_cpumask_backtrace arch_trigger_cpumask_backtrace
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void arch_trigger_cpumask_backtrace(const struct cpumask *mask, int exclude_cpu);
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#ifdef CONFIG_32BIT
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#define MAX_IO_PICS 1
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#else
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#define MAX_IO_PICS 8
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#endif
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#define NR_IRQS (64 + NR_VECTORS * (NR_CPUS + MAX_IO_PICS))
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struct acpi_vector_group {
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@ -9,7 +9,11 @@
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.macro __EFI_PE_HEADER
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.long IMAGE_NT_SIGNATURE
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.Lcoff_header:
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#ifdef CONFIG_32BIT
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.short IMAGE_FILE_MACHINE_LOONGARCH32 /* Machine */
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#else
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.short IMAGE_FILE_MACHINE_LOONGARCH64 /* Machine */
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#endif
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.short .Lsection_count /* NumberOfSections */
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.long 0 /* TimeDateStamp */
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.long 0 /* PointerToSymbolTable */
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@ -115,7 +115,9 @@ void __init efi_init(void)
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efi_systab_report_header(&efi_systab->hdr, efi_systab->fw_vendor);
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set_bit(EFI_64BIT, &efi.flags);
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if (IS_ENABLED(CONFIG_64BIT))
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set_bit(EFI_64BIT, &efi.flags);
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efi_nr_tables = efi_systab->nr_tables;
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efi_config_table = (unsigned long)efi_systab->tables;
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@ -72,9 +72,12 @@ static int __init fdt_cpu_clk_init(void)
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clk = of_clk_get(np, 0);
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of_node_put(np);
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cpu_clock_freq = 200 * 1000 * 1000;
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if (IS_ERR(clk))
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if (IS_ERR(clk)) {
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pr_warn("No valid CPU clock freq, assume 200MHz.\n");
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return -ENODEV;
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}
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cpu_clock_freq = clk_get_rate(clk);
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clk_put(clk);
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@ -43,36 +43,29 @@ SYM_DATA(kernel_fsize, .long _kernel_fsize);
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SYM_CODE_START(kernel_entry) # kernel entry point
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/* Config direct window and set PG */
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SETUP_DMWINS t0
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SETUP_TWINS
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SETUP_MODES t0
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JUMP_VIRT_ADDR t0, t1
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/* Enable PG */
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li.w t0, 0xb0 # PLV=0, IE=0, PG=1
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csrwr t0, LOONGARCH_CSR_CRMD
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li.w t0, 0x04 # PLV=0, PIE=1, PWE=0
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csrwr t0, LOONGARCH_CSR_PRMD
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li.w t0, 0x00 # FPE=0, SXE=0, ASXE=0, BTE=0
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csrwr t0, LOONGARCH_CSR_EUEN
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SETUP_DMWINS t0
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la.pcrel t0, __bss_start # clear .bss
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st.d zero, t0, 0
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LONG_S zero, t0, 0
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la.pcrel t1, __bss_stop - LONGSIZE
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1:
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addi.d t0, t0, LONGSIZE
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st.d zero, t0, 0
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PTR_ADDI t0, t0, LONGSIZE
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LONG_S zero, t0, 0
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bne t0, t1, 1b
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la.pcrel t0, fw_arg0
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st.d a0, t0, 0 # firmware arguments
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PTR_S a0, t0, 0 # firmware arguments
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la.pcrel t0, fw_arg1
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st.d a1, t0, 0
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PTR_S a1, t0, 0
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la.pcrel t0, fw_arg2
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st.d a2, t0, 0
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PTR_S a2, t0, 0
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#ifdef CONFIG_PAGE_SIZE_4KB
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li.d t0, 0
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li.d t1, CSR_STFILL
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LONG_LI t0, 0
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LONG_LI t1, CSR_STFILL
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csrxchg t0, t1, LOONGARCH_CSR_IMPCTL1
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#endif
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/* KSave3 used for percpu base, initialized as 0 */
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@ -98,7 +91,7 @@ SYM_CODE_START(kernel_entry) # kernel entry point
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/* Jump to the new kernel: new_pc = current_pc + random_offset */
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pcaddi t0, 0
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add.d t0, t0, a0
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PTR_ADD t0, t0, a0
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jirl zero, t0, 0xc
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#endif /* CONFIG_RANDOMIZE_BASE */
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@ -121,12 +114,14 @@ SYM_CODE_END(kernel_entry)
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*/
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SYM_CODE_START(smpboot_entry)
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SETUP_DMWINS t0
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SETUP_TWINS
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SETUP_MODES t0
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JUMP_VIRT_ADDR t0, t1
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SETUP_DMWINS t0
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#ifdef CONFIG_PAGE_SIZE_4KB
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li.d t0, 0
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li.d t1, CSR_STFILL
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LONG_LI t0, 0
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LONG_LI t1, CSR_STFILL
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csrxchg t0, t1, LOONGARCH_CSR_IMPCTL1
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#endif
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/* Enable PG */
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@ -68,18 +68,25 @@ static inline void __init relocate_absolute(long random_offset)
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for (p = begin; (void *)p < end; p++) {
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long v = p->symvalue;
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uint32_t lu12iw, ori, lu32id, lu52id;
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uint32_t lu12iw, ori;
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#ifdef CONFIG_64BIT
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uint32_t lu32id, lu52id;
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#endif
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union loongarch_instruction *insn = (void *)p->pc;
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lu12iw = (v >> 12) & 0xfffff;
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ori = v & 0xfff;
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#ifdef CONFIG_64BIT
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lu32id = (v >> 32) & 0xfffff;
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lu52id = v >> 52;
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#endif
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insn[0].reg1i20_format.immediate = lu12iw;
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insn[1].reg2i12_format.immediate = ori;
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#ifdef CONFIG_64BIT
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insn[2].reg1i20_format.immediate = lu32id;
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insn[3].reg2i12_format.immediate = lu52id;
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#endif
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}
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}
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