archives/zig
1
0
Fork 0
mirror of https://codeberg.org/ziglang/zig.git synced 2026-03-08 01:04:43 +01:00
Code Issues Projects Releases Packages Wiki Activity Actions

libc: update Linux headers to 6.19

Browse source
This commit is contained in:
Alex Rønne Petersen 2026-02-09 23:36:43 +01:00
parent 80db2e0b8b
commit 7af9882c6d
No known key found for this signature in database
183 changed files with 5922 additions and 1464 deletions
Download patch file Download diff file Expand all files Collapse all files

1
lib/libc/include/aarch64-linux-any/asm/hwcap.h vendored
View file

@ -145,5 +145,6 @@
*/
#define HWCAP3_MTE_FAR (1UL << 0)
#define HWCAP3_MTE_STORE_ONLY (1UL << 1)
#define HWCAP3_LSFE (1UL << 2)
#endif /* __ASM_HWCAP_H */

2
lib/libc/include/aarch64-linux-any/asm/kvm.h vendored
View file

@ -31,7 +31,7 @@
#define KVM_SPSR_FIQ 4
#define KVM_NR_SPSR 5
#ifndef __ASSEMBLY__
#ifndef __ASSEMBLER__
#include <linux/psci.h>
#include <linux/types.h>
#include <asm/ptrace.h>

4
lib/libc/include/aarch64-linux-any/asm/ptrace.h vendored
View file

@ -80,7 +80,7 @@
#define PTRACE_PEEKMTETAGS 33
#define PTRACE_POKEMTETAGS 34
#ifndef __ASSEMBLY__
#ifndef __ASSEMBLER__
/*
* User structures for general purpose, floating point and debug registers.
@ -332,6 +332,6 @@ struct user_gcs {
__u64 gcspr_el0;
};
#endif /* __ASSEMBLY__ */
#endif /* __ASSEMBLER__ */
#endif /* __ASM_PTRACE_H */

4
lib/libc/include/aarch64-linux-any/asm/sigcontext.h vendored
View file

@ -17,7 +17,7 @@
#ifndef __ASM_SIGCONTEXT_H
#define __ASM_SIGCONTEXT_H
#ifndef __ASSEMBLY__
#ifndef __ASSEMBLER__
#include <linux/types.h>
@ -192,7 +192,7 @@ struct gcs_context {
__u64 reserved;
};
#endif /* !__ASSEMBLY__ */
#endif /* !__ASSEMBLER__ */
#include <asm/sve_context.h>

1
lib/libc/include/aarch64-linux-any/asm/unistd_64.h vendored
View file

@ -326,6 +326,7 @@
#define __NR_open_tree_attr 467
#define __NR_file_getattr 468
#define __NR_file_setattr 469
#define __NR_listns 470
#endif /* _ASM_UNISTD_64_H */

1
lib/libc/include/any-linux-any/asm-generic/posix_types.h vendored
View file

@ -86,6 +86,7 @@ typedef struct {
*/
typedef __kernel_long_t __kernel_off_t;
typedef long long __kernel_loff_t;
typedef unsigned long long __kernel_uoff_t;
typedef __kernel_long_t __kernel_old_time_t;
typedef __kernel_long_t __kernel_time_t;
typedef long long __kernel_time64_t;

4
lib/libc/include/any-linux-any/asm-generic/unistd.h vendored
View file

@ -857,9 +857,11 @@ __SYSCALL(__NR_open_tree_attr, sys_open_tree_attr)
__SYSCALL(__NR_file_getattr, sys_file_getattr)
#define __NR_file_setattr 469
__SYSCALL(__NR_file_setattr, sys_file_setattr)
#define __NR_listns 470
__SYSCALL(__NR_listns, sys_listns)
#undef __NR_syscalls
#define __NR_syscalls 470
#define __NR_syscalls 471
/*
* 32 bit systems traditionally used different

102
lib/libc/include/any-linux-any/drm/amdgpu_drm.h vendored
View file

@ -57,6 +57,7 @@ extern "C" {
#define DRM_AMDGPU_USERQ 0x16
#define DRM_AMDGPU_USERQ_SIGNAL 0x17
#define DRM_AMDGPU_USERQ_WAIT 0x18
#define DRM_AMDGPU_GEM_LIST_HANDLES 0x19
#define DRM_IOCTL_AMDGPU_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_GEM_CREATE, union drm_amdgpu_gem_create)
#define DRM_IOCTL_AMDGPU_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_GEM_MMAP, union drm_amdgpu_gem_mmap)
@ -77,6 +78,7 @@ extern "C" {
#define DRM_IOCTL_AMDGPU_USERQ DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_USERQ, union drm_amdgpu_userq)
#define DRM_IOCTL_AMDGPU_USERQ_SIGNAL DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_USERQ_SIGNAL, struct drm_amdgpu_userq_signal)
#define DRM_IOCTL_AMDGPU_USERQ_WAIT DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_USERQ_WAIT, struct drm_amdgpu_userq_wait)
#define DRM_IOCTL_AMDGPU_GEM_LIST_HANDLES DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDGPU_GEM_LIST_HANDLES, struct drm_amdgpu_gem_list_handles)
/**
* DOC: memory domains
@ -103,6 +105,8 @@ extern "C" {
*
* %AMDGPU_GEM_DOMAIN_DOORBELL Doorbell. It is an MMIO region for
* signalling user mode queues.
*
* %AMDGPU_GEM_DOMAIN_MMIO_REMAP MMIO remap page (special mapping for HDP flushing).
*/
#define AMDGPU_GEM_DOMAIN_CPU 0x1
#define AMDGPU_GEM_DOMAIN_GTT 0x2
@ -111,13 +115,15 @@ extern "C" {
#define AMDGPU_GEM_DOMAIN_GWS 0x10
#define AMDGPU_GEM_DOMAIN_OA 0x20
#define AMDGPU_GEM_DOMAIN_DOORBELL 0x40
#define AMDGPU_GEM_DOMAIN_MMIO_REMAP 0x80
#define AMDGPU_GEM_DOMAIN_MASK (AMDGPU_GEM_DOMAIN_CPU | \
AMDGPU_GEM_DOMAIN_GTT | \
AMDGPU_GEM_DOMAIN_VRAM | \
AMDGPU_GEM_DOMAIN_GDS | \
AMDGPU_GEM_DOMAIN_GWS | \
AMDGPU_GEM_DOMAIN_OA | \
AMDGPU_GEM_DOMAIN_DOORBELL)
AMDGPU_GEM_DOMAIN_OA | \
AMDGPU_GEM_DOMAIN_DOORBELL | \
AMDGPU_GEM_DOMAIN_MMIO_REMAP)
/* Flag that CPU access will be required for the case of VRAM domain */
#define AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED (1 << 0)
@ -800,6 +806,21 @@ union drm_amdgpu_wait_fences {
#define AMDGPU_GEM_OP_GET_GEM_CREATE_INFO 0
#define AMDGPU_GEM_OP_SET_PLACEMENT 1
#define AMDGPU_GEM_OP_GET_MAPPING_INFO 2
struct drm_amdgpu_gem_vm_entry {
/* Start of mapping (in bytes) */
__u64 addr;
/* Size of mapping (in bytes) */
__u64 size;
/* Mapping offset */
__u64 offset;
/* flags needed to recreate mapping */
__u64 flags;
};
/* Sets or returns a value associated with a buffer. */
struct drm_amdgpu_gem_op {
@ -807,8 +828,44 @@ struct drm_amdgpu_gem_op {
__u32 handle;
/** AMDGPU_GEM_OP_* */
__u32 op;
/** Input or return value */
/** Input or return value. For MAPPING_INFO op: pointer to array of struct drm_amdgpu_gem_vm_entry */
__u64 value;
/** For MAPPING_INFO op: number of mappings (in/out) */
__u32 num_entries;
__u32 padding;
};
#define AMDGPU_GEM_LIST_HANDLES_FLAG_IS_IMPORT (1 << 0)
struct drm_amdgpu_gem_list_handles {
/* User pointer to array of drm_amdgpu_gem_bo_info_entry */
__u64 entries;
/* Size of entries buffer / Number of handles in process (if larger than size of buffer, must retry) */
__u32 num_entries;
__u32 padding;
};
struct drm_amdgpu_gem_list_handles_entry {
/* gem handle of buffer object */
__u32 gem_handle;
/* Currently just one flag: IS_IMPORT */
__u32 flags;
/* Size of bo */
__u64 size;
/* Preferred domains for GEM_CREATE */
__u64 preferred_domains;
/* GEM_CREATE flags for re-creation of buffer */
__u64 alloc_flags;
/* physical start_addr alignment in bytes for some HW requirements */
__u64 alignment;
};
#define AMDGPU_VA_OP_MAP 1
@ -1031,10 +1088,11 @@ struct drm_amdgpu_cs_chunk_cp_gfx_shadow {
* Query h/w info: Flag that this is integrated (a.h.a. fusion) GPU
*
*/
#define AMDGPU_IDS_FLAGS_FUSION 0x1
#define AMDGPU_IDS_FLAGS_PREEMPTION 0x2
#define AMDGPU_IDS_FLAGS_TMZ 0x4
#define AMDGPU_IDS_FLAGS_CONFORMANT_TRUNC_COORD 0x8
#define AMDGPU_IDS_FLAGS_FUSION 0x01
#define AMDGPU_IDS_FLAGS_PREEMPTION 0x02
#define AMDGPU_IDS_FLAGS_TMZ 0x04
#define AMDGPU_IDS_FLAGS_CONFORMANT_TRUNC_COORD 0x08
#define AMDGPU_IDS_FLAGS_GANG_SUBMIT 0x10
/*
* Query h/w info: Flag identifying VF/PF/PT mode
@ -1497,27 +1555,6 @@ struct drm_amdgpu_info_hw_ip {
__u32 userq_num_slots;
};
/* GFX metadata BO sizes and alignment info (in bytes) */
struct drm_amdgpu_info_uq_fw_areas_gfx {
/* shadow area size */
__u32 shadow_size;
/* shadow area base virtual mem alignment */
__u32 shadow_alignment;
/* context save area size */
__u32 csa_size;
/* context save area base virtual mem alignment */
__u32 csa_alignment;
};
/* IP specific fw related information used in the
* subquery AMDGPU_INFO_UQ_FW_AREAS
*/
struct drm_amdgpu_info_uq_fw_areas {
union {
struct drm_amdgpu_info_uq_fw_areas_gfx gfx;
};
};
struct drm_amdgpu_info_num_handles {
/** Max handles as supported by firmware for UVD */
__u32 uvd_max_handles;
@ -1619,15 +1656,6 @@ struct drm_amdgpu_info_uq_metadata {
#define AMDGPU_FAMILY_GC_11_5_0 150 /* GC 11.5.0 */
#define AMDGPU_FAMILY_GC_12_0_0 152 /* GC 12.0.0 */
/* FIXME wrong namespace! */
struct drm_color_ctm_3x4 {
/*
* Conversion matrix with 3x4 dimensions in S31.32 sign-magnitude
* (not two's complement!) format.
*/
__u64 matrix[12];
};
#if defined(__cplusplus)
}
#endif

197
lib/libc/include/any-linux-any/drm/amdxdna_accel.h vendored
View file

@ -34,6 +34,7 @@ enum amdxdna_drm_ioctl_id {
DRM_AMDXDNA_EXEC_CMD,
DRM_AMDXDNA_GET_INFO,
DRM_AMDXDNA_SET_STATE,
DRM_AMDXDNA_GET_ARRAY = 10,
};
/**
@ -153,6 +154,31 @@ enum amdxdna_bo_type {
AMDXDNA_BO_CMD,
};
/**
* struct amdxdna_drm_va_entry
* @vaddr: Virtual address.
* @len: Size of entry.
*/
struct amdxdna_drm_va_entry {
__u64 vaddr;
__u64 len;
};
/**
* struct amdxdna_drm_va_tbl
* @dmabuf_fd: The fd of dmabuf.
* @num_entries: Number of va entries.
* @va_entries: Array of va entries.
*
* The input can be either a dmabuf fd or a virtual address entry table.
* When dmabuf_fd is used, num_entries must be zero.
*/
struct amdxdna_drm_va_tbl {
__s32 dmabuf_fd;
__u32 num_entries;
struct amdxdna_drm_va_entry va_entries[];
};
/**
* struct amdxdna_drm_create_bo - Create a buffer object.
* @flags: Buffer flags. MBZ.
@ -416,6 +442,52 @@ enum amdxdna_drm_get_param {
DRM_AMDXDNA_QUERY_HW_CONTEXTS,
DRM_AMDXDNA_QUERY_FIRMWARE_VERSION = 8,
DRM_AMDXDNA_GET_POWER_MODE,
DRM_AMDXDNA_QUERY_TELEMETRY,
DRM_AMDXDNA_GET_FORCE_PREEMPT_STATE,
DRM_AMDXDNA_QUERY_RESOURCE_INFO,
DRM_AMDXDNA_GET_FRAME_BOUNDARY_PREEMPT_STATE,
};
/**
* struct amdxdna_drm_get_resource_info - Get resource information
*/
struct amdxdna_drm_get_resource_info {
/** @npu_clk_max: max H-Clocks */
__u64 npu_clk_max;
/** @npu_tops_max: max TOPs */
__u64 npu_tops_max;
/** @npu_task_max: max number of tasks */
__u64 npu_task_max;
/** @npu_tops_curr: current TOPs */
__u64 npu_tops_curr;
/** @npu_task_curr: current number of tasks */
__u64 npu_task_curr;
};
/**
* struct amdxdna_drm_attribute_state - State of an attribute
*/
struct amdxdna_drm_attribute_state {
/** @state: enabled or disabled */
__u8 state;
/** @pad: MBZ */
__u8 pad[7];
};
/**
* struct amdxdna_drm_query_telemetry_header - Telemetry data header
*/
struct amdxdna_drm_query_telemetry_header {
/** @major: Firmware telemetry interface major version number */
__u32 major;
/** @minor: Firmware telemetry interface minor version number */
__u32 minor;
/** @type: Telemetry query type */
__u32 type;
/** @map_num_elements: Total number of elements in the map table */
__u32 map_num_elements;
/** @map: Element map */
__u32 map[];
};
/**
@ -430,10 +502,131 @@ struct amdxdna_drm_get_info {
__u64 buffer; /* in/out */
};
#define AMDXDNA_HWCTX_STATE_IDLE 0
#define AMDXDNA_HWCTX_STATE_ACTIVE 1
/**
* struct amdxdna_drm_hwctx_entry - The hardware context array entry
*/
struct amdxdna_drm_hwctx_entry {
/** @context_id: Context ID. */
__u32 context_id;
/** @start_col: Start AIE array column assigned to context. */
__u32 start_col;
/** @num_col: Number of AIE array columns assigned to context. */
__u32 num_col;
/** @hwctx_id: The real hardware context id. */
__u32 hwctx_id;
/** @pid: ID of process which created this context. */
__s64 pid;
/** @command_submissions: Number of commands submitted. */
__u64 command_submissions;
/** @command_completions: Number of commands completed. */
__u64 command_completions;
/** @migrations: Number of times been migrated. */
__u64 migrations;
/** @preemptions: Number of times been preempted. */
__u64 preemptions;
/** @errors: Number of errors happened. */
__u64 errors;
/** @priority: Context priority. */
__u64 priority;
/** @heap_usage: Usage of device heap buffer. */
__u64 heap_usage;
/** @suspensions: Number of times been suspended. */
__u64 suspensions;
/**
* @state: Context state.
* %AMDXDNA_HWCTX_STATE_IDLE
* %AMDXDNA_HWCTX_STATE_ACTIVE
*/
__u32 state;
/** @pasid: PASID been bound. */
__u32 pasid;
/** @gops: Giga operations per second. */
__u32 gops;
/** @fps: Frames per second. */
__u32 fps;
/** @dma_bandwidth: DMA bandwidth. */
__u32 dma_bandwidth;
/** @latency: Frame response latency. */
__u32 latency;
/** @frame_exec_time: Frame execution time. */
__u32 frame_exec_time;
/** @txn_op_idx: Index of last control code executed. */
__u32 txn_op_idx;
/** @ctx_pc: Program counter. */
__u32 ctx_pc;
/** @fatal_error_type: Fatal error type if context crashes. */
__u32 fatal_error_type;
/** @fatal_error_exception_type: Firmware exception type. */
__u32 fatal_error_exception_type;
/** @fatal_error_exception_pc: Firmware exception program counter. */
__u32 fatal_error_exception_pc;
/** @fatal_error_app_module: Exception module name. */
__u32 fatal_error_app_module;
/** @pad: Structure pad. */
__u32 pad;
};
/**
* struct amdxdna_async_error - XDNA async error structure
*/
struct amdxdna_async_error {
/** @err_code: Error code. */
__u64 err_code;
/** @ts_us: Timestamp. */
__u64 ts_us;
/** @ex_err_code: Extra error code */
__u64 ex_err_code;
};
#define DRM_AMDXDNA_HW_CONTEXT_ALL 0
#define DRM_AMDXDNA_HW_LAST_ASYNC_ERR 2
/**
* struct amdxdna_drm_get_array - Get information array.
*/
struct amdxdna_drm_get_array {
/**
* @param:
*
* Supported params:
*
* %DRM_AMDXDNA_HW_CONTEXT_ALL:
* Returns all created hardware contexts.
*/
__u32 param;
/**
* @element_size:
*
* Specifies maximum element size and returns the actual element size.
*/
__u32 element_size;
/**
* @num_element:
*
* Specifies maximum number of elements and returns the actual number
* of elements.
*/
__u32 num_element; /* in/out */
/** @pad: MBZ */
__u32 pad;
/**
* @buffer:
*
* Specifies the match conditions and returns the matched information
* array.
*/
__u64 buffer;
};
enum amdxdna_drm_set_param {
DRM_AMDXDNA_SET_POWER_MODE,
DRM_AMDXDNA_WRITE_AIE_MEM,
DRM_AMDXDNA_WRITE_AIE_REG,
DRM_AMDXDNA_SET_FORCE_PREEMPT,
DRM_AMDXDNA_SET_FRAME_BOUNDARY_PREEMPT,
};
/**
@ -494,6 +687,10 @@ struct amdxdna_drm_set_power_mode {
DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDXDNA_SET_STATE, \
struct amdxdna_drm_set_state)
#define DRM_IOCTL_AMDXDNA_GET_ARRAY \
DRM_IOWR(DRM_COMMAND_BASE + DRM_AMDXDNA_GET_ARRAY, \
struct amdxdna_drm_get_array)
#if defined(__cplusplus)
} /* extern c end */
#endif

78
lib/libc/include/any-linux-any/drm/drm.h vendored
View file

@ -591,34 +591,65 @@ struct drm_set_version {
int drm_dd_minor;
};
/* DRM_IOCTL_GEM_CLOSE ioctl argument type */
/**
* struct drm_gem_close - Argument for &DRM_IOCTL_GEM_CLOSE ioctl.
* @handle: Handle of the object to be closed.
* @pad: Padding.
*
* Releases the handle to an mm object.
*/
struct drm_gem_close {
/** Handle of the object to be closed. */
__u32 handle;
__u32 pad;
};
/* DRM_IOCTL_GEM_FLINK ioctl argument type */
/**
* struct drm_gem_flink - Argument for &DRM_IOCTL_GEM_FLINK ioctl.
* @handle: Handle for the object being named.
* @name: Returned global name.
*
* Create a global name for an object, returning the name.
*
* Note that the name does not hold a reference; when the object
* is freed, the name goes away.
*/
struct drm_gem_flink {
/** Handle for the object being named */
__u32 handle;
/** Returned global name */
__u32 name;
};
/* DRM_IOCTL_GEM_OPEN ioctl argument type */
/**
* struct drm_gem_open - Argument for &DRM_IOCTL_GEM_OPEN ioctl.
* @name: Name of object being opened.
* @handle: Returned handle for the object.
* @size: Returned size of the object
*
* Open an object using the global name, returning a handle and the size.
*
* This handle (of course) holds a reference to the object, so the object
* will not go away until the handle is deleted.
*/
struct drm_gem_open {
/** Name of object being opened */
__u32 name;
/** Returned handle for the object */
__u32 handle;
/** Returned size of the object */
__u64 size;
};
/**
* struct drm_gem_change_handle - Argument for &DRM_IOCTL_GEM_CHANGE_HANDLE ioctl.
* @handle: The handle of a gem object.
* @new_handle: An available gem handle.
*
* This ioctl changes the handle of a GEM object to the specified one.
* The new handle must be unused. On success the old handle is closed
* and all further IOCTL should refer to the new handle only.
* Calls to DRM_IOCTL_PRIME_FD_TO_HANDLE will return the new handle.
*/
struct drm_gem_change_handle {
__u32 handle;
__u32 new_handle;
};
/**
* DRM_CAP_DUMB_BUFFER
*
@ -869,6 +900,21 @@ struct drm_get_cap {
*/
#define DRM_CLIENT_CAP_CURSOR_PLANE_HOTSPOT 6
/**
* DRM_CLIENT_CAP_PLANE_COLOR_PIPELINE
*
* If set to 1 the DRM core will allow setting the COLOR_PIPELINE
* property on a &drm_plane, as well as drm_colorop properties.
*
* Setting of these plane properties will be rejected when this client
* cap is set:
* - COLOR_ENCODING
* - COLOR_RANGE
*
* The client must enable &DRM_CLIENT_CAP_ATOMIC first.
*/
#define DRM_CLIENT_CAP_PLANE_COLOR_PIPELINE 7
/* DRM_IOCTL_SET_CLIENT_CAP ioctl argument type */
struct drm_set_client_cap {
__u64 capability;
@ -1303,6 +1349,14 @@ extern "C" {
*/
#define DRM_IOCTL_SET_CLIENT_NAME DRM_IOWR(0xD1, struct drm_set_client_name)
/**
* DRM_IOCTL_GEM_CHANGE_HANDLE - Move an object to a different handle
*
* Some applications (notably CRIU) need objects to have specific gem handles.
* This ioctl changes the object at one gem handle to use a new gem handle.
*/
#define DRM_IOCTL_GEM_CHANGE_HANDLE DRM_IOWR(0xD2, struct drm_gem_change_handle)
/*
* Device specific ioctls should only be in their respective headers
* The device specific ioctl range is from 0x40 to 0x9f.

23
lib/libc/include/any-linux-any/drm/drm_fourcc.h vendored
View file

@ -979,14 +979,20 @@ extern "C" {
* 2 = Gob Height 8, Turing+ Page Kind mapping
* 3 = Reserved for future use.
*
* 22:22 s Sector layout. On Tegra GPUs prior to Xavier, there is a further
* bit remapping step that occurs at an even lower level than the
* page kind and block linear swizzles. This causes the layout of
* surfaces mapped in those SOC's GPUs to be incompatible with the
* equivalent mapping on other GPUs in the same system.
* 22:22 s Sector layout. There is a further bit remapping step that occurs
* 26:27 at an even lower level than the page kind and block linear
* swizzles. This causes the bit arrangement of surfaces in memory
* to differ subtly, and prevents direct sharing of surfaces between
* GPUs with different layouts.
*
* 0 = Tegra K1 - Tegra Parker/TX2 Layout.
* 1 = Desktop GPU and Tegra Xavier+ Layout
* 0 = Tegra K1 - Tegra Parker/TX2 Layout
* 1 = Pre-GB20x, GB20x 32+ bpp, GB10, Tegra Xavier-Orin Layout
* 2 = GB20x(Blackwell 2)+ 8 bpp surface layout
* 3 = GB20x(Blackwell 2)+ 16 bpp surface layout
* 4 = Reserved for future use.
* 5 = Reserved for future use.
* 6 = Reserved for future use.
* 7 = Reserved for future use.
*
* 25:23 c Lossless Framebuffer Compression type.
*
@ -1001,7 +1007,7 @@ extern "C" {
* 6 = Reserved for future use
* 7 = Reserved for future use
*
* 55:25 - Reserved for future use. Must be zero.
* 55:28 - Reserved for future use. Must be zero.
*/
#define DRM_FORMAT_MOD_NVIDIA_BLOCK_LINEAR_2D(c, s, g, k, h) \
fourcc_mod_code(NVIDIA, (0x10 | \
@ -1009,6 +1015,7 @@ extern "C" {
(((k) & 0xff) << 12) | \
(((g) & 0x3) << 20) | \
(((s) & 0x1) << 22) | \
(((s) & 0x6) << 25) | \
(((c) & 0x7) << 23)))
/* To grandfather in prior block linear format modifiers to the above layout,

192
lib/libc/include/any-linux-any/drm/drm_mode.h vendored
View file

@ -629,6 +629,7 @@ struct drm_mode_connector_set_property {
#define DRM_MODE_OBJECT_FB 0xfbfbfbfb
#define DRM_MODE_OBJECT_BLOB 0xbbbbbbbb
#define DRM_MODE_OBJECT_PLANE 0xeeeeeeee
#define DRM_MODE_OBJECT_COLOROP 0xfafafafa
#define DRM_MODE_OBJECT_ANY 0
struct drm_mode_obj_get_properties {
@ -846,6 +847,20 @@ struct drm_color_ctm {
__u64 matrix[9];
};
struct drm_color_ctm_3x4 {
/*
* Conversion matrix with 3x4 dimensions in S31.32 sign-magnitude
* (not two's complement!) format.
*
* out matrix in
* |R| |0 1 2 3 | | R |
* |G| = |4 5 6 7 | x | G |
* |B| |8 9 10 11| | B |
* |1.0|
*/
__u64 matrix[12];
};
struct drm_color_lut {
/*
* Values are mapped linearly to 0.0 - 1.0 range, with 0x0 == 0.0 and
@ -857,6 +872,125 @@ struct drm_color_lut {
__u16 reserved;
};
/*
* struct drm_color_lut32
*
* 32-bit per channel color LUT entry, similar to drm_color_lut.
*/
struct drm_color_lut32 {
__u32 red;
__u32 green;
__u32 blue;
__u32 reserved;
};
/**
* enum drm_colorop_type - Type of color operation
*
* drm_colorops can be of many different types. Each type behaves differently
* and defines a different set of properties. This enum defines all types and
* gives a high-level description.
*/
enum drm_colorop_type {
/**
* @DRM_COLOROP_1D_CURVE:
*
* enum string "1D Curve"
*
* A 1D curve that is being applied to all color channels. The
* curve is specified via the CURVE_1D_TYPE colorop property.
*/
DRM_COLOROP_1D_CURVE,
/**
* @DRM_COLOROP_1D_LUT:
*
* enum string "1D LUT"
*
* A simple 1D LUT of uniformly spaced &drm_color_lut32 entries,
* packed into a blob via the DATA property. The driver's
* expected LUT size is advertised via the SIZE property.
*
* The DATA blob is an array of struct drm_color_lut32 with size
* of "size".
*/
DRM_COLOROP_1D_LUT,
/**
* @DRM_COLOROP_CTM_3X4:
*
* enum string "3x4 Matrix"
*
* A 3x4 matrix. Its values are specified via the
* &drm_color_ctm_3x4 struct provided via the DATA property.
*
* The DATA blob is a float[12]:
* out matrix in
* | R | | 0 1 2 3 | | R |
* | G | = | 4 5 6 7 | x | G |
* | B | | 8 9 10 12 | | B |
*/
DRM_COLOROP_CTM_3X4,
/**
* @DRM_COLOROP_MULTIPLIER:
*
* enum string "Multiplier"
*
* A simple multiplier, applied to all color values. The
* multiplier is specified as a S31.32 via the MULTIPLIER
* property.
*/
DRM_COLOROP_MULTIPLIER,
/**
* @DRM_COLOROP_3D_LUT:
*
* enum string "3D LUT"
*
* A 3D LUT of &drm_color_lut32 entries,
* packed into a blob via the DATA property. The driver's expected
* LUT size is advertised via the SIZE property, i.e., a 3D LUT with
* 17x17x17 entries will have SIZE set to 17.
*
* The DATA blob is a 3D array of struct drm_color_lut32 with dimension
* length of "size".
* The LUT elements are traversed like so:
*
* for B in range 0..n
* for G in range 0..n
* for R in range 0..n
* index = R + n * (G + n * B)
* color = lut3d[index]
*/
DRM_COLOROP_3D_LUT,
};
/**
* enum drm_colorop_lut3d_interpolation_type - type of 3DLUT interpolation
*/
enum drm_colorop_lut3d_interpolation_type {
/**
* @DRM_COLOROP_LUT3D_INTERPOLATION_TETRAHEDRAL:
*
* Tetrahedral 3DLUT interpolation
*/
DRM_COLOROP_LUT3D_INTERPOLATION_TETRAHEDRAL,
};
/**
* enum drm_colorop_lut1d_interpolation_type - type of interpolation for 1D LUTs
*/
enum drm_colorop_lut1d_interpolation_type {
/**
* @DRM_COLOROP_LUT1D_INTERPOLATION_LINEAR:
*
* Linear interpolation. Values between points of the LUT will be
* linearly interpolated.
*/
DRM_COLOROP_LUT1D_INTERPOLATION_LINEAR,
};
/**
* struct drm_plane_size_hint - Plane size hints
* @width: The width of the plane in pixel
@ -962,6 +1096,14 @@ struct hdr_output_metadata {
* Request that the kernel sends back a vblank event (see
* struct drm_event_vblank) with the &DRM_EVENT_FLIP_COMPLETE type when the
* page-flip is done.
*
* When used with atomic uAPI, one event will be delivered per CRTC included in
* the atomic commit. A CRTC is included in an atomic commit if one of its
* properties is set, or if a property is set on a connector or plane linked
* via the CRTC_ID property to the CRTC. At least one CRTC must be included,
* and all pulled in CRTCs must be either previously or newly powered on (in
* other words, a powered off CRTC which stays off cannot be included in the
* atomic commit).
*/
#define DRM_MODE_PAGE_FLIP_EVENT 0x01
/**
@ -1058,7 +1200,7 @@ struct drm_mode_crtc_page_flip_target {
* struct drm_mode_create_dumb - Create a KMS dumb buffer for scanout.
* @height: buffer height in pixels
* @width: buffer width in pixels
* @bpp: bits per pixel
* @bpp: color mode
* @flags: must be zero
* @handle: buffer object handle
* @pitch: number of bytes between two consecutive lines
@ -1066,6 +1208,54 @@ struct drm_mode_crtc_page_flip_target {
*
* User-space fills @height, @width, @bpp and @flags. If the IOCTL succeeds,
* the kernel fills @handle, @pitch and @size.
*
* The value of @bpp is a color-mode number describing a specific format
* or a variant thereof. The value often corresponds to the number of bits
* per pixel for most modes, although there are exceptions. Each color mode
* maps to a DRM format plus a number of modes with similar pixel layout.
* Framebuffer layout is always linear.
*
* Support for all modes and formats is optional. Even if dumb-buffer
* creation with a certain color mode succeeds, it is not guaranteed that
* the DRM driver supports any of the related formats. Most drivers support
* a color mode of 32 with a format of DRM_FORMAT_XRGB8888 on their primary
* plane.
*
* +------------+------------------------+------------------------+
* | Color mode | Framebuffer format | Compatible formats |
* +============+========================+========================+
* | 32 | * DRM_FORMAT_XRGB8888 | * DRM_FORMAT_BGRX8888 |
* | | | * DRM_FORMAT_RGBX8888 |
* | | | * DRM_FORMAT_XBGR8888 |
* +------------+------------------------+------------------------+
* | 24 | * DRM_FORMAT_RGB888 | * DRM_FORMAT_BGR888 |
* +------------+------------------------+------------------------+
* | 16 | * DRM_FORMAT_RGB565 | * DRM_FORMAT_BGR565 |
* +------------+------------------------+------------------------+
* | 15 | * DRM_FORMAT_XRGB1555 | * DRM_FORMAT_BGRX1555 |
* | | | * DRM_FORMAT_RGBX1555 |
* | | | * DRM_FORMAT_XBGR1555 |
* +------------+------------------------+------------------------+
* | 8 | * DRM_FORMAT_C8 | * DRM_FORMAT_D8 |
* | | | * DRM_FORMAT_R8 |
* +------------+------------------------+------------------------+
* | 4 | * DRM_FORMAT_C4 | * DRM_FORMAT_D4 |
* | | | * DRM_FORMAT_R4 |
* +------------+------------------------+------------------------+
* | 2 | * DRM_FORMAT_C2 | * DRM_FORMAT_D2 |
* | | | * DRM_FORMAT_R2 |
* +------------+------------------------+------------------------+
* | 1 | * DRM_FORMAT_C1 | * DRM_FORMAT_D1 |
* | | | * DRM_FORMAT_R1 |
* +------------+------------------------+------------------------+
*
* Color modes of 10, 12, 15, 30 and 64 are only supported for use by
* legacy user space. Please don't use them in new code. Other modes
* are not support.
*
* Do not attempt to allocate anything but linear framebuffer memory
* with single-plane RGB data. Allocation of other framebuffer
* layouts requires dedicated ioctls in the respective DRM driver.
*/
struct drm_mode_create_dumb {
__u32 height;

261
lib/libc/include/any-linux-any/drm/ethosu_accel.h vendored Normal file
View file

@ -0,0 +1,261 @@
/* SPDX-License-Identifier: MIT */
/* Copyright (C) 2025 Arm, Ltd. */
#ifndef _ETHOSU_DRM_H_
#define _ETHOSU_DRM_H_
#include "drm.h"
#if defined(__cplusplus)
extern "C" {
#endif
/**
* DOC: IOCTL IDs
*
* enum drm_ethosu_ioctl_id - IOCTL IDs
*
* Place new ioctls at the end, don't re-order, don't replace or remove entries.
*
* These IDs are not meant to be used directly. Use the DRM_IOCTL_ETHOSU_xxx
* definitions instead.
*/
enum drm_ethosu_ioctl_id {
/** @DRM_ETHOSU_DEV_QUERY: Query device information. */
DRM_ETHOSU_DEV_QUERY = 0,
/** @DRM_ETHOSU_BO_CREATE: Create a buffer object. */
DRM_ETHOSU_BO_CREATE,
/** @DRM_ETHOSU_BO_WAIT: Wait on a buffer object's fence. */
DRM_ETHOSU_BO_WAIT,
/**
* @DRM_ETHOSU_BO_MMAP_OFFSET: Get the file offset to pass to
* mmap to map a GEM object.
*/
DRM_ETHOSU_BO_MMAP_OFFSET,
/**
* @DRM_ETHOSU_CMDSTREAM_BO_CREATE: Create a command stream buffer
* object.
*/
DRM_ETHOSU_CMDSTREAM_BO_CREATE,
/** @DRM_ETHOSU_SUBMIT: Submit a job and BOs to run. */
DRM_ETHOSU_SUBMIT,
};
/**
* DOC: IOCTL arguments
*/
/**
* enum drm_ethosu_dev_query_type - Query type
*
* Place new types at the end, don't re-order, don't remove or replace.
*/
enum drm_ethosu_dev_query_type {
/** @DRM_ETHOSU_DEV_QUERY_NPU_INFO: Query NPU information. */
DRM_ETHOSU_DEV_QUERY_NPU_INFO = 0,
};
/**
* struct drm_ethosu_gpu_info - NPU information
*
* Structure grouping all queryable information relating to the NPU.
*/
struct drm_ethosu_npu_info {
/** @id : NPU ID. */
__u32 id;
#define DRM_ETHOSU_ARCH_MAJOR(x) ((x) >> 28)
#define DRM_ETHOSU_ARCH_MINOR(x) (((x) >> 20) & 0xff)
#define DRM_ETHOSU_ARCH_PATCH(x) (((x) >> 16) & 0xf)
#define DRM_ETHOSU_PRODUCT_MAJOR(x) (((x) >> 12) & 0xf)
#define DRM_ETHOSU_VERSION_MAJOR(x) (((x) >> 8) & 0xf)
#define DRM_ETHOSU_VERSION_MINOR(x) (((x) >> 4) & 0xff)
#define DRM_ETHOSU_VERSION_STATUS(x) ((x) & 0xf)
/** @gpu_rev: GPU revision. */
__u32 config;
__u32 sram_size;
};
/**
* struct drm_ethosu_dev_query - Arguments passed to DRM_ETHOSU_IOCTL_DEV_QUERY
*/
struct drm_ethosu_dev_query {
/** @type: the query type (see drm_ethosu_dev_query_type). */
__u32 type;
/**
* @size: size of the type being queried.
*
* If pointer is NULL, size is updated by the driver to provide the
* output structure size. If pointer is not NULL, the driver will
* only copy min(size, actual_structure_size) bytes to the pointer,
* and update the size accordingly. This allows us to extend query
* types without breaking userspace.
*/
__u32 size;
/**
* @pointer: user pointer to a query type struct.
*
* Pointer can be NULL, in which case, nothing is copied, but the
* actual structure size is returned. If not NULL, it must point to
* a location that's large enough to hold size bytes.
*/
__u64 pointer;
};
/**
* enum drm_ethosu_bo_flags - Buffer object flags, passed at creation time.
*/
enum drm_ethosu_bo_flags {
/**
* @DRM_ETHOSU_BO_NO_MMAP: The buffer object will never be CPU-mapped
* in userspace.
*/
DRM_ETHOSU_BO_NO_MMAP = (1 << 0),
};
/**
* struct drm_ethosu_bo_create - Arguments passed to DRM_IOCTL_ETHOSU_BO_CREATE.
*/
struct drm_ethosu_bo_create {
/**
* @size: Requested size for the object
*
* The (page-aligned) allocated size for the object will be returned.
*/
__u64 size;
/**
* @flags: Flags. Must be a combination of drm_ethosu_bo_flags flags.
*/
__u32 flags;
/**
* @handle: Returned handle for the object.
*
* Object handles are nonzero.
*/
__u32 handle;
};
/**
* struct drm_ethosu_bo_mmap_offset - Arguments passed to DRM_IOCTL_ETHOSU_BO_MMAP_OFFSET.
*/
struct drm_ethosu_bo_mmap_offset {
/** @handle: Handle of the object we want an mmap offset for. */
__u32 handle;
/** @pad: MBZ. */
__u32 pad;
/** @offset: The fake offset to use for subsequent mmap calls. */
__u64 offset;
};
/**
* struct drm_ethosu_wait_bo - ioctl argument for waiting for
* completion of the last DRM_ETHOSU_SUBMIT on a BO.
*
* This is useful for cases where multiple processes might be
* rendering to a BO and you want to wait for all rendering to be
* completed.
*/
struct drm_ethosu_bo_wait {
__u32 handle;
__u32 pad;
__s64 timeout_ns; /* absolute */
};
struct drm_ethosu_cmdstream_bo_create {
/* Size of the data argument. */
__u32 size;
/* Flags, currently must be 0. */
__u32 flags;
/* Pointer to the data. */
__u64 data;
/** Returned GEM handle for the BO. */
__u32 handle;
/* Pad, must be 0. */
__u32 pad;
};
/**
* struct drm_ethosu_job - A job to be run on the NPU
*
* The kernel will schedule the execution of this job taking into account its
* dependencies with other jobs. All tasks in the same job will be executed
* sequentially on the same core, to benefit from memory residency in SRAM.
*/
struct drm_ethosu_job {
/** Input: BO handle for cmdstream. */
__u32 cmd_bo;
/** Input: Amount of SRAM to use. */
__u32 sram_size;
#define ETHOSU_MAX_REGIONS 8
/** Input: Array of BO handles for each region. */
__u32 region_bo_handles[ETHOSU_MAX_REGIONS];
};
/**
* struct drm_ethosu_submit - ioctl argument for submitting commands to the NPU.
*
* The kernel will schedule the execution of these jobs in dependency order.
*/
struct drm_ethosu_submit {
/** Input: Pointer to an array of struct drm_ethosu_job. */
__u64 jobs;
/** Input: Number of jobs passed in. */
__u32 job_count;
/** Reserved, must be zero. */
__u32 pad;
};
/**
* DRM_IOCTL_ETHOSU() - Build a ethosu IOCTL number
* @__access: Access type. Must be R, W or RW.
* @__id: One of the DRM_ETHOSU_xxx id.
* @__type: Suffix of the type being passed to the IOCTL.
*
* Don't use this macro directly, use the DRM_IOCTL_ETHOSU_xxx
* values instead.
*
* Return: An IOCTL number to be passed to ioctl() from userspace.
*/
#define DRM_IOCTL_ETHOSU(__access, __id, __type) \
DRM_IO ## __access(DRM_COMMAND_BASE + DRM_ETHOSU_ ## __id, \
struct drm_ethosu_ ## __type)
enum {
DRM_IOCTL_ETHOSU_DEV_QUERY =
DRM_IOCTL_ETHOSU(WR, DEV_QUERY, dev_query),
DRM_IOCTL_ETHOSU_BO_CREATE =
DRM_IOCTL_ETHOSU(WR, BO_CREATE, bo_create),
DRM_IOCTL_ETHOSU_BO_WAIT =
DRM_IOCTL_ETHOSU(WR, BO_WAIT, bo_wait),
DRM_IOCTL_ETHOSU_BO_MMAP_OFFSET =
DRM_IOCTL_ETHOSU(WR, BO_MMAP_OFFSET, bo_mmap_offset),
DRM_IOCTL_ETHOSU_CMDSTREAM_BO_CREATE =
DRM_IOCTL_ETHOSU(WR, CMDSTREAM_BO_CREATE, cmdstream_bo_create),
DRM_IOCTL_ETHOSU_SUBMIT =
DRM_IOCTL_ETHOSU(WR, SUBMIT, submit),
};
#if defined(__cplusplus)
}
#endif
#endif /* _ETHOSU_DRM_H_ */

63
lib/libc/include/any-linux-any/drm/ivpu_accel.h vendored
View file

@ -25,6 +25,7 @@ extern "C" {
#define DRM_IVPU_CMDQ_CREATE 0x0b
#define DRM_IVPU_CMDQ_DESTROY 0x0c
#define DRM_IVPU_CMDQ_SUBMIT 0x0d
#define DRM_IVPU_BO_CREATE_FROM_USERPTR 0x0e
#define DRM_IOCTL_IVPU_GET_PARAM \
DRM_IOWR(DRM_COMMAND_BASE + DRM_IVPU_GET_PARAM, struct drm_ivpu_param)
@ -69,6 +70,10 @@ extern "C" {
#define DRM_IOCTL_IVPU_CMDQ_SUBMIT \
DRM_IOW(DRM_COMMAND_BASE + DRM_IVPU_CMDQ_SUBMIT, struct drm_ivpu_cmdq_submit)
#define DRM_IOCTL_IVPU_BO_CREATE_FROM_USERPTR \
DRM_IOWR(DRM_COMMAND_BASE + DRM_IVPU_BO_CREATE_FROM_USERPTR, \
struct drm_ivpu_bo_create_from_userptr)
/**
* DOC: contexts
*
@ -90,6 +95,7 @@ extern "C" {
#define DRM_IVPU_PARAM_TILE_CONFIG 11
#define DRM_IVPU_PARAM_SKU 12
#define DRM_IVPU_PARAM_CAPABILITIES 13
#define DRM_IVPU_PARAM_PREEMPT_BUFFER_SIZE 14
#define DRM_IVPU_PLATFORM_TYPE_SILICON 0
@ -126,6 +132,13 @@ extern "C" {
* command queue destroy and submit job on specific command queue.
*/
#define DRM_IVPU_CAP_MANAGE_CMDQ 3
/**
* DRM_IVPU_CAP_BO_CREATE_FROM_USERPTR
*
* Driver supports creating buffer objects from user space memory pointers.
* This allows creating GEM buffers from existing user memory regions.
*/
#define DRM_IVPU_CAP_BO_CREATE_FROM_USERPTR 4
/**
* struct drm_ivpu_param - Get/Set VPU parameters
@ -176,6 +189,9 @@ struct drm_ivpu_param {
*
* %DRM_IVPU_PARAM_CAPABILITIES:
* Supported capabilities (read-only)
*
* %DRM_IVPU_PARAM_PREEMPT_BUFFER_SIZE:
* Size of the preemption buffer (read-only)
*/
__u32 param;
@ -190,6 +206,7 @@ struct drm_ivpu_param {
#define DRM_IVPU_BO_HIGH_MEM DRM_IVPU_BO_SHAVE_MEM
#define DRM_IVPU_BO_MAPPABLE 0x00000002
#define DRM_IVPU_BO_DMA_MEM 0x00000004
#define DRM_IVPU_BO_READ_ONLY 0x00000008
#define DRM_IVPU_BO_CACHED 0x00000000
#define DRM_IVPU_BO_UNCACHED 0x00010000
@ -200,6 +217,7 @@ struct drm_ivpu_param {
(DRM_IVPU_BO_HIGH_MEM | \
DRM_IVPU_BO_MAPPABLE | \
DRM_IVPU_BO_DMA_MEM | \
DRM_IVPU_BO_READ_ONLY | \
DRM_IVPU_BO_CACHE_MASK)
/**
@ -251,6 +269,44 @@ struct drm_ivpu_bo_create {
__u64 vpu_addr;
};
/**
* struct drm_ivpu_bo_create_from_userptr - Create dma-buf from user pointer
*
* Create a GEM buffer object from a user pointer to a memory region.
*/
struct drm_ivpu_bo_create_from_userptr {
/** @user_ptr: User pointer to memory region (must be page aligned) */
__u64 user_ptr;
/** @size: Size of the memory region in bytes (must be page aligned) */
__u64 size;
/**
* @flags:
*
* Supported flags:
*
* %DRM_IVPU_BO_HIGH_MEM:
*
* Allocate VPU address from >4GB range.
*
* %DRM_IVPU_BO_DMA_MEM:
*
* Allocate from DMA memory range accessible by hardware DMA.
*
* %DRM_IVPU_BO_READ_ONLY:
*
* Allocate as a read-only buffer object.
*/
__u32 flags;
/** @handle: Returned GEM object handle */
__u32 handle;
/** @vpu_addr: Returned VPU virtual address */
__u64 vpu_addr;
};
/**
* struct drm_ivpu_bo_info - Query buffer object info
*/
@ -371,6 +427,13 @@ struct drm_ivpu_cmdq_submit {
* to be executed. The offset has to be 8-byte aligned.
*/
__u32 commands_offset;
/**
* @preempt_buffer_index:
*
* Index of the preemption buffer in the buffers_ptr array.
*/
__u32 preempt_buffer_index;
__u32 reserved;
};
/* drm_ivpu_bo_wait job status codes */

150
lib/libc/include/any-linux-any/drm/panfrost_drm.h vendored
View file

@ -22,6 +22,8 @@ extern "C" {
#define DRM_PANFROST_PERFCNT_DUMP 0x07
#define DRM_PANFROST_MADVISE 0x08
#define DRM_PANFROST_SET_LABEL_BO 0x09
#define DRM_PANFROST_JM_CTX_CREATE 0x0a
#define DRM_PANFROST_JM_CTX_DESTROY 0x0b
#define DRM_IOCTL_PANFROST_SUBMIT DRM_IOW(DRM_COMMAND_BASE + DRM_PANFROST_SUBMIT, struct drm_panfrost_submit)
#define DRM_IOCTL_PANFROST_WAIT_BO DRM_IOW(DRM_COMMAND_BASE + DRM_PANFROST_WAIT_BO, struct drm_panfrost_wait_bo)
@ -31,6 +33,8 @@ extern "C" {
#define DRM_IOCTL_PANFROST_GET_BO_OFFSET DRM_IOWR(DRM_COMMAND_BASE + DRM_PANFROST_GET_BO_OFFSET, struct drm_panfrost_get_bo_offset)
#define DRM_IOCTL_PANFROST_MADVISE DRM_IOWR(DRM_COMMAND_BASE + DRM_PANFROST_MADVISE, struct drm_panfrost_madvise)
#define DRM_IOCTL_PANFROST_SET_LABEL_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_PANFROST_SET_LABEL_BO, struct drm_panfrost_set_label_bo)
#define DRM_IOCTL_PANFROST_JM_CTX_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_PANFROST_JM_CTX_CREATE, struct drm_panfrost_jm_ctx_create)
#define DRM_IOCTL_PANFROST_JM_CTX_DESTROY DRM_IOWR(DRM_COMMAND_BASE + DRM_PANFROST_JM_CTX_DESTROY, struct drm_panfrost_jm_ctx_destroy)
/*
* Unstable ioctl(s): only exposed when the unsafe unstable_ioctls module
@ -50,27 +54,47 @@ extern "C" {
* This asks the kernel to have the GPU execute a render command list.
*/
struct drm_panfrost_submit {
/** Address to GPU mapping of job descriptor */
/**
* @jc: Address to GPU mapping of job descriptor
*/
__u64 jc;
/** An optional array of sync objects to wait on before starting this job. */
/**
* @in_syncs: An optional array of sync objects to wait on
* before starting this job.
*/
__u64 in_syncs;
/** Number of sync objects to wait on before starting this job. */
/**
* @in_sync_count: Number of sync objects to wait on before
* starting this job.
*/
__u32 in_sync_count;
/** An optional sync object to place the completion fence in. */
/**
* @out_sync: An optional sync object to place the completion fence in.
*/
__u32 out_sync;
/** Pointer to a u32 array of the BOs that are referenced by the job. */
/**
* @bo_handles: Pointer to a u32 array of the BOs that are
* referenced by the job.
*/
__u64 bo_handles;
/** Number of BO handles passed in (size is that times 4). */
/**
* @bo_handle_count: Number of BO handles passed in (size is
* that times 4).
*/
__u32 bo_handle_count;
/** A combination of PANFROST_JD_REQ_* */
/**
* @requirements: A combination of PANFROST_JD_REQ_*
*/
__u32 requirements;
/**
* @jm_ctx_handle: JM context handle. Zero if you want to use the
* default context.
*/
__u32 jm_ctx_handle;
/**
* @pad: Padding field. Must be zero.
*/
__u32 pad;
};
/**
@ -82,9 +106,18 @@ struct drm_panfrost_submit {
* completed.
*/
struct drm_panfrost_wait_bo {
/**
* @handle: Handle for the object to wait for.
*/
__u32 handle;
/**
* @pad: Padding, must be zero-filled.
*/
__u32 pad;
__s64 timeout_ns; /* absolute */
/**
* @timeout_ns: absolute number of nanoseconds to wait.
*/
__s64 timeout_ns;
};
/* Valid flags to pass to drm_panfrost_create_bo */
@ -97,16 +130,26 @@ struct drm_panfrost_wait_bo {
* The flags argument is a bit mask of PANFROST_BO_* flags.
*/
struct drm_panfrost_create_bo {
/**
* @size: size of shmem/BO area to create (bytes)
*/
__u32 size;
/**
* @flags: see PANFROST_BO_* flags
*/
__u32 flags;
/** Returned GEM handle for the BO. */
/**
* @handle: Returned GEM handle for the BO.
*/
__u32 handle;
/* Pad, must be zero-filled. */
/**
* @pad: Padding, must be zero-filled.
*/
__u32 pad;
/**
* Returned offset for the BO in the GPU address space. This offset
* is private to the DRM fd and is valid for the lifetime of the GEM
* handle.
* @offset: Returned offset for the BO in the GPU address space.
* This offset is private to the DRM fd and is valid for the
* lifetime of the GEM handle.
*
* This offset value will always be nonzero, since various HW
* units treat 0 specially.
@ -126,10 +169,17 @@ struct drm_panfrost_create_bo {
* used in a future extension.
*/
struct drm_panfrost_mmap_bo {
/** Handle for the object being mapped. */
/**
* @handle: Handle for the object being mapped.
*/
__u32 handle;
/**
* @flags: currently not used (should be zero)
*/
__u32 flags;
/** offset into the drm node to use for subsequent mmap call. */
/**
* @offset: offset into the drm node to use for subsequent mmap call.
*/
__u64 offset;
};
@ -177,6 +227,7 @@ enum drm_panfrost_param {
DRM_PANFROST_PARAM_AFBC_FEATURES,
DRM_PANFROST_PARAM_SYSTEM_TIMESTAMP,
DRM_PANFROST_PARAM_SYSTEM_TIMESTAMP_FREQUENCY,
DRM_PANFROST_PARAM_ALLOWED_JM_CTX_PRIORITIES,
};
struct drm_panfrost_get_param {
@ -185,7 +236,7 @@ struct drm_panfrost_get_param {
__u64 value;
};
/**
/*
* Returns the offset for the BO in the GPU address space for this DRM fd.
* This is the same value returned by drm_panfrost_create_bo, if that was called
* from this DRM fd.
@ -233,12 +284,14 @@ struct drm_panfrost_madvise {
* struct drm_panfrost_set_label_bo - ioctl argument for labelling Panfrost BOs.
*/
struct drm_panfrost_set_label_bo {
/** @handle: Handle of the buffer object to label. */
/**
* @handle: Handle of the buffer object to label.
*/
__u32 handle;
/** @pad: MBZ. */
/**
* @pad: Must be zero.
*/
__u32 pad;
/**
* @label: User pointer to a NUL-terminated string
*
@ -299,6 +352,49 @@ struct panfrost_dump_registers {
__u32 value;
};
enum drm_panfrost_jm_ctx_priority {
/**
* @PANFROST_JM_CTX_PRIORITY_LOW: Low priority context.
*/
PANFROST_JM_CTX_PRIORITY_LOW = 0,
/**
* @PANFROST_JM_CTX_PRIORITY_MEDIUM: Medium priority context.
*/
PANFROST_JM_CTX_PRIORITY_MEDIUM,
/**
* @PANFROST_JM_CTX_PRIORITY_HIGH: High priority context.
*
* Requires CAP_SYS_NICE or DRM_MASTER.
*/
PANFROST_JM_CTX_PRIORITY_HIGH,
};
struct drm_panfrost_jm_ctx_create {
/**
* @handle: Handle of the created JM context
*/
__u32 handle;
/**
* @priority: Context priority (see enum drm_panfrost_jm_ctx_priority).
*/
__u32 priority;
};
struct drm_panfrost_jm_ctx_destroy {
/**
* @handle: Handle of the JM context to destroy.
*
* Must be a valid context handle returned by DRM_IOCTL_PANTHOR_JM_CTX_CREATE.
*/
__u32 handle;
/**
* @pad: Padding field, must be zero.
*/
__u32 pad;
};
#if defined(__cplusplus)
}
#endif

3
lib/libc/include/any-linux-any/drm/panthor_drm.h vendored
View file

@ -327,6 +327,9 @@ struct drm_panthor_gpu_info {
/** @pad: MBZ. */
__u32 pad;
/** @gpu_features: Bitmask describing supported GPU-wide features */
__u64 gpu_features;
};
/**

142
lib/libc/include/any-linux-any/drm/rocket_accel.h vendored Normal file
View file

@ -0,0 +1,142 @@
/* SPDX-License-Identifier: MIT */
/*
* Copyright © 2024 Tomeu Vizoso
*/
#ifndef __DRM_UAPI_ROCKET_ACCEL_H__
#define __DRM_UAPI_ROCKET_ACCEL_H__
#include "drm.h"
#if defined(__cplusplus)
extern "C" {
#endif
#define DRM_ROCKET_CREATE_BO 0x00
#define DRM_ROCKET_SUBMIT 0x01
#define DRM_ROCKET_PREP_BO 0x02
#define DRM_ROCKET_FINI_BO 0x03
#define DRM_IOCTL_ROCKET_CREATE_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_ROCKET_CREATE_BO, struct drm_rocket_create_bo)
#define DRM_IOCTL_ROCKET_SUBMIT DRM_IOW(DRM_COMMAND_BASE + DRM_ROCKET_SUBMIT, struct drm_rocket_submit)
#define DRM_IOCTL_ROCKET_PREP_BO DRM_IOW(DRM_COMMAND_BASE + DRM_ROCKET_PREP_BO, struct drm_rocket_prep_bo)
#define DRM_IOCTL_ROCKET_FINI_BO DRM_IOW(DRM_COMMAND_BASE + DRM_ROCKET_FINI_BO, struct drm_rocket_fini_bo)
/**
* struct drm_rocket_create_bo - ioctl argument for creating Rocket BOs.
*
*/
struct drm_rocket_create_bo {
/** Input: Size of the requested BO. */
__u32 size;
/** Output: GEM handle for the BO. */
__u32 handle;
/**
* Output: DMA address for the BO in the NPU address space. This address
* is private to the DRM fd and is valid for the lifetime of the GEM
* handle.
*/
__u64 dma_address;
/** Output: Offset into the drm node to use for subsequent mmap call. */
__u64 offset;
};
/**
* struct drm_rocket_prep_bo - ioctl argument for starting CPU ownership of the BO.
*
* Takes care of waiting for any NPU jobs that might still use the NPU and performs cache
* synchronization.
*/
struct drm_rocket_prep_bo {
/** Input: GEM handle of the buffer object. */
__u32 handle;
/** Reserved, must be zero. */
__u32 reserved;
/** Input: Amount of time to wait for NPU jobs. */
__s64 timeout_ns;
};
/**
* struct drm_rocket_fini_bo - ioctl argument for finishing CPU ownership of the BO.
*
* Synchronize caches for NPU access.
*/
struct drm_rocket_fini_bo {
/** Input: GEM handle of the buffer object. */
__u32 handle;
/** Reserved, must be zero. */
__u32 reserved;
};
/**
* struct drm_rocket_task - A task to be run on the NPU
*
* A task is the smallest unit of work that can be run on the NPU.
*/
struct drm_rocket_task {
/** Input: DMA address to NPU mapping of register command buffer */
__u32 regcmd;
/** Input: Number of commands in the register command buffer */
__u32 regcmd_count;
};
/**
* struct drm_rocket_job - A job to be run on the NPU
*
* The kernel will schedule the execution of this job taking into account its
* dependencies with other jobs. All tasks in the same job will be executed
* sequentially on the same core, to benefit from memory residency in SRAM.
*/
struct drm_rocket_job {
/** Input: Pointer to an array of struct drm_rocket_task. */
__u64 tasks;
/** Input: Pointer to a u32 array of the BOs that are read by the job. */
__u64 in_bo_handles;
/** Input: Pointer to a u32 array of the BOs that are written to by the job. */
__u64 out_bo_handles;
/** Input: Number of tasks passed in. */
__u32 task_count;
/** Input: Size in bytes of the structs in the @tasks field. */
__u32 task_struct_size;
/** Input: Number of input BO handles passed in (size is that times 4). */
__u32 in_bo_handle_count;
/** Input: Number of output BO handles passed in (size is that times 4). */
__u32 out_bo_handle_count;
};
/**
* struct drm_rocket_submit - ioctl argument for submitting commands to the NPU.
*
* The kernel will schedule the execution of these jobs in dependency order.
*/
struct drm_rocket_submit {
/** Input: Pointer to an array of struct drm_rocket_job. */
__u64 jobs;
/** Input: Number of jobs passed in. */
__u32 job_count;
/** Input: Size in bytes of the structs in the @jobs field. */
__u32 job_struct_size;
/** Reserved, must be zero. */
__u64 reserved;
};
#if defined(__cplusplus)
}
#endif
#endif /* __DRM_UAPI_ROCKET_ACCEL_H__ */

2
lib/libc/include/any-linux-any/drm/v3d_drm.h vendored
View file

@ -294,6 +294,8 @@ enum drm_v3d_param {
DRM_V3D_PARAM_SUPPORTS_CPU_QUEUE,
DRM_V3D_PARAM_MAX_PERF_COUNTERS,
DRM_V3D_PARAM_SUPPORTS_SUPER_PAGES,
DRM_V3D_PARAM_GLOBAL_RESET_COUNTER,
DRM_V3D_PARAM_CONTEXT_RESET_COUNTER,
};
struct drm_v3d_get_param {

304
lib/libc/include/any-linux-any/drm/xe_drm.h vendored
View file

@ -81,6 +81,8 @@ extern "C" {
* - &DRM_IOCTL_XE_EXEC
* - &DRM_IOCTL_XE_WAIT_USER_FENCE
* - &DRM_IOCTL_XE_OBSERVATION
* - &DRM_IOCTL_XE_MADVISE
* - &DRM_IOCTL_XE_VM_QUERY_MEM_RANGE_ATTRS
*/
/*
@ -102,6 +104,8 @@ extern "C" {
#define DRM_XE_EXEC 0x09
#define DRM_XE_WAIT_USER_FENCE 0x0a
#define DRM_XE_OBSERVATION 0x0b
#define DRM_XE_MADVISE 0x0c
#define DRM_XE_VM_QUERY_MEM_RANGE_ATTRS 0x0d
/* Must be kept compact -- no holes */
@ -117,6 +121,8 @@ extern "C" {
#define DRM_IOCTL_XE_EXEC DRM_IOW(DRM_COMMAND_BASE + DRM_XE_EXEC, struct drm_xe_exec)
#define DRM_IOCTL_XE_WAIT_USER_FENCE DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_WAIT_USER_FENCE, struct drm_xe_wait_user_fence)
#define DRM_IOCTL_XE_OBSERVATION DRM_IOW(DRM_COMMAND_BASE + DRM_XE_OBSERVATION, struct drm_xe_observation_param)
#define DRM_IOCTL_XE_MADVISE DRM_IOW(DRM_COMMAND_BASE + DRM_XE_MADVISE, struct drm_xe_madvise)
#define DRM_IOCTL_XE_VM_QUERY_MEM_RANGE_ATTRS DRM_IOWR(DRM_COMMAND_BASE + DRM_XE_VM_QUERY_MEM_RANGE_ATTRS, struct drm_xe_vm_query_mem_range_attr)
/**
* DOC: Xe IOCTL Extensions
@ -760,8 +766,16 @@ struct drm_xe_device_query {
* gem creation
*
* The @flags can be:
* - %DRM_XE_GEM_CREATE_FLAG_DEFER_BACKING
* - %DRM_XE_GEM_CREATE_FLAG_SCANOUT
* - %DRM_XE_GEM_CREATE_FLAG_DEFER_BACKING - Modify the GEM object
* allocation strategy by deferring physical memory allocation
* until the object is either bound to a virtual memory region via
* VM_BIND or accessed by the CPU. As a result, no backing memory is
* reserved at the time of GEM object creation.
* - %DRM_XE_GEM_CREATE_FLAG_SCANOUT - Indicates that the GEM object is
* intended for scanout via the display engine. When set, kernel ensures
* that the allocation is placed in a memory region compatible with the
* display engine requirements. This may impose restrictions on tiling,
* alignment, and memory placement to guarantee proper display functionality.
* - %DRM_XE_GEM_CREATE_FLAG_NEEDS_VISIBLE_VRAM - When using VRAM as a
* possible placement, ensure that the corresponding VRAM allocation
* will always use the CPU accessible part of VRAM. This is important
@ -1003,6 +1017,24 @@ struct drm_xe_vm_destroy {
* valid on VMs with DRM_XE_VM_CREATE_FLAG_FAULT_MODE set. The CPU address
* mirror flag are only valid for DRM_XE_VM_BIND_OP_MAP operations, the BO
* handle MBZ, and the BO offset MBZ.
* - %DRM_XE_VM_BIND_FLAG_MADVISE_AUTORESET - Can be used in combination with
* %DRM_XE_VM_BIND_FLAG_CPU_ADDR_MIRROR to reset madvises when the underlying
* CPU address space range is unmapped (typically with munmap(2) or brk(2)).
* The madvise values set with &DRM_IOCTL_XE_MADVISE are reset to the values
* that were present immediately after the &DRM_IOCTL_XE_VM_BIND.
* The reset GPU virtual address range is the intersection of the range bound
* using &DRM_IOCTL_XE_VM_BIND and the virtual CPU address space range
* unmapped.
* This functionality is present to mimic the behaviour of CPU address space
* madvises set using madvise(2), which are typically reset on unmap.
* Note: free(3) may or may not call munmap(2) and/or brk(2), and may thus
* not invoke autoreset. Neither will stack variables going out of scope.
* Therefore it's recommended to always explicitly reset the madvises when
* freeing the memory backing a region used in a &DRM_IOCTL_XE_MADVISE call.
*
* The @prefetch_mem_region_instance for %DRM_XE_VM_BIND_OP_PREFETCH can also be:
* - %DRM_XE_CONSULT_MEM_ADVISE_PREF_LOC, which ensures prefetching occurs in
* the memory region advised by madvise.
*/
struct drm_xe_vm_bind_op {
/** @extensions: Pointer to the first extension struct, if any */
@ -1105,9 +1137,11 @@ struct drm_xe_vm_bind_op {
#define DRM_XE_VM_BIND_FLAG_DUMPABLE (1 << 3)
#define DRM_XE_VM_BIND_FLAG_CHECK_PXP (1 << 4)
#define DRM_XE_VM_BIND_FLAG_CPU_ADDR_MIRROR (1 << 5)
#define DRM_XE_VM_BIND_FLAG_MADVISE_AUTORESET (1 << 6)
/** @flags: Bind flags */
__u32 flags;
#define DRM_XE_CONSULT_MEM_ADVISE_PREF_LOC -1
/**
* @prefetch_mem_region_instance: Memory region to prefetch VMA to.
* It is a region instance, not a mask.
@ -1429,6 +1463,7 @@ struct drm_xe_exec {
/** @exec_queue_id: Exec queue ID for the batch buffer */
__u32 exec_queue_id;
#define DRM_XE_MAX_SYNCS 1024
/** @num_syncs: Amount of struct drm_xe_sync in array. */
__u32 num_syncs;
@ -1974,6 +2009,271 @@ struct drm_xe_query_eu_stall {
__u64 sampling_rates[];
};
/**
* struct drm_xe_madvise - Input of &DRM_IOCTL_XE_MADVISE
*
* This structure is used to set memory attributes for a virtual address range
* in a VM. The type of attribute is specified by @type, and the corresponding
* union member is used to provide additional parameters for @type.
*
* Supported attribute types:
* - DRM_XE_MEM_RANGE_ATTR_PREFERRED_LOC: Set preferred memory location.
* - DRM_XE_MEM_RANGE_ATTR_ATOMIC: Set atomic access policy.
* - DRM_XE_MEM_RANGE_ATTR_PAT: Set page attribute table index.
*
* Example:
*
* .. code-block:: C
*
* struct drm_xe_madvise madvise = {
* .vm_id = vm_id,
* .start = 0x100000,
* .range = 0x2000,
* .type = DRM_XE_MEM_RANGE_ATTR_ATOMIC,
* .atomic_val = DRM_XE_ATOMIC_DEVICE,
* };
*
* ioctl(fd, DRM_IOCTL_XE_MADVISE, &madvise);
*
*/
struct drm_xe_madvise {
/** @extensions: Pointer to the first extension struct, if any */
__u64 extensions;
/** @start: start of the virtual address range */
__u64 start;
/** @range: size of the virtual address range */
__u64 range;
/** @vm_id: vm_id of the virtual range */
__u32 vm_id;
#define DRM_XE_MEM_RANGE_ATTR_PREFERRED_LOC 0
#define DRM_XE_MEM_RANGE_ATTR_ATOMIC 1
#define DRM_XE_MEM_RANGE_ATTR_PAT 2
/** @type: type of attribute */
__u32 type;
union {
/**
* @preferred_mem_loc: preferred memory location
*
* Used when @type == DRM_XE_MEM_RANGE_ATTR_PREFERRED_LOC
*
* Supported values for @preferred_mem_loc.devmem_fd:
* - DRM_XE_PREFERRED_LOC_DEFAULT_DEVICE: set vram of fault tile as preferred loc
* - DRM_XE_PREFERRED_LOC_DEFAULT_SYSTEM: set smem as preferred loc
*
* Supported values for @preferred_mem_loc.migration_policy:
* - DRM_XE_MIGRATE_ALL_PAGES
* - DRM_XE_MIGRATE_ONLY_SYSTEM_PAGES
*/
struct {
#define DRM_XE_PREFERRED_LOC_DEFAULT_DEVICE 0
#define DRM_XE_PREFERRED_LOC_DEFAULT_SYSTEM -1
/** @preferred_mem_loc.devmem_fd: fd for preferred loc */
__u32 devmem_fd;
#define DRM_XE_MIGRATE_ALL_PAGES 0
#define DRM_XE_MIGRATE_ONLY_SYSTEM_PAGES 1
/** @preferred_mem_loc.migration_policy: Page migration policy */
__u16 migration_policy;
/** @preferred_mem_loc.pad : MBZ */
__u16 pad;
/** @preferred_mem_loc.reserved : Reserved */
__u64 reserved;
} preferred_mem_loc;
/**
* @atomic: Atomic access policy
*
* Used when @type == DRM_XE_MEM_RANGE_ATTR_ATOMIC.
*
* Supported values for @atomic.val:
* - DRM_XE_ATOMIC_UNDEFINED: Undefined or default behaviour.
* Support both GPU and CPU atomic operations for system allocator.
* Support GPU atomic operations for normal(bo) allocator.
* - DRM_XE_ATOMIC_DEVICE: Support GPU atomic operations.
* - DRM_XE_ATOMIC_GLOBAL: Support both GPU and CPU atomic operations.
* - DRM_XE_ATOMIC_CPU: Support CPU atomic only, no GPU atomics supported.
*/
struct {
#define DRM_XE_ATOMIC_UNDEFINED 0
#define DRM_XE_ATOMIC_DEVICE 1
#define DRM_XE_ATOMIC_GLOBAL 2
#define DRM_XE_ATOMIC_CPU 3
/** @atomic.val: value of atomic operation */
__u32 val;
/** @atomic.pad: MBZ */
__u32 pad;
/** @atomic.reserved: Reserved */
__u64 reserved;
} atomic;
/**
* @pat_index: Page attribute table index
*
* Used when @type == DRM_XE_MEM_RANGE_ATTR_PAT.
*/
struct {
/** @pat_index.val: PAT index value */
__u32 val;
/** @pat_index.pad: MBZ */
__u32 pad;
/** @pat_index.reserved: Reserved */
__u64 reserved;
} pat_index;
};
/** @reserved: Reserved */
__u64 reserved[2];
};
/**
* struct drm_xe_mem_range_attr - Output of &DRM_IOCTL_XE_VM_QUERY_MEM_RANGES_ATTRS
*
* This structure is provided by userspace and filled by KMD in response to the
* DRM_IOCTL_XE_VM_QUERY_MEM_RANGES_ATTRS ioctl. It describes memory attributes of
* a memory ranges within a user specified address range in a VM.
*
* The structure includes information such as atomic access policy,
* page attribute table (PAT) index, and preferred memory location.
* Userspace allocates an array of these structures and passes a pointer to the
* ioctl to retrieve attributes for each memory ranges
*
* @extensions: Pointer to the first extension struct, if any
* @start: Start address of the memory range
* @end: End address of the virtual memory range
*
*/
struct drm_xe_mem_range_attr {
/** @extensions: Pointer to the first extension struct, if any */
__u64 extensions;
/** @start: start of the memory range */
__u64 start;
/** @end: end of the memory range */
__u64 end;
/** @preferred_mem_loc: preferred memory location */
struct {
/** @preferred_mem_loc.devmem_fd: fd for preferred loc */
__u32 devmem_fd;
/** @preferred_mem_loc.migration_policy: Page migration policy */
__u32 migration_policy;
} preferred_mem_loc;
/** @atomic: Atomic access policy */
struct {
/** @atomic.val: atomic attribute */
__u32 val;
/** @atomic.reserved: Reserved */
__u32 reserved;
} atomic;
/** @pat_index: Page attribute table index */
struct {
/** @pat_index.val: PAT index */
__u32 val;
/** @pat_index.reserved: Reserved */
__u32 reserved;
} pat_index;
/** @reserved: Reserved */
__u64 reserved[2];
};
/**
* struct drm_xe_vm_query_mem_range_attr - Input of &DRM_IOCTL_XE_VM_QUERY_MEM_ATTRIBUTES
*
* This structure is used to query memory attributes of memory regions
* within a user specified address range in a VM. It provides detailed
* information about each memory range, including atomic access policy,
* page attribute table (PAT) index, and preferred memory location.
*
* Userspace first calls the ioctl with @num_mem_ranges = 0,
* @sizeof_mem_ranges_attr = 0 and @vector_of_vma_mem_attr = NULL to retrieve
* the number of memory regions and size of each memory range attribute.
* Then, it allocates a buffer of that size and calls the ioctl again to fill
* the buffer with memory range attributes.
*
* If second call fails with -ENOSPC, it means memory ranges changed between
* first call and now, retry IOCTL again with @num_mem_ranges = 0,
* @sizeof_mem_ranges_attr = 0 and @vector_of_vma_mem_attr = NULL followed by
* Second ioctl call.
*
* Example:
*
* .. code-block:: C
*
* struct drm_xe_vm_query_mem_range_attr query = {
* .vm_id = vm_id,
* .start = 0x100000,
* .range = 0x2000,
* };
*
* // First ioctl call to get num of mem regions and sizeof each attribute
* ioctl(fd, DRM_IOCTL_XE_VM_QUERY_MEM_RANGE_ATTRS, &query);
*
* // Allocate buffer for the memory region attributes
* void *ptr = malloc(query.num_mem_ranges * query.sizeof_mem_range_attr);
* void *ptr_start = ptr;
*
* query.vector_of_mem_attr = (uintptr_t)ptr;
*
* // Second ioctl call to actually fill the memory attributes
* ioctl(fd, DRM_IOCTL_XE_VM_QUERY_MEM_RANGE_ATTRS, &query);
*
* // Iterate over the returned memory region attributes
* for (unsigned int i = 0; i < query.num_mem_ranges; ++i) {
* struct drm_xe_mem_range_attr *attr = (struct drm_xe_mem_range_attr *)ptr;
*
* // Do something with attr
*
* // Move pointer by one entry
* ptr += query.sizeof_mem_range_attr;
* }
*
* free(ptr_start);
*/
struct drm_xe_vm_query_mem_range_attr {
/** @extensions: Pointer to the first extension struct, if any */
__u64 extensions;
/** @vm_id: vm_id of the virtual range */
__u32 vm_id;
/** @num_mem_ranges: number of mem_ranges in range */
__u32 num_mem_ranges;
/** @start: start of the virtual address range */
__u64 start;
/** @range: size of the virtual address range */
__u64 range;
/** @sizeof_mem_range_attr: size of struct drm_xe_mem_range_attr */
__u64 sizeof_mem_range_attr;
/** @vector_of_mem_attr: userptr to array of struct drm_xe_mem_range_attr */
__u64 vector_of_mem_attr;
/** @reserved: Reserved */
__u64 reserved[2];
};
#if defined(__cplusplus)
}
#endif

36
lib/libc/include/any-linux-any/linux/acrn.h vendored
View file

@ -418,26 +418,32 @@ struct acrn_pcidev {
};
/**
* struct acrn_mmiodev - Info for assigning or de-assigning a MMIO device
* @name: Name of the MMIO device.
* @res[].user_vm_pa: Physical address of User VM of the MMIO region
* for the MMIO device.
* @res[].service_vm_pa: Physical address of Service VM of the MMIO
* region for the MMIO device.
* @res[].size: Size of the MMIO region for the MMIO device.
* @res[].mem_type: Memory type of the MMIO region for the MMIO
* device.
* struct acrn_mmio_dev_res - MMIO device resource description
* @user_vm_pa: Physical address of User VM of the MMIO region
* for the MMIO device.
* @service_vm_pa: Physical address of Service VM of the MMIO
* region for the MMIO device.
* @size: Size of the MMIO region for the MMIO device.
* @mem_type: Memory type of the MMIO region for the MMIO
* device.
*/
struct acrn_mmio_dev_res {
__u64 user_vm_pa;
__u64 service_vm_pa;
__u64 size;
__u64 mem_type;
};
/**
* struct acrn_mmiodev - Info for assigning or de-assigning an MMIO device
* @name: Name of the MMIO device.
* @res: Array of MMIO device descriptions
*
* This structure will be passed to hypervisor directly.
*/
struct acrn_mmiodev {
__u8 name[8];
struct {
__u64 user_vm_pa;
__u64 service_vm_pa;
__u64 size;
__u64 mem_type;
} res[ACRN_MMIODEV_RES_NUM];
struct acrn_mmio_dev_res res[ACRN_MMIODEV_RES_NUM];
};
/**

2
lib/libc/include/any-linux-any/linux/android/binder.h vendored
View file

@ -38,7 +38,7 @@ enum {
BINDER_TYPE_PTR = B_PACK_CHARS('p', 't', '*', B_TYPE_LARGE),
};
enum {
enum flat_binder_object_flags {
FLAT_BINDER_FLAG_PRIORITY_MASK = 0xff,
FLAT_BINDER_FLAG_ACCEPTS_FDS = 0x100,

38
lib/libc/include/any-linux-any/linux/android/binder_netlink.h vendored Normal file
View file

@ -0,0 +1,38 @@
/* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) */
/* Do not edit directly, auto-generated from: */
/* Documentation/netlink/specs/binder.yaml */
/* YNL-GEN uapi header */
/* To regenerate run: tools/net/ynl/ynl-regen.sh */
#ifndef _LINUX_ANDROID_BINDER_NETLINK_H
#define _LINUX_ANDROID_BINDER_NETLINK_H
#define BINDER_FAMILY_NAME "binder"
#define BINDER_FAMILY_VERSION 1
enum {
BINDER_A_REPORT_ERROR = 1,
BINDER_A_REPORT_CONTEXT,
BINDER_A_REPORT_FROM_PID,
BINDER_A_REPORT_FROM_TID,
BINDER_A_REPORT_TO_PID,
BINDER_A_REPORT_TO_TID,
BINDER_A_REPORT_IS_REPLY,
BINDER_A_REPORT_FLAGS,
BINDER_A_REPORT_CODE,
BINDER_A_REPORT_DATA_SIZE,
__BINDER_A_REPORT_MAX,
BINDER_A_REPORT_MAX = (__BINDER_A_REPORT_MAX - 1)
};
enum {
BINDER_CMD_REPORT = 1,
__BINDER_CMD_MAX,
BINDER_CMD_MAX = (__BINDER_CMD_MAX - 1)
};
#define BINDER_MCGRP_REPORT "report"
#endif /* _LINUX_ANDROID_BINDER_NETLINK_H */

7
lib/libc/include/any-linux-any/linux/aspeed-video.h vendored
View file

@ -8,6 +8,13 @@
#include <linux/v4l2-controls.h>
/* aspeed video's input types */
enum aspeed_video_input {
VIDEO_INPUT_VGA = 0,
VIDEO_INPUT_GFX,
VIDEO_INPUT_MAX
};
#define V4L2_CID_ASPEED_HQ_MODE (V4L2_CID_USER_ASPEED_BASE + 1)
#define V4L2_CID_ASPEED_HQ_JPEG_QUALITY (V4L2_CID_USER_ASPEED_BASE + 2)

2
lib/libc/include/any-linux-any/linux/audit.h vendored
View file

@ -148,6 +148,8 @@
#define AUDIT_IPE_POLICY_LOAD 1422 /* IPE policy load */
#define AUDIT_LANDLOCK_ACCESS 1423 /* Landlock denial */
#define AUDIT_LANDLOCK_DOMAIN 1424 /* Landlock domain status */
#define AUDIT_MAC_TASK_CONTEXTS 1425 /* Multiple LSM task contexts */
#define AUDIT_MAC_OBJ_CONTEXTS 1426 /* Multiple LSM objext contexts */
#define AUDIT_FIRST_KERN_ANOM_MSG 1700
#define AUDIT_LAST_KERN_ANOM_MSG 1799

55
lib/libc/include/any-linux-any/linux/blktrace_api.h vendored
View file

@ -26,11 +26,22 @@ enum blktrace_cat {
BLK_TC_DRV_DATA = 1 << 14, /* binary per-driver data */
BLK_TC_FUA = 1 << 15, /* fua requests */
BLK_TC_END = 1 << 15, /* we've run out of bits! */
BLK_TC_END_V1 = 1 << 15, /* we've run out of bits! */
BLK_TC_ZONE_APPEND = 1ull << 16, /* zone append */
BLK_TC_ZONE_RESET = 1ull << 17, /* zone reset */
BLK_TC_ZONE_RESET_ALL = 1ull << 18, /* zone reset all */
BLK_TC_ZONE_FINISH = 1ull << 19, /* zone finish */
BLK_TC_ZONE_OPEN = 1ull << 20, /* zone open */
BLK_TC_ZONE_CLOSE = 1ull << 21, /* zone close */
BLK_TC_WRITE_ZEROES = 1ull << 22, /* write-zeroes */
BLK_TC_END_V2 = 1ull << 22,
};
#define BLK_TC_SHIFT (16)
#define BLK_TC_ACT(act) ((act) << BLK_TC_SHIFT)
#define BLK_TC_ACT(act) ((u64)(act) << BLK_TC_SHIFT)
/*
* Basic trace actions
@ -53,6 +64,8 @@ enum blktrace_act {
__BLK_TA_REMAP, /* bio was remapped */
__BLK_TA_ABORT, /* request aborted */
__BLK_TA_DRV_DATA, /* driver-specific binary data */
__BLK_TA_ZONE_PLUG, /* zone write plug was plugged */
__BLK_TA_ZONE_UNPLUG, /* zone write plug was unplugged */
__BLK_TA_CGROUP = 1 << 8, /* from a cgroup*/
};
@ -88,12 +101,19 @@ enum blktrace_notify {
#define BLK_TA_ABORT (__BLK_TA_ABORT | BLK_TC_ACT(BLK_TC_QUEUE))
#define BLK_TA_DRV_DATA (__BLK_TA_DRV_DATA | BLK_TC_ACT(BLK_TC_DRV_DATA))
#define BLK_TA_ZONE_APPEND (__BLK_TA_COMPLETE |\
BLK_TC_ACT(BLK_TC_ZONE_APPEND))
#define BLK_TA_ZONE_PLUG (__BLK_TA_ZONE_PLUG | BLK_TC_ACT(BLK_TC_QUEUE))
#define BLK_TA_ZONE_UNPLUG (__BLK_TA_ZONE_UNPLUG |\
BLK_TC_ACT(BLK_TC_QUEUE))
#define BLK_TN_PROCESS (__BLK_TN_PROCESS | BLK_TC_ACT(BLK_TC_NOTIFY))
#define BLK_TN_TIMESTAMP (__BLK_TN_TIMESTAMP | BLK_TC_ACT(BLK_TC_NOTIFY))
#define BLK_TN_MESSAGE (__BLK_TN_MESSAGE | BLK_TC_ACT(BLK_TC_NOTIFY))
#define BLK_IO_TRACE_MAGIC 0x65617400
#define BLK_IO_TRACE_VERSION 0x07
#define BLK_IO_TRACE2_VERSION 0x08
/*
* The trace itself
@ -113,6 +133,21 @@ struct blk_io_trace {
/* cgroup id will be stored here if exists */
};
struct blk_io_trace2 {
__u32 magic; /* MAGIC << 8 | BLK_IO_TRACE2_VERSION */
__u32 sequence; /* event number */
__u64 time; /* in nanoseconds */
__u64 sector; /* disk offset */
__u32 bytes; /* transfer length */
__u32 pid; /* who did it */
__u64 action; /* what happened */
__u32 device; /* device number */
__u32 cpu; /* on what cpu did it happen */
__u16 error; /* completion error */
__u16 pdu_len; /* length of data after this trace */
__u8 pad[12];
/* cgroup id will be stored here if it exists */
};
/*
* The remap event
*/
@ -129,6 +164,7 @@ enum {
};
#define BLKTRACE_BDEV_SIZE 32
#define BLKTRACE_BDEV_SIZE2 64
/*
* User setup structure passed with BLKTRACESETUP
@ -143,4 +179,19 @@ struct blk_user_trace_setup {
__u32 pid;
};
/*
* User setup structure passed with BLKTRACESETUP2
*/
struct blk_user_trace_setup2 {
char name[BLKTRACE_BDEV_SIZE2]; /* output */
__u64 act_mask; /* input */
__u32 buf_size; /* input */
__u32 buf_nr; /* input */
__u64 start_lba;
__u64 end_lba;
__u32 pid;
__u32 flags; /* currently unused */
__u64 reserved[11];
};
#endif /* BLKTRACE_H */

48
lib/libc/include/any-linux-any/linux/blkzoned.h vendored
View file

@ -48,6 +48,8 @@ enum blk_zone_type {
* FINISH ZONE command.
* @BLK_ZONE_COND_READONLY: The zone is read-only.
* @BLK_ZONE_COND_OFFLINE: The zone is offline (sectors cannot be read/written).
* @BLK_ZONE_COND_ACTIVE: The zone is either implicitly open, explicitly open,
* or closed.
*
* The Zone Condition state machine in the ZBC/ZAC standards maps the above
* deinitions as:
@ -61,6 +63,13 @@ enum blk_zone_type {
*
* Conditions 0x5 to 0xC are reserved by the current ZBC/ZAC spec and should
* be considered invalid.
*
* The condition BLK_ZONE_COND_ACTIVE is used only with cached zone reports.
* It is used to report any of the BLK_ZONE_COND_IMP_OPEN,
* BLK_ZONE_COND_EXP_OPEN and BLK_ZONE_COND_CLOSED conditions. Conversely, a
* regular zone report will never report a zone condition using
* BLK_ZONE_COND_ACTIVE and instead use the conditions BLK_ZONE_COND_IMP_OPEN,
* BLK_ZONE_COND_EXP_OPEN or BLK_ZONE_COND_CLOSED as reported by the device.
*/
enum blk_zone_cond {
BLK_ZONE_COND_NOT_WP = 0x0,
@ -71,15 +80,29 @@ enum blk_zone_cond {
BLK_ZONE_COND_READONLY = 0xD,
BLK_ZONE_COND_FULL = 0xE,
BLK_ZONE_COND_OFFLINE = 0xF,
BLK_ZONE_COND_ACTIVE = 0xFF, /* added in Linux 6.19 */
#define BLK_ZONE_COND_ACTIVE BLK_ZONE_COND_ACTIVE
};
/**
* enum blk_zone_report_flags - Feature flags of reported zone descriptors.
*
* @BLK_ZONE_REP_CAPACITY: Zone descriptor has capacity field.
* @BLK_ZONE_REP_CAPACITY: Output only. Indicates that zone descriptors in a
* zone report have a valid capacity field.
* @BLK_ZONE_REP_CACHED: Input only. Indicates that the zone report should be
* generated using cached zone information. In this case,
* the implicit open, explicit open and closed zone
* conditions are all reported with the
* BLK_ZONE_COND_ACTIVE condition.
*/
enum blk_zone_report_flags {
BLK_ZONE_REP_CAPACITY = (1 << 0),
/* Output flags */
BLK_ZONE_REP_CAPACITY = (1U << 0),
/* Input flags */
BLK_ZONE_REP_CACHED = (1U << 31), /* added in Linux 6.19 */
#define BLK_ZONE_REP_CACHED BLK_ZONE_REP_CACHED
};
/**
@ -122,6 +145,10 @@ struct blk_zone {
* @sector: starting sector of report
* @nr_zones: IN maximum / OUT actual
* @flags: one or more flags as defined by enum blk_zone_report_flags.
* @flags: one or more flags as defined by enum blk_zone_report_flags.
* With BLKREPORTZONE, this field is ignored as an input and is valid
* only as an output. Using BLKREPORTZONEV2, this field is used as both
* input and output.
* @zones: Space to hold @nr_zones @zones entries on reply.
*
* The array of at most @nr_zones must follow this structure in memory.
@ -148,9 +175,19 @@ struct blk_zone_range {
/**
* Zoned block device ioctl's:
*
* @BLKREPORTZONE: Get zone information. Takes a zone report as argument.
* The zone report will start from the zone containing the
* sector specified in the report request structure.
* @BLKREPORTZONE: Get zone information from a zoned device. Takes a zone report
* as argument. The zone report will start from the zone
* containing the sector specified in struct blk_zone_report.
* The flags field of struct blk_zone_report is used as an
* output only and ignored as an input.
* DEPRECATED, use BLKREPORTZONEV2 instead.
* @BLKREPORTZONEV2: Same as @BLKREPORTZONE but uses the flags field of
* struct blk_zone_report as an input, allowing to get a zone
* report using cached zone information if the flag
* BLK_ZONE_REP_CACHED is set. In such case, the zone report
* may include zones with the condition @BLK_ZONE_COND_ACTIVE
* (c.f. the description of this condition above for more
* details).
* @BLKRESETZONE: Reset the write pointer of the zones in the specified
* sector range. The sector range must be zone aligned.
* @BLKGETZONESZ: Get the device zone size in number of 512 B sectors.
@ -169,5 +206,6 @@ struct blk_zone_range {
#define BLKOPENZONE _IOW(0x12, 134, struct blk_zone_range)
#define BLKCLOSEZONE _IOW(0x12, 135, struct blk_zone_range)
#define BLKFINISHZONE _IOW(0x12, 136, struct blk_zone_range)
#define BLKREPORTZONEV2 _IOWR(0x12, 142, struct blk_zone_report)
#endif /* _BLKZONED_H */

59
lib/libc/include/any-linux-any/linux/bpf.h vendored
View file

@ -1026,6 +1026,7 @@ enum bpf_map_type {
BPF_MAP_TYPE_USER_RINGBUF,
BPF_MAP_TYPE_CGRP_STORAGE,
BPF_MAP_TYPE_ARENA,
BPF_MAP_TYPE_INSN_ARRAY,
__MAX_BPF_MAP_TYPE
};
@ -1430,6 +1431,9 @@ enum {
/* Do not translate kernel bpf_arena pointers to user pointers */
BPF_F_NO_USER_CONV = (1U << 18),
/* Enable BPF ringbuf overwrite mode */
BPF_F_RB_OVERWRITE = (1U << 19),
};
/* Flags for BPF_PROG_QUERY. */
@ -1522,6 +1526,12 @@ union bpf_attr {
* If provided, map_flags should have BPF_F_TOKEN_FD flag set.
*/
__s32 map_token_fd;
/* Hash of the program that has exclusive access to the map.
*/
__aligned_u64 excl_prog_hash;
/* Size of the passed excl_prog_hash. */
__u32 excl_prog_hash_size;
};
struct { /* anonymous struct used by BPF_MAP_*_ELEM and BPF_MAP_FREEZE commands */
@ -1605,6 +1615,16 @@ union bpf_attr {
* continuous.
*/
__u32 fd_array_cnt;
/* Pointer to a buffer containing the signature of the BPF
* program.
*/
__aligned_u64 signature;
/* Size of the signature buffer in bytes. */
__u32 signature_size;
/* ID of the kernel keyring to be used for signature
* verification.
*/
__s32 keyring_id;
};
struct { /* anonymous struct used by BPF_OBJ_* commands */
@ -4875,7 +4895,7 @@ union bpf_attr {
*
* **-ENOENT** if the bpf_local_storage cannot be found.
*
* long bpf_d_path(struct path *path, char *buf, u32 sz)
* long bpf_d_path(const struct path *path, char *buf, u32 sz)
* Description
* Return full path for given **struct path** object, which
* needs to be the kernel BTF *path* object. The path is
@ -5602,7 +5622,7 @@ union bpf_attr {
* Return
* *sk* if casting is valid, or **NULL** otherwise.
*
* long bpf_dynptr_from_mem(void *data, u32 size, u64 flags, struct bpf_dynptr *ptr)
* long bpf_dynptr_from_mem(void *data, u64 size, u64 flags, struct bpf_dynptr *ptr)
* Description
* Get a dynptr to local memory *data*.
*
@ -5645,7 +5665,7 @@ union bpf_attr {
* Return
* Nothing. Always succeeds.
*
* long bpf_dynptr_read(void *dst, u32 len, const struct bpf_dynptr *src, u32 offset, u64 flags)
* long bpf_dynptr_read(void *dst, u64 len, const struct bpf_dynptr *src, u64 offset, u64 flags)
* Description
* Read *len* bytes from *src* into *dst*, starting from *offset*
* into *src*.
@ -5655,7 +5675,7 @@ union bpf_attr {
* of *src*'s data, -EINVAL if *src* is an invalid dynptr or if
* *flags* is not 0.
*
* long bpf_dynptr_write(const struct bpf_dynptr *dst, u32 offset, void *src, u32 len, u64 flags)
* long bpf_dynptr_write(const struct bpf_dynptr *dst, u64 offset, void *src, u64 len, u64 flags)
* Description
* Write *len* bytes from *src* into *dst*, starting from *offset*
* into *dst*.
@ -5676,7 +5696,7 @@ union bpf_attr {
* is a read-only dynptr or if *flags* is not correct. For skb-type dynptrs,
* other errors correspond to errors returned by **bpf_skb_store_bytes**\ ().
*
* void *bpf_dynptr_data(const struct bpf_dynptr *ptr, u32 offset, u32 len)
* void *bpf_dynptr_data(const struct bpf_dynptr *ptr, u64 offset, u64 len)
* Description
* Get a pointer to the underlying dynptr data.
*
@ -6215,6 +6235,7 @@ enum {
BPF_RB_RING_SIZE = 1,
BPF_RB_CONS_POS = 2,
BPF_RB_PROD_POS = 3,
BPF_RB_OVERWRITE_POS = 4,
};
/* BPF ring buffer constants */
@ -6666,6 +6687,8 @@ struct bpf_map_info {
__u32 btf_value_type_id;
__u32 btf_vmlinux_id;
__u64 map_extra;
__aligned_u64 hash;
__u32 hash_size;
} __attribute__((aligned(8)));
struct bpf_btf_info {
@ -7182,6 +7205,8 @@ enum {
TCP_BPF_SYN_MAC = 1007, /* Copy the MAC, IP[46], and TCP header */
TCP_BPF_SOCK_OPS_CB_FLAGS = 1008, /* Get or Set TCP sock ops flags */
SK_BPF_CB_FLAGS = 1009, /* Get or set sock ops flags in socket */
SK_BPF_BYPASS_PROT_MEM = 1010, /* Get or Set sk->sk_bypass_prot_mem */
};
enum {
@ -7418,6 +7443,10 @@ struct bpf_timer {
__u64 __opaque[2];
} __attribute__((aligned(8)));
struct bpf_task_work {
__u64 __opaque;
} __attribute__((aligned(8)));
struct bpf_wq {
__u64 __opaque[2];
} __attribute__((aligned(8)));
@ -7623,4 +7652,24 @@ enum bpf_kfunc_flags {
BPF_F_PAD_ZEROS = (1ULL << 0),
};
/*
* Values of a BPF_MAP_TYPE_INSN_ARRAY entry must be of this type.
*
* Before the map is used the orig_off field should point to an
* instruction inside the program being loaded. The other fields
* must be set to 0.
*
* After the program is loaded, the xlated_off will be adjusted
* by the verifier to point to the index of the original instruction
* in the xlated program. If the instruction is deleted, it will
* be set to (u32)-1. The jitted_off will be set to the corresponding
* offset in the jitted image of the program.
*/
struct bpf_insn_array_value {
__u32 orig_off;
__u32 xlated_off;
__u32 jitted_off;
__u32 :32;
};
#endif /* __LINUX_BPF_H__ */

9
lib/libc/include/any-linux-any/linux/btrfs.h vendored
View file

@ -1097,6 +1097,12 @@ enum btrfs_err_code {
BTRFS_ERROR_DEV_RAID1C4_MIN_NOT_MET,
};
/* Flags for IOC_SHUTDOWN, must match XFS_FSOP_GOING_FLAGS_* flags. */
#define BTRFS_SHUTDOWN_FLAGS_DEFAULT 0x0
#define BTRFS_SHUTDOWN_FLAGS_LOGFLUSH 0x1
#define BTRFS_SHUTDOWN_FLAGS_NOLOGFLUSH 0x2
#define BTRFS_SHUTDOWN_FLAGS_LAST 0x3
#define BTRFS_IOC_SNAP_CREATE _IOW(BTRFS_IOCTL_MAGIC, 1, \
struct btrfs_ioctl_vol_args)
#define BTRFS_IOC_DEFRAG _IOW(BTRFS_IOCTL_MAGIC, 2, \
@ -1218,6 +1224,9 @@ enum btrfs_err_code {
#define BTRFS_IOC_SUBVOL_SYNC_WAIT _IOW(BTRFS_IOCTL_MAGIC, 65, \
struct btrfs_ioctl_subvol_wait)
/* Shutdown ioctl should follow XFS's interfaces, thus not using btrfs magic. */
#define BTRFS_IOC_SHUTDOWN _IOR('X', 125, __u32)
#ifdef __cplusplus
}
#endif

48
lib/libc/include/any-linux-any/linux/can/netlink.h vendored
View file

@ -5,6 +5,7 @@
* Definitions for the CAN netlink interface
*
* Copyright (c) 2009 Wolfgang Grandegger <wg@grandegger.com>
* Copyright (c) 2021-2025 Vincent Mailhol <mailhol@kernel.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the version 2 of the GNU General Public License
@ -101,8 +102,13 @@ struct can_ctrlmode {
#define CAN_CTRLMODE_PRESUME_ACK 0x40 /* Ignore missing CAN ACKs */
#define CAN_CTRLMODE_FD_NON_ISO 0x80 /* CAN FD in non-ISO mode */
#define CAN_CTRLMODE_CC_LEN8_DLC 0x100 /* Classic CAN DLC option */
#define CAN_CTRLMODE_TDC_AUTO 0x200 /* CAN transiver automatically calculates TDCV */
#define CAN_CTRLMODE_TDC_MANUAL 0x400 /* TDCV is manually set up by user */
#define CAN_CTRLMODE_TDC_AUTO 0x200 /* FD transceiver automatically calculates TDCV */
#define CAN_CTRLMODE_TDC_MANUAL 0x400 /* FD TDCV is manually set up by user */
#define CAN_CTRLMODE_RESTRICTED 0x800 /* Restricted operation mode */
#define CAN_CTRLMODE_XL 0x1000 /* CAN XL mode */
#define CAN_CTRLMODE_XL_TDC_AUTO 0x2000 /* XL transceiver automatically calculates TDCV */
#define CAN_CTRLMODE_XL_TDC_MANUAL 0x4000 /* XL TDCV is manually set up by user */
#define CAN_CTRLMODE_XL_TMS 0x8000 /* Transceiver Mode Switching */
/*
* CAN device statistics
@ -129,15 +135,20 @@ enum {
IFLA_CAN_RESTART_MS,
IFLA_CAN_RESTART,
IFLA_CAN_BERR_COUNTER,
IFLA_CAN_DATA_BITTIMING,
IFLA_CAN_DATA_BITTIMING_CONST,
IFLA_CAN_DATA_BITTIMING, /* FD */
IFLA_CAN_DATA_BITTIMING_CONST, /* FD */
IFLA_CAN_TERMINATION,
IFLA_CAN_TERMINATION_CONST,
IFLA_CAN_BITRATE_CONST,
IFLA_CAN_DATA_BITRATE_CONST,
IFLA_CAN_DATA_BITRATE_CONST, /* FD */
IFLA_CAN_BITRATE_MAX,
IFLA_CAN_TDC,
IFLA_CAN_TDC, /* FD */
IFLA_CAN_CTRLMODE_EXT,
IFLA_CAN_XL_DATA_BITTIMING,
IFLA_CAN_XL_DATA_BITTIMING_CONST,
IFLA_CAN_XL_DATA_BITRATE_CONST,
IFLA_CAN_XL_TDC,
IFLA_CAN_XL_PWM,
/* add new constants above here */
__IFLA_CAN_MAX,
@ -145,7 +156,7 @@ enum {
};
/*
* CAN FD Transmitter Delay Compensation (TDC)
* CAN FD/XL Transmitter Delay Compensation (TDC)
*
* Please refer to struct can_tdc_const and can_tdc in
* include/linux/can/bittiming.h for further details.
@ -179,6 +190,29 @@ enum {
IFLA_CAN_CTRLMODE_MAX = __IFLA_CAN_CTRLMODE - 1
};
/*
* CAN FD/XL Pulse-Width Modulation (PWM)
*
* Please refer to struct can_pwm_const and can_pwm in
* include/linux/can/bittiming.h for further details.
*/
enum {
IFLA_CAN_PWM_UNSPEC,
IFLA_CAN_PWM_PWMS_MIN, /* u32 */
IFLA_CAN_PWM_PWMS_MAX, /* u32 */
IFLA_CAN_PWM_PWML_MIN, /* u32 */
IFLA_CAN_PWM_PWML_MAX, /* u32 */
IFLA_CAN_PWM_PWMO_MIN, /* u32 */
IFLA_CAN_PWM_PWMO_MAX, /* u32 */
IFLA_CAN_PWM_PWMS, /* u32 */
IFLA_CAN_PWM_PWML, /* u32 */
IFLA_CAN_PWM_PWMO, /* u32 */
/* add new constants above here */
__IFLA_CAN_PWM,
IFLA_CAN_PWM_MAX = __IFLA_CAN_PWM - 1
};
/* u16 termination range: 1..65535 Ohms */
#define CAN_TERMINATION_DISABLED 0

2
lib/libc/include/any-linux-any/linux/comedi.h vendored
View file

@ -640,7 +640,7 @@ struct comedi_chaninfo {
/**
* struct comedi_rangeinfo - used to retrieve the range table for a channel
* @range_type: Encodes subdevice index (bits 27:24), channel index
* @range_type: Encodes subdevice index (bits 31:24), channel index
* (bits 23:16) and range table length (bits 15:0).
* @range_ptr: Pointer to array of @struct comedi_krange to be filled
* in with the range table for the channel or subdevice.

82
lib/libc/include/any-linux-any/linux/dev_energymodel.h vendored Normal file
View file

@ -0,0 +1,82 @@
/* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) */
/* Do not edit directly, auto-generated from: */
/* Documentation/netlink/specs/dev-energymodel.yaml */
/* YNL-GEN uapi header */
/* To regenerate run: tools/net/ynl/ynl-regen.sh */
#ifndef _LINUX_DEV_ENERGYMODEL_H
#define _LINUX_DEV_ENERGYMODEL_H
#define DEV_ENERGYMODEL_FAMILY_NAME "dev-energymodel"
#define DEV_ENERGYMODEL_FAMILY_VERSION 1
/**
* enum dev_energymodel_perf_state_flags
* @DEV_ENERGYMODEL_PERF_STATE_FLAGS_PERF_STATE_INEFFICIENT: The performance
* state is inefficient. There is in this perf-domain, another performance
* state with a higher frequency but a lower or equal power cost.
*/
enum dev_energymodel_perf_state_flags {
DEV_ENERGYMODEL_PERF_STATE_FLAGS_PERF_STATE_INEFFICIENT = 1,
};
/**
* enum dev_energymodel_perf_domain_flags
* @DEV_ENERGYMODEL_PERF_DOMAIN_FLAGS_PERF_DOMAIN_MICROWATTS: The power values
* are in micro-Watts or some other scale.
* @DEV_ENERGYMODEL_PERF_DOMAIN_FLAGS_PERF_DOMAIN_SKIP_INEFFICIENCIES: Skip
* inefficient states when estimating energy consumption.
* @DEV_ENERGYMODEL_PERF_DOMAIN_FLAGS_PERF_DOMAIN_ARTIFICIAL: The power values
* are artificial and might be created by platform missing real power
* information.
*/
enum dev_energymodel_perf_domain_flags {
DEV_ENERGYMODEL_PERF_DOMAIN_FLAGS_PERF_DOMAIN_MICROWATTS = 1,
DEV_ENERGYMODEL_PERF_DOMAIN_FLAGS_PERF_DOMAIN_SKIP_INEFFICIENCIES = 2,
DEV_ENERGYMODEL_PERF_DOMAIN_FLAGS_PERF_DOMAIN_ARTIFICIAL = 4,
};
enum {
DEV_ENERGYMODEL_A_PERF_DOMAIN_PAD = 1,
DEV_ENERGYMODEL_A_PERF_DOMAIN_PERF_DOMAIN_ID,
DEV_ENERGYMODEL_A_PERF_DOMAIN_FLAGS,
DEV_ENERGYMODEL_A_PERF_DOMAIN_CPUS,
__DEV_ENERGYMODEL_A_PERF_DOMAIN_MAX,
DEV_ENERGYMODEL_A_PERF_DOMAIN_MAX = (__DEV_ENERGYMODEL_A_PERF_DOMAIN_MAX - 1)
};
enum {
DEV_ENERGYMODEL_A_PERF_TABLE_PERF_DOMAIN_ID = 1,
DEV_ENERGYMODEL_A_PERF_TABLE_PERF_STATE,
__DEV_ENERGYMODEL_A_PERF_TABLE_MAX,
DEV_ENERGYMODEL_A_PERF_TABLE_MAX = (__DEV_ENERGYMODEL_A_PERF_TABLE_MAX - 1)
};
enum {
DEV_ENERGYMODEL_A_PERF_STATE_PAD = 1,
DEV_ENERGYMODEL_A_PERF_STATE_PERFORMANCE,
DEV_ENERGYMODEL_A_PERF_STATE_FREQUENCY,
DEV_ENERGYMODEL_A_PERF_STATE_POWER,
DEV_ENERGYMODEL_A_PERF_STATE_COST,
DEV_ENERGYMODEL_A_PERF_STATE_FLAGS,
__DEV_ENERGYMODEL_A_PERF_STATE_MAX,
DEV_ENERGYMODEL_A_PERF_STATE_MAX = (__DEV_ENERGYMODEL_A_PERF_STATE_MAX - 1)
};
enum {
DEV_ENERGYMODEL_CMD_GET_PERF_DOMAINS = 1,
DEV_ENERGYMODEL_CMD_GET_PERF_TABLE,
DEV_ENERGYMODEL_CMD_PERF_DOMAIN_CREATED,
DEV_ENERGYMODEL_CMD_PERF_DOMAIN_UPDATED,
DEV_ENERGYMODEL_CMD_PERF_DOMAIN_DELETED,
__DEV_ENERGYMODEL_CMD_MAX,
DEV_ENERGYMODEL_CMD_MAX = (__DEV_ENERGYMODEL_CMD_MAX - 1)
};
#define DEV_ENERGYMODEL_MCGRP_EVENT "event"
#endif /* _LINUX_DEV_ENERGYMODEL_H */

6
lib/libc/include/any-linux-any/linux/devlink.h vendored
View file

@ -181,6 +181,7 @@ enum devlink_sb_threshold_type {
enum devlink_eswitch_mode {
DEVLINK_ESWITCH_MODE_LEGACY,
DEVLINK_ESWITCH_MODE_SWITCHDEV,
DEVLINK_ESWITCH_MODE_SWITCHDEV_INACTIVE,
};
enum devlink_eswitch_inline_mode {
@ -636,6 +637,11 @@ enum devlink_attr {
DEVLINK_ATTR_RATE_TC_BWS, /* nested */
DEVLINK_ATTR_HEALTH_REPORTER_BURST_PERIOD, /* u64 */
DEVLINK_ATTR_PARAM_VALUE_DEFAULT, /* dynamic */
DEVLINK_ATTR_PARAM_RESET_DEFAULT, /* flag */
/* Add new attributes above here, update the spec in
* Documentation/netlink/specs/devlink.yaml and re-generate
* net/devlink/netlink_gen.c.

3
lib/libc/include/any-linux-any/linux/dpll.h vendored
View file

@ -2,6 +2,7 @@
/* Do not edit directly, auto-generated from: */
/* Documentation/netlink/specs/dpll.yaml */
/* YNL-GEN uapi header */
/* To regenerate run: tools/net/ynl/ynl-regen.sh */
#ifndef _LINUX_DPLL_H
#define _LINUX_DPLL_H
@ -216,6 +217,7 @@ enum dpll_a {
DPLL_A_LOCK_STATUS_ERROR,
DPLL_A_CLOCK_QUALITY_LEVEL,
DPLL_A_PHASE_OFFSET_MONITOR,
DPLL_A_PHASE_OFFSET_AVG_FACTOR,
__DPLL_A_MAX,
DPLL_A_MAX = (__DPLL_A_MAX - 1)
@ -250,6 +252,7 @@ enum dpll_a_pin {
DPLL_A_PIN_ESYNC_FREQUENCY_SUPPORTED,
DPLL_A_PIN_ESYNC_PULSE,
DPLL_A_PIN_REFERENCE_SYNC,
DPLL_A_PIN_PHASE_ADJUST_GRAN,
__DPLL_A_PIN_MAX,
DPLL_A_PIN_MAX = (__DPLL_A_PIN_MAX - 1)

6
lib/libc/include/any-linux-any/linux/ethtool.h vendored
View file

@ -2075,6 +2075,10 @@ enum ethtool_link_mode_bit_indices {
ETHTOOL_LINK_MODE_800000baseDR4_2_Full_BIT = 118,
ETHTOOL_LINK_MODE_800000baseSR4_Full_BIT = 119,
ETHTOOL_LINK_MODE_800000baseVR4_Full_BIT = 120,
ETHTOOL_LINK_MODE_1600000baseCR8_Full_BIT = 121,
ETHTOOL_LINK_MODE_1600000baseKR8_Full_BIT = 122,
ETHTOOL_LINK_MODE_1600000baseDR8_Full_BIT = 123,
ETHTOOL_LINK_MODE_1600000baseDR8_2_Full_BIT = 124,
/* must be last entry */
__ETHTOOL_LINK_MODE_MASK_NBITS
@ -2188,6 +2192,7 @@ enum ethtool_link_mode_bit_indices {
#define SPEED_200000 200000
#define SPEED_400000 400000
#define SPEED_800000 800000
#define SPEED_1600000 1600000
#define SPEED_UNKNOWN -1
@ -2378,6 +2383,7 @@ enum {
#define RXH_L4_B_0_1 (1 << 6) /* src port in case of TCP/UDP/SCTP */
#define RXH_L4_B_2_3 (1 << 7) /* dst port in case of TCP/UDP/SCTP */
#define RXH_GTP_TEID (1 << 8) /* teid in case of GTP */
#define RXH_IP6_FL (1 << 9) /* IPv6 flow label */
#define RXH_DISCARD (1 << 31)
#define RX_CLS_FLOW_DISC 0xffffffffffffffffULL

48
lib/libc/include/any-linux-any/linux/ethtool_netlink_generated.h vendored
View file

@ -2,6 +2,7 @@
/* Do not edit directly, auto-generated from: */
/* Documentation/netlink/specs/ethtool.yaml */
/* YNL-GEN uapi header */
/* To regenerate run: tools/net/ynl/ynl-regen.sh */
#ifndef _LINUX_ETHTOOL_NETLINK_GENERATED_H
#define _LINUX_ETHTOOL_NETLINK_GENERATED_H
@ -561,12 +562,24 @@ enum {
ETHTOOL_A_TUNNEL_INFO_MAX = (__ETHTOOL_A_TUNNEL_INFO_CNT - 1)
};
enum {
ETHTOOL_A_FEC_HIST_PAD = 1,
ETHTOOL_A_FEC_HIST_BIN_LOW,
ETHTOOL_A_FEC_HIST_BIN_HIGH,
ETHTOOL_A_FEC_HIST_BIN_VAL,
ETHTOOL_A_FEC_HIST_BIN_VAL_PER_LANE,
__ETHTOOL_A_FEC_HIST_CNT,
ETHTOOL_A_FEC_HIST_MAX = (__ETHTOOL_A_FEC_HIST_CNT - 1)
};
enum {
ETHTOOL_A_FEC_STAT_UNSPEC,
ETHTOOL_A_FEC_STAT_PAD,
ETHTOOL_A_FEC_STAT_CORRECTED,
ETHTOOL_A_FEC_STAT_UNCORR,
ETHTOOL_A_FEC_STAT_CORR_BITS,
ETHTOOL_A_FEC_STAT_HIST,
__ETHTOOL_A_FEC_STAT_CNT,
ETHTOOL_A_FEC_STAT_MAX = (__ETHTOOL_A_FEC_STAT_CNT - 1)
@ -791,6 +804,39 @@ enum {
ETHTOOL_A_PSE_NTF_MAX = (__ETHTOOL_A_PSE_NTF_CNT - 1)
};
enum {
ETHTOOL_A_MSE_CAPABILITIES_MAX_AVERAGE_MSE = 1,
ETHTOOL_A_MSE_CAPABILITIES_MAX_PEAK_MSE,
ETHTOOL_A_MSE_CAPABILITIES_REFRESH_RATE_PS,
ETHTOOL_A_MSE_CAPABILITIES_NUM_SYMBOLS,
__ETHTOOL_A_MSE_CAPABILITIES_CNT,
ETHTOOL_A_MSE_CAPABILITIES_MAX = (__ETHTOOL_A_MSE_CAPABILITIES_CNT - 1)
};
enum {
ETHTOOL_A_MSE_SNAPSHOT_AVERAGE_MSE = 1,
ETHTOOL_A_MSE_SNAPSHOT_PEAK_MSE,
ETHTOOL_A_MSE_SNAPSHOT_WORST_PEAK_MSE,
__ETHTOOL_A_MSE_SNAPSHOT_CNT,
ETHTOOL_A_MSE_SNAPSHOT_MAX = (__ETHTOOL_A_MSE_SNAPSHOT_CNT - 1)
};
enum {
ETHTOOL_A_MSE_HEADER = 1,
ETHTOOL_A_MSE_CAPABILITIES,
ETHTOOL_A_MSE_CHANNEL_A,
ETHTOOL_A_MSE_CHANNEL_B,
ETHTOOL_A_MSE_CHANNEL_C,
ETHTOOL_A_MSE_CHANNEL_D,
ETHTOOL_A_MSE_WORST_CHANNEL,
ETHTOOL_A_MSE_LINK,
__ETHTOOL_A_MSE_CNT,
ETHTOOL_A_MSE_MAX = (__ETHTOOL_A_MSE_CNT - 1)
};
enum {
ETHTOOL_MSG_USER_NONE = 0,
ETHTOOL_MSG_STRSET_GET = 1,
@ -843,6 +889,7 @@ enum {
ETHTOOL_MSG_RSS_SET,
ETHTOOL_MSG_RSS_CREATE_ACT,
ETHTOOL_MSG_RSS_DELETE_ACT,
ETHTOOL_MSG_MSE_GET,
__ETHTOOL_MSG_USER_CNT,
ETHTOOL_MSG_USER_MAX = (__ETHTOOL_MSG_USER_CNT - 1)
@ -903,6 +950,7 @@ enum {
ETHTOOL_MSG_RSS_CREATE_ACT_REPLY,
ETHTOOL_MSG_RSS_CREATE_NTF,
ETHTOOL_MSG_RSS_DELETE_NTF,
ETHTOOL_MSG_MSE_GET_REPLY,
__ETHTOOL_MSG_KERNEL_CNT,
ETHTOOL_MSG_KERNEL_MAX = (__ETHTOOL_MSG_KERNEL_CNT - 1)

53
lib/libc/include/any-linux-any/linux/ext4.h vendored
View file

@ -33,6 +33,8 @@
#define EXT4_IOC_CHECKPOINT _IOW('f', 43, __u32)
#define EXT4_IOC_GETFSUUID _IOR('f', 44, struct fsuuid)
#define EXT4_IOC_SETFSUUID _IOW('f', 44, struct fsuuid)
#define EXT4_IOC_GET_TUNE_SB_PARAM _IOR('f', 45, struct ext4_tune_sb_params)
#define EXT4_IOC_SET_TUNE_SB_PARAM _IOW('f', 46, struct ext4_tune_sb_params)
#define EXT4_IOC_SHUTDOWN _IOR('X', 125, __u32)
@ -108,6 +110,57 @@ struct ext4_new_group_input {
__u16 unused;
};
struct ext4_tune_sb_params {
__u32 set_flags;
__u32 checkinterval;
__u16 errors_behavior;
__u16 mnt_count;
__u16 max_mnt_count;
__u16 raid_stride;
__u64 last_check_time;
__u64 reserved_blocks;
__u64 blocks_count;
__u32 default_mnt_opts;
__u32 reserved_uid;
__u32 reserved_gid;
__u32 raid_stripe_width;
__u16 encoding;
__u16 encoding_flags;
__u8 def_hash_alg;
__u8 pad_1;
__u16 pad_2;
__u32 feature_compat;
__u32 feature_incompat;
__u32 feature_ro_compat;
__u32 set_feature_compat_mask;
__u32 set_feature_incompat_mask;
__u32 set_feature_ro_compat_mask;
__u32 clear_feature_compat_mask;
__u32 clear_feature_incompat_mask;
__u32 clear_feature_ro_compat_mask;
__u8 mount_opts[64];
__u8 pad[68];
};
#define EXT4_TUNE_FL_ERRORS_BEHAVIOR 0x00000001
#define EXT4_TUNE_FL_MNT_COUNT 0x00000002
#define EXT4_TUNE_FL_MAX_MNT_COUNT 0x00000004
#define EXT4_TUNE_FL_CHECKINTRVAL 0x00000008
#define EXT4_TUNE_FL_LAST_CHECK_TIME 0x00000010
#define EXT4_TUNE_FL_RESERVED_BLOCKS 0x00000020
#define EXT4_TUNE_FL_RESERVED_UID 0x00000040
#define EXT4_TUNE_FL_RESERVED_GID 0x00000080
#define EXT4_TUNE_FL_DEFAULT_MNT_OPTS 0x00000100
#define EXT4_TUNE_FL_DEF_HASH_ALG 0x00000200
#define EXT4_TUNE_FL_RAID_STRIDE 0x00000400
#define EXT4_TUNE_FL_RAID_STRIPE_WIDTH 0x00000800
#define EXT4_TUNE_FL_MOUNT_OPTS 0x00001000
#define EXT4_TUNE_FL_FEATURES 0x00002000
#define EXT4_TUNE_FL_EDIT_FEATURES 0x00004000
#define EXT4_TUNE_FL_FORCE_FSCK 0x00008000
#define EXT4_TUNE_FL_ENCODING 0x00010000
#define EXT4_TUNE_FL_ENCODING_FLAGS 0x00020000
/*
* Returned by EXT4_IOC_GET_ES_CACHE as an additional possible flag.
* It indicates that the entry in extent status cache is for a hole.

2
lib/libc/include/any-linux-any/linux/fb.h vendored
View file

@ -317,7 +317,7 @@ enum {
#define FB_VBLANK_HAVE_VCOUNT 0x020 /* the vcount field is valid */
#define FB_VBLANK_HAVE_HCOUNT 0x040 /* the hcount field is valid */
#define FB_VBLANK_VSYNCING 0x080 /* currently in a vsync */
#define FB_VBLANK_HAVE_VSYNC 0x100 /* verical syncs can be detected */
#define FB_VBLANK_HAVE_VSYNC 0x100 /* vertical syncs can be detected */
struct fb_vblank {
__u32 flags; /* FB_VBLANK flags */

13
lib/libc/include/any-linux-any/linux/fcntl.h vendored
View file

@ -4,6 +4,7 @@
#include <asm/fcntl.h>
#include <linux/openat2.h>
#include <linux/types.h>
#define F_SETLEASE (F_LINUX_SPECIFIC_BASE + 0)
#define F_GETLEASE (F_LINUX_SPECIFIC_BASE + 1)
@ -79,6 +80,17 @@
*/
#define RWF_WRITE_LIFE_NOT_SET RWH_WRITE_LIFE_NOT_SET
/* Set/Get delegations */
#define F_GETDELEG (F_LINUX_SPECIFIC_BASE + 15)
#define F_SETDELEG (F_LINUX_SPECIFIC_BASE + 16)
/* Argument structure for F_GETDELEG and F_SETDELEG */
struct delegation {
__u32 d_flags; /* Must be 0 */
__u16 d_type; /* F_RDLCK, F_WRLCK, F_UNLCK */
__u16 __pad; /* Must be 0 */
};
/*
* Types of directory notifications that may be requested.
*/
@ -111,6 +123,7 @@
#define PIDFD_SELF_THREAD_GROUP -10001 /* Current thread group leader. */
#define FD_PIDFS_ROOT -10002 /* Root of the pidfs filesystem */
#define FD_NSFS_ROOT -10003 /* Root of the nsfs filesystem */
#define FD_INVALID -10009 /* Invalid file descriptor: -10000 - EBADF = -10009 */
/* Generic flags for the *at(2) family of syscalls. */

1
lib/libc/include/any-linux-any/linux/fou.h vendored
View file

@ -2,6 +2,7 @@
/* Do not edit directly, auto-generated from: */
/* Documentation/netlink/specs/fou.yaml */
/* YNL-GEN uapi header */
/* To regenerate run: tools/net/ynl/ynl-regen.sh */
#ifndef _LINUX_FOU_H
#define _LINUX_FOU_H

8
lib/libc/include/any-linux-any/linux/fs.h vendored
View file

@ -294,8 +294,9 @@ struct file_attr {
#define BLKROTATIONAL _IO(0x12,126)
#define BLKZEROOUT _IO(0x12,127)
#define BLKGETDISKSEQ _IOR(0x12,128,__u64)
/* 130-136 are used by zoned block device ioctls (uapi/linux/blkzoned.h) */
/* 130-136 and 142 are used by zoned block device ioctls (uapi/linux/blkzoned.h) */
/* 137-141 are used by blk-crypto ioctls (uapi/linux/blk-crypto.h) */
#define BLKTRACESETUP2 _IOWR(0x12, 142, struct blk_user_trace_setup2)
#define BMAP_IOCTL 1 /* obsolete - kept for compatibility */
#define FIBMAP _IO(0x00,1) /* bmap access */
@ -426,10 +427,13 @@ typedef int __bitwise __kernel_rwf_t;
/* buffered IO that drops the cache after reading or writing data */
#define RWF_DONTCACHE ((__kernel_rwf_t)0x00000080)
/* prevent pipe and socket writes from raising SIGPIPE */
#define RWF_NOSIGNAL ((__kernel_rwf_t)0x00000100)
/* mask of flags supported by the kernel */
#define RWF_SUPPORTED (RWF_HIPRI | RWF_DSYNC | RWF_SYNC | RWF_NOWAIT |\
RWF_APPEND | RWF_NOAPPEND | RWF_ATOMIC |\
RWF_DONTCACHE)
RWF_DONTCACHE | RWF_NOSIGNAL)
#define PROCFS_IOCTL_MAGIC 'f'

22
lib/libc/include/any-linux-any/linux/fuse.h vendored
View file

@ -235,6 +235,11 @@
*
* 7.44
* - add FUSE_NOTIFY_INC_EPOCH
*
* 7.45
* - add FUSE_COPY_FILE_RANGE_64
* - add struct fuse_copy_file_range_out
* - add FUSE_NOTIFY_PRUNE
*/
#ifndef _LINUX_FUSE_H
@ -266,7 +271,7 @@
#define FUSE_KERNEL_VERSION 7
/** Minor version number of this interface */
#define FUSE_KERNEL_MINOR_VERSION 44
#define FUSE_KERNEL_MINOR_VERSION 45
/** The node ID of the root inode */
#define FUSE_ROOT_ID 1
@ -653,6 +658,7 @@ enum fuse_opcode {
FUSE_SYNCFS = 50,
FUSE_TMPFILE = 51,
FUSE_STATX = 52,
FUSE_COPY_FILE_RANGE_64 = 53,
/* CUSE specific operations */
CUSE_INIT = 4096,
@ -671,7 +677,7 @@ enum fuse_notify_code {
FUSE_NOTIFY_DELETE = 6,
FUSE_NOTIFY_RESEND = 7,
FUSE_NOTIFY_INC_EPOCH = 8,
FUSE_NOTIFY_CODE_MAX,
FUSE_NOTIFY_PRUNE = 9,
};
/* The read buffer is required to be at least 8k, but may be much larger */
@ -1110,6 +1116,12 @@ struct fuse_notify_retrieve_in {
uint64_t dummy4;
};
struct fuse_notify_prune_out {
uint32_t count;
uint32_t padding;
uint64_t spare;
};
struct fuse_backing_map {
int32_t fd;
uint32_t flags;
@ -1122,6 +1134,7 @@ struct fuse_backing_map {
#define FUSE_DEV_IOC_BACKING_OPEN _IOW(FUSE_DEV_IOC_MAGIC, 1, \
struct fuse_backing_map)
#define FUSE_DEV_IOC_BACKING_CLOSE _IOW(FUSE_DEV_IOC_MAGIC, 2, uint32_t)
#define FUSE_DEV_IOC_SYNC_INIT _IO(FUSE_DEV_IOC_MAGIC, 3)
struct fuse_lseek_in {
uint64_t fh;
@ -1144,6 +1157,11 @@ struct fuse_copy_file_range_in {
uint64_t flags;
};
/* For FUSE_COPY_FILE_RANGE_64 */
struct fuse_copy_file_range_out {
uint64_t bytes_copied;
};
#define FUSE_SETUPMAPPING_FLAG_WRITE (1ull << 0)
#define FUSE_SETUPMAPPING_FLAG_READ (1ull << 1)
struct fuse_setupmapping_in {

103
lib/libc/include/any-linux-any/linux/gpib.h vendored Normal file
View file

@ -0,0 +1,103 @@
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
/***************************************************************************
* copyright : (C) 2002 by Frank Mori Hess
***************************************************************************/
#ifndef _GPIB_H
#define _GPIB_H
#define GPIB_MAX_NUM_BOARDS 16
#define GPIB_MAX_NUM_DESCRIPTORS 0x1000
enum ibsta_bit_numbers {
DCAS_NUM = 0,
DTAS_NUM = 1,
LACS_NUM = 2,
TACS_NUM = 3,
ATN_NUM = 4,
CIC_NUM = 5,
REM_NUM = 6,
LOK_NUM = 7,
CMPL_NUM = 8,
EVENT_NUM = 9,
SPOLL_NUM = 10,
RQS_NUM = 11,
SRQI_NUM = 12,
END_NUM = 13,
TIMO_NUM = 14,
ERR_NUM = 15
};
/* IBSTA status bits (returned by all functions) */
enum ibsta_bits {
DCAS = (1 << DCAS_NUM), /* device clear state */
DTAS = (1 << DTAS_NUM), /* device trigger state */
LACS = (1 << LACS_NUM), /* GPIB interface is addressed as Listener */
TACS = (1 << TACS_NUM), /* GPIB interface is addressed as Talker */
ATN = (1 << ATN_NUM), /* Attention is asserted */
CIC = (1 << CIC_NUM), /* GPIB interface is Controller-in-Charge */
REM = (1 << REM_NUM), /* remote state */
LOK = (1 << LOK_NUM), /* lockout state */
CMPL = (1 << CMPL_NUM), /* I/O is complete */
EVENT = (1 << EVENT_NUM), /* DCAS, DTAS, or IFC has occurred */
SPOLL = (1 << SPOLL_NUM), /* board serial polled by busmaster */
RQS = (1 << RQS_NUM), /* Device requesting service */
SRQI = (1 << SRQI_NUM), /* SRQ is asserted */
END = (1 << END_NUM), /* EOI or EOS encountered */
TIMO = (1 << TIMO_NUM), /* Time limit on I/O or wait function exceeded */
ERR = (1 << ERR_NUM), /* Function call terminated on error */
device_status_mask = ERR | TIMO | END | CMPL | RQS,
board_status_mask = ERR | TIMO | END | CMPL | SPOLL |
EVENT | LOK | REM | CIC | ATN | TACS | LACS | DTAS | DCAS | SRQI,
};
/* End-of-string (EOS) modes for use with ibeos */
enum eos_flags {
EOS_MASK = 0x1c00,
REOS = 0x0400, /* Terminate reads on EOS */
XEOS = 0x800, /* assert EOI when EOS char is sent */
BIN = 0x1000 /* Do 8-bit compare on EOS */
};
/* GPIB Bus Control Lines bit vector */
enum bus_control_line {
VALID_DAV = 0x01,
VALID_NDAC = 0x02,
VALID_NRFD = 0x04,
VALID_IFC = 0x08,
VALID_REN = 0x10,
VALID_SRQ = 0x20,
VALID_ATN = 0x40,
VALID_EOI = 0x80,
VALID_ALL = 0xff,
BUS_DAV = 0x0100, /* DAV line status bit */
BUS_NDAC = 0x0200, /* NDAC line status bit */
BUS_NRFD = 0x0400, /* NRFD line status bit */
BUS_IFC = 0x0800, /* IFC line status bit */
BUS_REN = 0x1000, /* REN line status bit */
BUS_SRQ = 0x2000, /* SRQ line status bit */
BUS_ATN = 0x4000, /* ATN line status bit */
BUS_EOI = 0x8000 /* EOI line status bit */
};
enum ppe_bits {
PPC_DISABLE = 0x10,
PPC_SENSE = 0x8, /* parallel poll sense bit */
PPC_DIO_MASK = 0x7
};
enum {
request_service_bit = 0x40,
};
enum gpib_events {
EVENT_NONE = 0,
EVENT_DEV_TRG = 1,
EVENT_DEV_CLR = 2,
EVENT_IFC = 3
};
#endif /* _GPIB_H */

167
lib/libc/include/any-linux-any/linux/gpib_ioctl.h vendored Normal file
View file

@ -0,0 +1,167 @@
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
/***************************************************************************
* copyright : (C) 2002 by Frank Mori Hess
***************************************************************************/
#ifndef _GPIB_IOCTL_H
#define _GPIB_IOCTL_H
#include <asm/ioctl.h>
#include <linux/types.h>
#define GPIB_CODE 160
struct gpib_board_type_ioctl {
char name[100];
};
/* argument for read/write/command ioctls */
struct gpib_read_write_ioctl {
__u64 buffer_ptr;
__u32 requested_transfer_count;
__u32 completed_transfer_count;
__s32 end; /* end flag return for reads, end io suppression request for cmd*/
__s32 handle;
};
struct gpib_open_dev_ioctl {
__u32 handle;
__u32 pad;
__s32 sad;
__u32 is_board;
};
struct gpib_close_dev_ioctl {
__u32 handle;
};
struct gpib_serial_poll_ioctl {
__u32 pad;
__s32 sad;
__u8 status_byte;
__u8 padding[3]; /* align to 32 bit boundary */
};
struct gpib_eos_ioctl {
__s32 eos;
__s32 eos_flags;
};
struct gpib_wait_ioctl {
__s32 handle;
__s32 wait_mask;
__s32 clear_mask;
__s32 set_mask;
__s32 ibsta;
__s32 pad;
__s32 sad;
__u32 usec_timeout;
};
struct gpib_online_ioctl {
__u64 init_data_ptr;
__s32 init_data_length;
__s32 online;
};
struct gpib_spoll_bytes_ioctl {
__u32 num_bytes;
__u32 pad;
__s32 sad;
};
struct gpib_board_info_ioctl {
__u32 pad;
__s32 sad;
__s32 parallel_poll_configuration;
__s32 autopolling;
__s32 is_system_controller;
__u32 t1_delay;
unsigned ist : 1;
unsigned no_7_bit_eos : 1;
unsigned padding :30; /* align to 32 bit boundary */
};
struct gpib_select_pci_ioctl {
__s32 pci_bus;
__s32 pci_slot;
};
struct gpib_ppoll_config_ioctl {
__u8 config;
unsigned set_ist : 1;
unsigned clear_ist : 1;
unsigned padding :22; /* align to 32 bit boundary */
};
struct gpib_pad_ioctl {
__u32 handle;
__u32 pad;
};
struct gpib_sad_ioctl {
__u32 handle;
__s32 sad;
};
/* select a piece of hardware to attach by its sysfs device path */
struct gpib_select_device_path_ioctl {
char device_path[0x1000];
};
/* update status byte and request service */
struct gpib_request_service2 {
__u8 status_byte;
__u8 padding[3]; /* align to 32 bit boundary */
__s32 new_reason_for_service;
};
/* Standard functions. */
enum gpib_ioctl {
IBRD = _IOWR(GPIB_CODE, 100, struct gpib_read_write_ioctl),
IBWRT = _IOWR(GPIB_CODE, 101, struct gpib_read_write_ioctl),
IBCMD = _IOWR(GPIB_CODE, 102, struct gpib_read_write_ioctl),
IBOPENDEV = _IOWR(GPIB_CODE, 3, struct gpib_open_dev_ioctl),
IBCLOSEDEV = _IOW(GPIB_CODE, 4, struct gpib_close_dev_ioctl),
IBWAIT = _IOWR(GPIB_CODE, 5, struct gpib_wait_ioctl),
IBRPP = _IOWR(GPIB_CODE, 6, __u8),
IBSIC = _IOW(GPIB_CODE, 9, __u32),
IBSRE = _IOW(GPIB_CODE, 10, __s32),
IBGTS = _IO(GPIB_CODE, 11),
IBCAC = _IOW(GPIB_CODE, 12, __s32),
IBLINES = _IOR(GPIB_CODE, 14, __s16),
IBPAD = _IOW(GPIB_CODE, 15, struct gpib_pad_ioctl),
IBSAD = _IOW(GPIB_CODE, 16, struct gpib_sad_ioctl),
IBTMO = _IOW(GPIB_CODE, 17, __u32),
IBRSP = _IOWR(GPIB_CODE, 18, struct gpib_serial_poll_ioctl),
IBEOS = _IOW(GPIB_CODE, 19, struct gpib_eos_ioctl),
IBRSV = _IOW(GPIB_CODE, 20, __u8),
CFCBASE = _IOW(GPIB_CODE, 21, __u64),
CFCIRQ = _IOW(GPIB_CODE, 22, __u32),
CFCDMA = _IOW(GPIB_CODE, 23, __u32),
CFCBOARDTYPE = _IOW(GPIB_CODE, 24, struct gpib_board_type_ioctl),
IBMUTEX = _IOW(GPIB_CODE, 26, __s32),
IBSPOLL_BYTES = _IOWR(GPIB_CODE, 27, struct gpib_spoll_bytes_ioctl),
IBPPC = _IOW(GPIB_CODE, 28, struct gpib_ppoll_config_ioctl),
IBBOARD_INFO = _IOR(GPIB_CODE, 29, struct gpib_board_info_ioctl),
IBQUERY_BOARD_RSV = _IOR(GPIB_CODE, 31, __s32),
IBSELECT_PCI = _IOWR(GPIB_CODE, 32, struct gpib_select_pci_ioctl),
IBEVENT = _IOR(GPIB_CODE, 33, __s16),
IBRSC = _IOW(GPIB_CODE, 34, __s32),
IB_T1_DELAY = _IOW(GPIB_CODE, 35, __u32),
IBLOC = _IO(GPIB_CODE, 36),
IBAUTOSPOLL = _IOW(GPIB_CODE, 38, __s16),
IBONL = _IOW(GPIB_CODE, 39, struct gpib_online_ioctl),
IBPP2_SET = _IOW(GPIB_CODE, 40, __s16),
IBPP2_GET = _IOR(GPIB_CODE, 41, __s16),
IBSELECT_DEVICE_PATH = _IOW(GPIB_CODE, 43, struct gpib_select_device_path_ioctl),
/* 44 was IBSELECT_SERIAL_NUMBER */
IBRSV2 = _IOW(GPIB_CODE, 45, struct gpib_request_service2)
};
#endif /* _GPIB_IOCTL_H */

1
lib/libc/include/any-linux-any/linux/handshake.h vendored
View file

@ -2,6 +2,7 @@
/* Do not edit directly, auto-generated from: */
/* Documentation/netlink/specs/handshake.yaml */
/* YNL-GEN uapi header */
/* To regenerate run: tools/net/ynl/ynl-regen.sh */
#ifndef _LINUX_HANDSHAKE_H
#define _LINUX_HANDSHAKE_H

2
lib/libc/include/any-linux-any/linux/hidraw.h vendored
View file

@ -48,6 +48,8 @@ struct hidraw_devinfo {
#define HIDIOCGOUTPUT(len) _IOC(_IOC_WRITE|_IOC_READ, 'H', 0x0C, len)
#define HIDIOCREVOKE _IOW('H', 0x0D, int) /* Revoke device access */
#define HIDIOCTL_LAST _IOC_NR(HIDIOCREVOKE)
#define HIDRAW_FIRST_MINOR 0
#define HIDRAW_MAX_DEVICES 64
/* number of reports to buffer */

2
lib/libc/include/any-linux-any/linux/i2c.h vendored
View file

@ -36,7 +36,7 @@
*
* Only if I2C_FUNC_NOSTART is set:
* %I2C_M_NOSTART: skip repeated start sequence
*
* Only if I2C_FUNC_PROTOCOL_MANGLING is set:
* %I2C_M_NO_RD_ACK: in a read message, master ACK/NACK bit is skipped
* %I2C_M_IGNORE_NAK: treat NACK from client as ACK

2
lib/libc/include/any-linux-any/linux/i8k.h vendored
View file

@ -36,6 +36,8 @@
#define I8K_FAN_LOW 1
#define I8K_FAN_HIGH 2
#define I8K_FAN_TURBO 3
/* Many machines treat this mode as some sort of automatic mode */
#define I8K_FAN_AUTO 3
#define I8K_FAN_MAX I8K_FAN_TURBO
#define I8K_VOL_UP 1

3
lib/libc/include/any-linux-any/linux/if_bridge.h vendored
View file

@ -823,6 +823,8 @@ struct br_mcast_stats {
/* bridge boolean options
* BR_BOOLOPT_NO_LL_LEARN - disable learning from link-local packets
* BR_BOOLOPT_MCAST_VLAN_SNOOPING - control vlan multicast snooping
* BR_BOOLOPT_FDB_LOCAL_VLAN_0 - local FDB entries installed by the bridge
* driver itself should only be added on VLAN 0
*
* IMPORTANT: if adding a new option do not forget to handle
* it in br_boolopt_toggle/get and bridge sysfs
@ -832,6 +834,7 @@ enum br_boolopt_id {
BR_BOOLOPT_MCAST_VLAN_SNOOPING,
BR_BOOLOPT_MST_ENABLE,
BR_BOOLOPT_MDB_OFFLOAD_FAIL_NOTIFICATION,
BR_BOOLOPT_FDB_LOCAL_VLAN_0,
BR_BOOLOPT_MAX
};

4
lib/libc/include/any-linux-any/linux/if_ether.h vendored
View file

@ -92,6 +92,9 @@
#define ETH_P_ETHERCAT 0x88A4 /* EtherCAT */
#define ETH_P_8021AD 0x88A8 /* 802.1ad Service VLAN */
#define ETH_P_802_EX1 0x88B5 /* 802.1 Local Experimental 1. */
#define ETH_P_MXLGSW 0x88C3 /* Infineon Technologies Corporate Research ST
* Used by MaxLinear GSW DSA
*/
#define ETH_P_PREAUTH 0x88C7 /* 802.11 Preauthentication */
#define ETH_P_TIPC 0x88CA /* TIPC */
#define ETH_P_LLDP 0x88CC /* Link Layer Discovery Protocol */
@ -114,6 +117,7 @@
#define ETH_P_QINQ1 0x9100 /* deprecated QinQ VLAN [ NOT AN OFFICIALLY REGISTERED ID ] */
#define ETH_P_QINQ2 0x9200 /* deprecated QinQ VLAN [ NOT AN OFFICIALLY REGISTERED ID ] */
#define ETH_P_QINQ3 0x9300 /* deprecated QinQ VLAN [ NOT AN OFFICIALLY REGISTERED ID ] */
#define ETH_P_YT921X 0x9988 /* Motorcomm YT921x DSA [ NOT AN OFFICIALLY REGISTERED ID ] */
#define ETH_P_EDSA 0xDADA /* Ethertype DSA [ NOT AN OFFICIALLY REGISTERED ID ] */
#define ETH_P_DSA_8021Q 0xDADB /* Fake VLAN Header for DSA [ NOT AN OFFICIALLY REGISTERED ID ] */
#define ETH_P_DSA_A5PSW 0xE001 /* A5PSW Tag Value [ NOT AN OFFICIALLY REGISTERED ID ] */

3
lib/libc/include/any-linux-any/linux/if_link.h vendored
View file

@ -379,6 +379,8 @@ enum {
IFLA_DPLL_PIN,
IFLA_MAX_PACING_OFFLOAD_HORIZON,
IFLA_NETNS_IMMUTABLE,
IFLA_HEADROOM,
IFLA_TAILROOM,
__IFLA_MAX
};
@ -1562,6 +1564,7 @@ enum {
IFLA_BOND_SLAVE_AD_ACTOR_OPER_PORT_STATE,
IFLA_BOND_SLAVE_AD_PARTNER_OPER_PORT_STATE,
IFLA_BOND_SLAVE_PRIO,
IFLA_BOND_SLAVE_ACTOR_PORT_PRIO,
__IFLA_BOND_SLAVE_MAX,
};

1
lib/libc/include/any-linux-any/linux/if_team.h vendored
View file

@ -2,6 +2,7 @@
/* Do not edit directly, auto-generated from: */
/* Documentation/netlink/specs/team.yaml */
/* YNL-GEN uapi header */
/* To regenerate run: tools/net/ynl/ynl-regen.sh */
#ifndef _LINUX_IF_TEAM_H
#define _LINUX_IF_TEAM_H

5
lib/libc/include/any-linux-any/linux/iio/types.h vendored
View file

@ -52,6 +52,7 @@ enum iio_chan_type {
IIO_COLORTEMP,
IIO_CHROMATICITY,
IIO_ATTENTION,
IIO_ALTCURRENT,
};
enum iio_modifier {
@ -108,6 +109,10 @@ enum iio_modifier {
IIO_MOD_ROLL,
IIO_MOD_LIGHT_UVA,
IIO_MOD_LIGHT_UVB,
IIO_MOD_RMS,
IIO_MOD_ACTIVE,
IIO_MOD_REACTIVE,
IIO_MOD_APPARENT,
};
enum iio_event_type {

22
lib/libc/include/any-linux-any/linux/input-event-codes.h vendored
View file

@ -27,6 +27,7 @@
#define INPUT_PROP_TOPBUTTONPAD 0x04 /* softbuttons at top of pad */
#define INPUT_PROP_POINTING_STICK 0x05 /* is a pointing stick */
#define INPUT_PROP_ACCELEROMETER 0x06 /* has accelerometer */
#define INPUT_PROP_PRESSUREPAD 0x07 /* pressure triggers clicks */
#define INPUT_PROP_MAX 0x1f
#define INPUT_PROP_CNT (INPUT_PROP_MAX + 1)
@ -630,6 +631,18 @@
#define KEY_BRIGHTNESS_MIN 0x250 /* Set Brightness to Minimum */
#define KEY_BRIGHTNESS_MAX 0x251 /* Set Brightness to Maximum */
/*
* Keycodes for hotkeys toggling the electronic privacy screen found on some
* laptops on/off. Note when the embedded-controller turns on/off the eprivacy
* screen itself then the state should be reported through drm connecter props:
* https://www.kernel.org/doc/html/latest/gpu/drm-kms.html#standard-connector-properties
* Except when implementing the drm connecter properties API is not possible
* because e.g. the firmware does not allow querying the presence and/or status
* of the eprivacy screen at boot.
*/
#define KEY_EPRIVACY_SCREEN_ON 0x252
#define KEY_EPRIVACY_SCREEN_OFF 0x253
#define KEY_KBDINPUTASSIST_PREV 0x260
#define KEY_KBDINPUTASSIST_NEXT 0x261
#define KEY_KBDINPUTASSIST_PREVGROUP 0x262
@ -878,6 +891,7 @@
#define ABS_VOLUME 0x20
#define ABS_PROFILE 0x21
#define ABS_SND_PROFILE 0x22
#define ABS_MISC 0x28
@ -987,4 +1001,12 @@
#define SND_MAX 0x07
#define SND_CNT (SND_MAX+1)
/*
* ABS_SND_PROFILE values
*/
#define SND_PROFILE_SILENT 0x00
#define SND_PROFILE_VIBRATE 0x01
#define SND_PROFILE_RING 0x02
#endif

22
lib/libc/include/any-linux-any/linux/input.h vendored
View file

@ -427,6 +427,24 @@ struct ff_rumble_effect {
__u16 weak_magnitude;
};
/**
* struct ff_haptic_effect
* @hid_usage: hid_usage according to Haptics page (WAVEFORM_CLICK, etc.)
* @vendor_id: the waveform vendor ID if hid_usage is in the vendor-defined range
* @vendor_waveform_page: the vendor waveform page if hid_usage is in the vendor-defined range
* @intensity: strength of the effect as percentage
* @repeat_count: number of times to retrigger effect
* @retrigger_period: time before effect is retriggered (in ms)
*/
struct ff_haptic_effect {
__u16 hid_usage;
__u16 vendor_id;
__u8 vendor_waveform_page;
__u16 intensity;
__u16 repeat_count;
__u16 retrigger_period;
};
/**
* struct ff_effect - defines force feedback effect
* @type: type of the effect (FF_CONSTANT, FF_PERIODIC, FF_RAMP, FF_SPRING,
@ -463,6 +481,7 @@ struct ff_effect {
struct ff_periodic_effect periodic;
struct ff_condition_effect condition[2]; /* One for each axis */
struct ff_rumble_effect rumble;
struct ff_haptic_effect haptic;
} u;
};
@ -470,6 +489,7 @@ struct ff_effect {
* Force feedback effect types
*/
#define FF_HAPTIC 0x4f
#define FF_RUMBLE 0x50
#define FF_PERIODIC 0x51
#define FF_CONSTANT 0x52
@ -479,7 +499,7 @@ struct ff_effect {
#define FF_INERTIA 0x56
#define FF_RAMP 0x57
#define FF_EFFECT_MIN FF_RUMBLE
#define FF_EFFECT_MIN FF_HAPTIC
#define FF_EFFECT_MAX FF_RAMP
/*

71
lib/libc/include/any-linux-any/linux/io_uring.h vendored
View file

@ -225,6 +225,18 @@ enum io_uring_sqe_flags_bit {
/* Use hybrid poll in iopoll process */
#define IORING_SETUP_HYBRID_IOPOLL (1U << 17)
/*
* Allow both 16b and 32b CQEs. If a 32b CQE is posted, it will have
* IORING_CQE_F_32 set in cqe->flags.
*/
#define IORING_SETUP_CQE_MIXED (1U << 18)
/*
* Allow both 64b and 128b SQEs. If a 128b SQE is posted, it will have
* a 128b opcode.
*/
#define IORING_SETUP_SQE_MIXED (1U << 19)
enum io_uring_op {
IORING_OP_NOP,
IORING_OP_READV,
@ -289,6 +301,8 @@ enum io_uring_op {
IORING_OP_READV_FIXED,
IORING_OP_WRITEV_FIXED,
IORING_OP_PIPE,
IORING_OP_NOP128,
IORING_OP_URING_CMD128,
/* this goes last, obviously */
IORING_OP_LAST,
@ -298,9 +312,13 @@ enum io_uring_op {
* sqe->uring_cmd_flags top 8bits aren't available for userspace
* IORING_URING_CMD_FIXED use registered buffer; pass this flag
* along with setting sqe->buf_index.
* IORING_URING_CMD_MULTISHOT must be used with buffer select, like other
* multishot commands. Not compatible with
* IORING_URING_CMD_FIXED, for now.
*/
#define IORING_URING_CMD_FIXED (1U << 0)
#define IORING_URING_CMD_MASK IORING_URING_CMD_FIXED
#define IORING_URING_CMD_MULTISHOT (1U << 1)
#define IORING_URING_CMD_MASK (IORING_URING_CMD_FIXED | IORING_URING_CMD_MULTISHOT)
/*
@ -394,7 +412,7 @@ enum io_uring_op {
* will be contiguous from the starting buffer ID.
*
* IORING_SEND_VECTORIZED If set, SEND[_ZC] will take a pointer to a io_vec
* to allow vectorized send operations.
* to allow vectorized send operations.
*/
#define IORING_RECVSEND_POLL_FIRST (1U << 0)
#define IORING_RECV_MULTISHOT (1U << 1)
@ -454,6 +472,7 @@ enum io_uring_msg_ring_flags {
#define IORING_NOP_FIXED_FILE (1U << 2)
#define IORING_NOP_FIXED_BUFFER (1U << 3)
#define IORING_NOP_TW (1U << 4)
#define IORING_NOP_CQE32 (1U << 5)
/*
* IO completion data structure (Completion Queue Entry)
@ -487,12 +506,22 @@ struct io_uring_cqe {
* other provided buffer type, all completions with a
* buffer passed back is automatically returned to the
* application.
* IORING_CQE_F_SKIP If set, then the application/liburing must ignore this
* CQE. It's only purpose is to fill a gap in the ring,
* if a large CQE is attempted posted when the ring has
* just a single small CQE worth of space left before
* wrapping.
* IORING_CQE_F_32 If set, this is a 32b/big-cqe posting. Use with rings
* setup in a mixed CQE mode, where both 16b and 32b
* CQEs may be posted to the CQ ring.
*/
#define IORING_CQE_F_BUFFER (1U << 0)
#define IORING_CQE_F_MORE (1U << 1)
#define IORING_CQE_F_SOCK_NONEMPTY (1U << 2)
#define IORING_CQE_F_NOTIF (1U << 3)
#define IORING_CQE_F_BUF_MORE (1U << 4)
#define IORING_CQE_F_SKIP (1U << 5)
#define IORING_CQE_F_32 (1U << 15)
#define IORING_CQE_BUFFER_SHIFT 16
@ -665,6 +694,12 @@ enum io_uring_register_op {
IORING_REGISTER_MEM_REGION = 34,
/* query various aspects of io_uring, see linux/io_uring/query.h */
IORING_REGISTER_QUERY = 35,
/* auxiliary zcrx configuration, see enum zcrx_ctrl_op */
IORING_REGISTER_ZCRX_CTRL = 36,
/* this goes last */
IORING_REGISTER_LAST,
@ -974,6 +1009,7 @@ enum io_uring_socket_op {
SOCKET_URING_OP_GETSOCKOPT,
SOCKET_URING_OP_SETSOCKOPT,
SOCKET_URING_OP_TX_TIMESTAMP,
SOCKET_URING_OP_GETSOCKNAME,
};
/*
@ -1028,6 +1064,10 @@ struct io_uring_zcrx_area_reg {
__u64 __resv2[2];
};
enum zcrx_reg_flags {
ZCRX_REG_IMPORT = 1,
};
/*
* Argument for IORING_REGISTER_ZCRX_IFQ
*/
@ -1046,6 +1086,33 @@ struct io_uring_zcrx_ifq_reg {
__u64 __resv[3];
};
enum zcrx_ctrl_op {
ZCRX_CTRL_FLUSH_RQ,
ZCRX_CTRL_EXPORT,
__ZCRX_CTRL_LAST,
};
struct zcrx_ctrl_flush_rq {
__u64 __resv[6];
};
struct zcrx_ctrl_export {
__u32 zcrx_fd;
__u32 __resv1[11];
};
struct zcrx_ctrl {
__u32 zcrx_id;
__u32 op; /* see enum zcrx_ctrl_op */
__u64 __resv[2];
union {
struct zcrx_ctrl_export zc_export;
struct zcrx_ctrl_flush_rq zc_flush;
};
};
#ifdef __cplusplus
}
#endif

68
lib/libc/include/any-linux-any/linux/io_uring/query.h vendored Normal file
View file

@ -0,0 +1,68 @@
/* SPDX-License-Identifier: (GPL-2.0 WITH Linux-syscall-note) OR MIT */
/*
* Header file for the io_uring query interface.
*/
#ifndef LINUX_IO_URING_QUERY_H
#define LINUX_IO_URING_QUERY_H
#include <linux/types.h>
struct io_uring_query_hdr {
__u64 next_entry;
__u64 query_data;
__u32 query_op;
__u32 size;
__s32 result;
__u32 __resv[3];
};
enum {
IO_URING_QUERY_OPCODES = 0,
IO_URING_QUERY_ZCRX = 1,
IO_URING_QUERY_SCQ = 2,
__IO_URING_QUERY_MAX,
};
/* Doesn't require a ring */
struct io_uring_query_opcode {
/* The number of supported IORING_OP_* opcodes */
__u32 nr_request_opcodes;
/* The number of supported IORING_[UN]REGISTER_* opcodes */
__u32 nr_register_opcodes;
/* Bitmask of all supported IORING_FEAT_* flags */
__u64 feature_flags;
/* Bitmask of all supported IORING_SETUP_* flags */
__u64 ring_setup_flags;
/* Bitmask of all supported IORING_ENTER_** flags */
__u64 enter_flags;
/* Bitmask of all supported IOSQE_* flags */
__u64 sqe_flags;
/* The number of available query opcodes */
__u32 nr_query_opcodes;
__u32 __pad;
};
struct io_uring_query_zcrx {
/* Bitmask of supported ZCRX_REG_* flags, */
__u64 register_flags;
/* Bitmask of all supported IORING_ZCRX_AREA_* flags */
__u64 area_flags;
/* The number of supported ZCRX_CTRL_* opcodes */
__u32 nr_ctrl_opcodes;
__u32 __resv1;
/* The refill ring header size */
__u32 rq_hdr_size;
/* The alignment for the header */
__u32 rq_hdr_alignment;
__u64 __resv2;
};
struct io_uring_query_scq {
/* The SQ/CQ rings header size */
__u64 hdr_size;
/* The alignment for the header */
__u64 hdr_alignment;
};
#endif

10
lib/libc/include/any-linux-any/linux/iommufd.h vendored
View file

@ -450,6 +450,16 @@ struct iommu_hwpt_vtd_s1 {
* nested domain will translate the same as the nesting parent. The S1 will
* install a Context Descriptor Table pointing at userspace memory translated
* by the nesting parent.
*
* It's suggested to allocate a vDEVICE object carrying vSID and then re-attach
* the nested domain, as soon as the vSID is available in the VMM level:
*
* - when Cfg=translate, a vDEVICE must be allocated prior to attaching to the
* allocated nested domain, as CD/ATS invalidations and vevents need a vSID.
* - when Cfg=bypass/abort, a vDEVICE is not enforced during the nested domain
* attachment, to support a GBPA case where VM sets CR0.SMMUEN=0. However, if
* VM sets CR0.SMMUEN=1 while missing a vDEVICE object, kernel would fail to
* report events to the VM. E.g. F_TRANSLATION when guest STE.Cfg=abort.
*/
struct iommu_hwpt_arm_smmuv3 {
__aligned_le64 ste[2];

50
lib/libc/include/any-linux-any/linux/isst_if.h vendored
View file

@ -52,7 +52,7 @@ struct isst_if_cpu_map {
/**
* struct isst_if_cpu_maps - structure for CPU map IOCTL
* @cmd_count: Number of CPU mapping command in cpu_map[]
* @cpu_map[]: Holds one or more CPU map data structure
* @cpu_map: Holds one or more CPU map data structure
*
* This structure used with ioctl ISST_IF_GET_PHY_ID to send
* one or more CPU mapping commands. Here IOCTL return value indicates
@ -82,8 +82,8 @@ struct isst_if_io_reg {
/**
* struct isst_if_io_regs - structure for IO register commands
* @cmd_count: Number of io reg commands in io_reg[]
* @io_reg[]: Holds one or more io_reg command structure
* @req_count: Number of io reg commands in io_reg[]
* @io_reg: Holds one or more io_reg command structure
*
* This structure used with ioctl ISST_IF_IO_CMD to send
* one or more read/write commands to PUNIT. Here IOCTL return value
@ -120,7 +120,7 @@ struct isst_if_mbox_cmd {
/**
* struct isst_if_mbox_cmds - structure for mailbox commands
* @cmd_count: Number of mailbox commands in mbox_cmd[]
* @mbox_cmd[]: Holds one or more mbox commands
* @mbox_cmd: Holds one or more mbox commands
*
* This structure used with ioctl ISST_IF_MBOX_COMMAND to send
* one or more mailbox commands to PUNIT. Here IOCTL return value
@ -152,7 +152,7 @@ struct isst_if_msr_cmd {
/**
* struct isst_if_msr_cmds - structure for msr commands
* @cmd_count: Number of mailbox commands in msr_cmd[]
* @msr_cmd[]: Holds one or more msr commands
* @msr_cmd: Holds one or more msr commands
*
* This structure used with ioctl ISST_IF_MSR_COMMAND to send
* one or more MSR commands. IOCTL return value indicates number of
@ -167,8 +167,9 @@ struct isst_if_msr_cmds {
* struct isst_core_power - Structure to get/set core_power feature
* @get_set: 0: Get, 1: Set
* @socket_id: Socket/package id
* @power_domain: Power Domain id
* @power_domain_id: Power Domain id
* @enable: Feature enable status
* @supported: Power domain supports SST_CP interface
* @priority_type: Priority type for the feature (ordered/proportional)
*
* Structure to get/set core_power feature state using IOCTL
@ -187,11 +188,11 @@ struct isst_core_power {
* struct isst_clos_param - Structure to get/set clos praram
* @get_set: 0: Get, 1: Set
* @socket_id: Socket/package id
* @power_domain: Power Domain id
* clos: Clos ID for the parameters
* min_freq_mhz: Minimum frequency in MHz
* max_freq_mhz: Maximum frequency in MHz
* prop_prio: Proportional priority from 0-15
* @power_domain_id: Power Domain id
* @clos: Clos ID for the parameters
* @min_freq_mhz: Minimum frequency in MHz
* @max_freq_mhz: Maximum frequency in MHz
* @prop_prio: Proportional priority from 0-15
*
* Structure to get/set per clos property using IOCTL
* ISST_IF_CLOS_PARAM.
@ -209,7 +210,7 @@ struct isst_clos_param {
/**
* struct isst_if_clos_assoc - Structure to assign clos to a CPU
* @socket_id: Socket/package id
* @power_domain: Power Domain id
* @power_domain_id: Power Domain id
* @logical_cpu: CPU number
* @clos: Clos ID to assign to the logical CPU
*
@ -228,6 +229,7 @@ struct isst_if_clos_assoc {
* @get_set: Request is for get or set
* @punit_cpu_map: Set to 1 if the CPU number is punit numbering not
* Linux CPU number
* @assoc_info: CLOS data for this CPU
*
* Structure used to get/set associate CPUs to clos using IOCTL
* ISST_IF_CLOS_ASSOC.
@ -257,7 +259,7 @@ struct isst_tpmi_instance_count {
/**
* struct isst_perf_level_info - Structure to get information on SST-PP levels
* @socket_id: Socket/package id
* @power_domain: Power Domain id
* @power_domain_id: Power Domain id
* @logical_cpu: CPU number
* @clos: Clos ID to assign to the logical CPU
* @max_level: Maximum performance level supported by the platform
@ -267,8 +269,8 @@ struct isst_tpmi_instance_count {
* @feature_state: SST-BF and SST-TF (enabled/disabled) status at current level
* @locked: SST-PP performance level change is locked/unlocked
* @enabled: SST-PP feature is enabled or not
* @sst-tf_support: SST-TF support status at this level
* @sst-bf_support: SST-BF support status at this level
* @sst_tf_support: SST-TF support status at this level
* @sst_bf_support: SST-BF support status at this level
*
* Structure to get SST-PP details using IOCTL ISST_IF_PERF_LEVELS.
*/
@ -289,7 +291,7 @@ struct isst_perf_level_info {
/**
* struct isst_perf_level_control - Structure to set SST-PP level
* @socket_id: Socket/package id
* @power_domain: Power Domain id
* @power_domain_id: Power Domain id
* @level: level to set
*
* Structure used change SST-PP level using IOCTL ISST_IF_PERF_SET_LEVEL.
@ -303,7 +305,7 @@ struct isst_perf_level_control {
/**
* struct isst_perf_feature_control - Structure to activate SST-BF/SST-TF
* @socket_id: Socket/package id
* @power_domain: Power Domain id
* @power_domain_id: Power Domain id
* @feature: bit 0 = SST-BF state, bit 1 = SST-TF state
*
* Structure used to enable SST-BF/SST-TF using IOCTL ISST_IF_PERF_SET_FEATURE.
@ -320,7 +322,7 @@ struct isst_perf_feature_control {
/**
* struct isst_perf_level_data_info - Structure to get SST-PP level details
* @socket_id: Socket/package id
* @power_domain: Power Domain id
* @power_domain_id: Power Domain id
* @level: SST-PP level for which caller wants to get information
* @tdp_ratio: TDP Ratio
* @base_freq_mhz: Base frequency in MHz
@ -341,8 +343,8 @@ struct isst_perf_feature_control {
* @pm_fabric_freq_mhz: Fabric (Uncore) minimum frequency
* @max_buckets: Maximum trl buckets
* @max_trl_levels: Maximum trl levels
* @bucket_core_counts[TRL_MAX_BUCKETS]: Number of cores per bucket
* @trl_freq_mhz[TRL_MAX_LEVELS][TRL_MAX_BUCKETS]: maximum frequency
* @bucket_core_counts: Number of cores per bucket
* @trl_freq_mhz: maximum frequency
* for a bucket and trl level
*
* Structure used to get information on frequencies and TDP for a SST-PP
@ -402,7 +404,7 @@ struct isst_perf_level_fabric_info {
/**
* struct isst_perf_level_cpu_mask - Structure to get SST-PP level CPU mask
* @socket_id: Socket/package id
* @power_domain: Power Domain id
* @power_domain_id: Power Domain id
* @level: SST-PP level for which caller wants to get information
* @punit_cpu_map: Set to 1 if the CPU number is punit numbering not
* Linux CPU number. If 0 CPU buffer is copied to user space
@ -430,7 +432,7 @@ struct isst_perf_level_cpu_mask {
/**
* struct isst_base_freq_info - Structure to get SST-BF frequencies
* @socket_id: Socket/package id
* @power_domain: Power Domain id
* @power_domain_id: Power Domain id
* @level: SST-PP level for which caller wants to get information
* @high_base_freq_mhz: High priority CPU base frequency
* @low_base_freq_mhz: Low priority CPU base frequency
@ -453,9 +455,11 @@ struct isst_base_freq_info {
/**
* struct isst_turbo_freq_info - Structure to get SST-TF frequencies
* @socket_id: Socket/package id
* @power_domain: Power Domain id
* @power_domain_id: Power Domain id
* @level: SST-PP level for which caller wants to get information
* @max_clip_freqs: Maximum number of low priority core clipping frequencies
* @max_buckets: Maximum trl buckets
* @max_trl_levels: Maximum trl levels
* @lp_clip_freq_mhz: Clip frequencies per trl level
* @bucket_core_counts: Maximum number of cores for a bucket
* @trl_freq_mhz: Frequencies per trl level for each bucket

2
lib/libc/include/any-linux-any/linux/ivtv.h vendored
View file

@ -2,7 +2,7 @@
/*
Public ivtv API header
Copyright (C) 2003-2004 Kevin Thayer <nufan_wfk at yahoo.com>
Copyright (C) 2004-2007 Hans Verkuil <hverkuil@xs4all.nl>
Copyright (C) 2004-2007 Hans Verkuil <hverkuil@kernel.org>
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by

4
lib/libc/include/any-linux-any/linux/kexec.h vendored
View file

@ -22,12 +22,16 @@
* KEXEC_FILE_ON_CRASH : Load/unload operation belongs to kdump image.
* KEXEC_FILE_NO_INITRAMFS : No initramfs is being loaded. Ignore the initrd
* fd field.
* KEXEC_FILE_FORCE_DTB : Force carrying over the current boot's DTB to the new
* kernel on x86. This is already the default behavior on
* some other architectures, like ARM64 and PowerPC.
*/
#define KEXEC_FILE_UNLOAD 0x00000001
#define KEXEC_FILE_ON_CRASH 0x00000002
#define KEXEC_FILE_NO_INITRAMFS 0x00000004
#define KEXEC_FILE_DEBUG 0x00000008
#define KEXEC_FILE_NO_CMA 0x00000010
#define KEXEC_FILE_FORCE_DTB 0x00000020
/* These values match the ELF architecture values.
* Unless there is a good reason that should continue to be the case.

4
lib/libc/include/any-linux-any/linux/kfd_ioctl.h vendored
View file

@ -67,8 +67,8 @@ struct kfd_ioctl_get_version_args {
struct kfd_ioctl_create_queue_args {
__u64 ring_base_address; /* to KFD */
__u64 write_pointer_address; /* from KFD */
__u64 read_pointer_address; /* from KFD */
__u64 write_pointer_address; /* to KFD */
__u64 read_pointer_address; /* to KFD */
__u64 doorbell_offset; /* from KFD */
__u32 ring_size; /* to KFD */

14
lib/libc/include/any-linux-any/linux/kvm.h vendored
View file

@ -179,6 +179,7 @@ struct kvm_xen_exit {
#define KVM_EXIT_LOONGARCH_IOCSR 38
#define KVM_EXIT_MEMORY_FAULT 39
#define KVM_EXIT_TDX 40
#define KVM_EXIT_ARM_SEA 41
/* For KVM_EXIT_INTERNAL_ERROR */
/* Emulate instruction failed. */
@ -465,6 +466,14 @@ struct kvm_run {
} setup_event_notify;
};
} tdx;
/* KVM_EXIT_ARM_SEA */
struct {
#define KVM_EXIT_ARM_SEA_FLAG_GPA_VALID (1ULL << 0)
__u64 flags;
__u64 esr;
__u64 gva;
__u64 gpa;
} arm_sea;
/* Fix the size of the union. */
char padding[256];
};
@ -954,6 +963,9 @@ struct kvm_enable_cap {
#define KVM_CAP_ARM_EL2_E2H0 241
#define KVM_CAP_RISCV_MP_STATE_RESET 242
#define KVM_CAP_ARM_CACHEABLE_PFNMAP_SUPPORTED 243
#define KVM_CAP_GUEST_MEMFD_FLAGS 244
#define KVM_CAP_ARM_SEA_TO_USER 245
#define KVM_CAP_S390_USER_OPEREXEC 246
struct kvm_irq_routing_irqchip {
__u32 irqchip;
@ -1590,6 +1602,8 @@ struct kvm_memory_attributes {
#define KVM_MEMORY_ATTRIBUTE_PRIVATE (1ULL << 3)
#define KVM_CREATE_GUEST_MEMFD _IOWR(KVMIO, 0xd4, struct kvm_create_guest_memfd)
#define GUEST_MEMFD_FLAG_MMAP (1ULL << 0)
#define GUEST_MEMFD_FLAG_INIT_SHARED (1ULL << 1)
struct kvm_create_guest_memfd {
__u64 size;

37
lib/libc/include/any-linux-any/linux/landlock.h vendored
View file

@ -216,6 +216,23 @@ struct landlock_net_port_attr {
* :manpage:`ftruncate(2)`, :manpage:`creat(2)`, or :manpage:`open(2)` with
* ``O_TRUNC``. This access right is available since the third version of the
* Landlock ABI.
* - %LANDLOCK_ACCESS_FS_IOCTL_DEV: Invoke :manpage:`ioctl(2)` commands on an opened
* character or block device.
*
* This access right applies to all `ioctl(2)` commands implemented by device
* drivers. However, the following common IOCTL commands continue to be
* invokable independent of the %LANDLOCK_ACCESS_FS_IOCTL_DEV right:
*
* * IOCTL commands targeting file descriptors (``FIOCLEX``, ``FIONCLEX``),
* * IOCTL commands targeting file descriptions (``FIONBIO``, ``FIOASYNC``),
* * IOCTL commands targeting file systems (``FIFREEZE``, ``FITHAW``,
* ``FIGETBSZ``, ``FS_IOC_GETFSUUID``, ``FS_IOC_GETFSSYSFSPATH``)
* * Some IOCTL commands which do not make sense when used with devices, but
* whose implementations are safe and return the right error codes
* (``FS_IOC_FIEMAP``, ``FICLONE``, ``FICLONERANGE``, ``FIDEDUPERANGE``)
*
* This access right is available since the fifth version of the Landlock
* ABI.
*
* Whether an opened file can be truncated with :manpage:`ftruncate(2)` or used
* with `ioctl(2)` is determined during :manpage:`open(2)`, in the same way as
@ -275,26 +292,6 @@ struct landlock_net_port_attr {
* If multiple requirements are not met, the ``EACCES`` error code takes
* precedence over ``EXDEV``.
*
* The following access right applies both to files and directories:
*
* - %LANDLOCK_ACCESS_FS_IOCTL_DEV: Invoke :manpage:`ioctl(2)` commands on an opened
* character or block device.
*
* This access right applies to all `ioctl(2)` commands implemented by device
* drivers. However, the following common IOCTL commands continue to be
* invokable independent of the %LANDLOCK_ACCESS_FS_IOCTL_DEV right:
*
* * IOCTL commands targeting file descriptors (``FIOCLEX``, ``FIONCLEX``),
* * IOCTL commands targeting file descriptions (``FIONBIO``, ``FIOASYNC``),
* * IOCTL commands targeting file systems (``FIFREEZE``, ``FITHAW``,
* ``FIGETBSZ``, ``FS_IOC_GETFSUUID``, ``FS_IOC_GETFSSYSFSPATH``)
* * Some IOCTL commands which do not make sense when used with devices, but
* whose implementations are safe and return the right error codes
* (``FS_IOC_FIEMAP``, ``FICLONE``, ``FICLONERANGE``, ``FIDEDUPERANGE``)
*
* This access right is available since the fifth version of the Landlock
* ABI.
*
* .. warning::
*
* It is currently not possible to restrict some file-related actions

216
lib/libc/include/any-linux-any/linux/liveupdate.h vendored Normal file
View file

@ -0,0 +1,216 @@
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
/*
* Userspace interface for /dev/liveupdate
* Live Update Orchestrator
*
* Copyright (c) 2025, Google LLC.
* Pasha Tatashin <pasha.tatashin@soleen.com>
*/
#ifndef _LIVEUPDATE_H
#define _LIVEUPDATE_H
#include <linux/ioctl.h>
#include <linux/types.h>
/**
* DOC: General ioctl format
*
* The ioctl interface follows a general format to allow for extensibility. Each
* ioctl is passed in a structure pointer as the argument providing the size of
* the structure in the first u32. The kernel checks that any structure space
* beyond what it understands is 0. This allows userspace to use the backward
* compatible portion while consistently using the newer, larger, structures.
*
* ioctls use a standard meaning for common errnos:
*
* - ENOTTY: The IOCTL number itself is not supported at all
* - E2BIG: The IOCTL number is supported, but the provided structure has
* non-zero in a part the kernel does not understand.
* - EOPNOTSUPP: The IOCTL number is supported, and the structure is
* understood, however a known field has a value the kernel does not
* understand or support.
* - EINVAL: Everything about the IOCTL was understood, but a field is not
* correct.
* - ENOENT: A provided token does not exist.
* - ENOMEM: Out of memory.
* - EOVERFLOW: Mathematics overflowed.
*
* As well as additional errnos, within specific ioctls.
*/
/* The ioctl type, documented in ioctl-number.rst */
#define LIVEUPDATE_IOCTL_TYPE 0xBA
/* The maximum length of session name including null termination */
#define LIVEUPDATE_SESSION_NAME_LENGTH 64
/* The /dev/liveupdate ioctl commands */
enum {
LIVEUPDATE_CMD_BASE = 0x00,
LIVEUPDATE_CMD_CREATE_SESSION = LIVEUPDATE_CMD_BASE,
LIVEUPDATE_CMD_RETRIEVE_SESSION = 0x01,
};
/* ioctl commands for session file descriptors */
enum {
LIVEUPDATE_CMD_SESSION_BASE = 0x40,
LIVEUPDATE_CMD_SESSION_PRESERVE_FD = LIVEUPDATE_CMD_SESSION_BASE,
LIVEUPDATE_CMD_SESSION_RETRIEVE_FD = 0x41,
LIVEUPDATE_CMD_SESSION_FINISH = 0x42,
};
/**
* struct liveupdate_ioctl_create_session - ioctl(LIVEUPDATE_IOCTL_CREATE_SESSION)
* @size: Input; sizeof(struct liveupdate_ioctl_create_session)
* @fd: Output; The new file descriptor for the created session.
* @name: Input; A null-terminated string for the session name, max
* length %LIVEUPDATE_SESSION_NAME_LENGTH including termination
* character.
*
* Creates a new live update session for managing preserved resources.
* This ioctl can only be called on the main /dev/liveupdate device.
*
* Return: 0 on success, negative error code on failure.
*/
struct liveupdate_ioctl_create_session {
__u32 size;
__s32 fd;
__u8 name[LIVEUPDATE_SESSION_NAME_LENGTH];
};
#define LIVEUPDATE_IOCTL_CREATE_SESSION \
_IO(LIVEUPDATE_IOCTL_TYPE, LIVEUPDATE_CMD_CREATE_SESSION)
/**
* struct liveupdate_ioctl_retrieve_session - ioctl(LIVEUPDATE_IOCTL_RETRIEVE_SESSION)
* @size: Input; sizeof(struct liveupdate_ioctl_retrieve_session)
* @fd: Output; The new file descriptor for the retrieved session.
* @name: Input; A null-terminated string identifying the session to retrieve.
* The name must exactly match the name used when the session was
* created in the previous kernel.
*
* Retrieves a handle (a new file descriptor) for a preserved session by its
* name. This is the primary mechanism for a userspace agent to regain control
* of its preserved resources after a live update.
*
* The userspace application provides the null-terminated `name` of a session
* it created before the live update. If a preserved session with a matching
* name is found, the kernel instantiates it and returns a new file descriptor
* in the `fd` field. This new session FD can then be used for all file-specific
* operations, such as restoring individual file descriptors with
* LIVEUPDATE_SESSION_RETRIEVE_FD.
*
* It is the responsibility of the userspace application to know the names of
* the sessions it needs to retrieve. If no session with the given name is
* found, the ioctl will fail with -ENOENT.
*
* This ioctl can only be called on the main /dev/liveupdate device when the
* system is in the LIVEUPDATE_STATE_UPDATED state.
*/
struct liveupdate_ioctl_retrieve_session {
__u32 size;
__s32 fd;
__u8 name[LIVEUPDATE_SESSION_NAME_LENGTH];
};
#define LIVEUPDATE_IOCTL_RETRIEVE_SESSION \
_IO(LIVEUPDATE_IOCTL_TYPE, LIVEUPDATE_CMD_RETRIEVE_SESSION)
/* Session specific IOCTLs */
/**
* struct liveupdate_session_preserve_fd - ioctl(LIVEUPDATE_SESSION_PRESERVE_FD)
* @size: Input; sizeof(struct liveupdate_session_preserve_fd)
* @fd: Input; The user-space file descriptor to be preserved.
* @token: Input; An opaque, unique token for preserved resource.
*
* Holds parameters for preserving a file descriptor.
*
* User sets the @fd field identifying the file descriptor to preserve
* (e.g., memfd, kvm, iommufd, VFIO). The kernel validates if this FD type
* and its dependencies are supported for preservation. If validation passes,
* the kernel marks the FD internally and *initiates the process* of preparing
* its state for saving. The actual snapshotting of the state typically occurs
* during the subsequent %LIVEUPDATE_IOCTL_PREPARE execution phase, though
* some finalization might occur during freeze.
* On successful validation and initiation, the kernel uses the @token
* field with an opaque identifier representing the resource being preserved.
* This token confirms the FD is targeted for preservation and is required for
* the subsequent %LIVEUPDATE_SESSION_RETRIEVE_FD call after the live update.
*
* Return: 0 on success (validation passed, preservation initiated), negative
* error code on failure (e.g., unsupported FD type, dependency issue,
* validation failed).
*/
struct liveupdate_session_preserve_fd {
__u32 size;
__s32 fd;
__aligned_u64 token;
};
#define LIVEUPDATE_SESSION_PRESERVE_FD \
_IO(LIVEUPDATE_IOCTL_TYPE, LIVEUPDATE_CMD_SESSION_PRESERVE_FD)
/**
* struct liveupdate_session_retrieve_fd - ioctl(LIVEUPDATE_SESSION_RETRIEVE_FD)
* @size: Input; sizeof(struct liveupdate_session_retrieve_fd)
* @fd: Output; The new file descriptor representing the fully restored
* kernel resource.
* @token: Input; An opaque, token that was used to preserve the resource.
*
* Retrieve a previously preserved file descriptor.
*
* User sets the @token field to the value obtained from a successful
* %LIVEUPDATE_IOCTL_FD_PRESERVE call before the live update. On success,
* the kernel restores the state (saved during the PREPARE/FREEZE phases)
* associated with the token and populates the @fd field with a new file
* descriptor referencing the restored resource in the current (new) kernel.
* This operation must be performed *before* signaling completion via
* %LIVEUPDATE_IOCTL_FINISH.
*
* Return: 0 on success, negative error code on failure (e.g., invalid token).
*/
struct liveupdate_session_retrieve_fd {
__u32 size;
__s32 fd;
__aligned_u64 token;
};
#define LIVEUPDATE_SESSION_RETRIEVE_FD \
_IO(LIVEUPDATE_IOCTL_TYPE, LIVEUPDATE_CMD_SESSION_RETRIEVE_FD)
/**
* struct liveupdate_session_finish - ioctl(LIVEUPDATE_SESSION_FINISH)
* @size: Input; sizeof(struct liveupdate_session_finish)
* @reserved: Input; Must be zero. Reserved for future use.
*
* Signals the completion of the restoration process for a retrieved session.
* This is the final operation that should be performed on a session file
* descriptor after a live update.
*
* This ioctl must be called once all required file descriptors for the session
* have been successfully retrieved (using %LIVEUPDATE_SESSION_RETRIEVE_FD) and
* are fully restored from the userspace and kernel perspective.
*
* Upon success, the kernel releases its ownership of the preserved resources
* associated with this session. This allows internal resources to be freed,
* typically by decrementing reference counts on the underlying preserved
* objects.
*
* If this operation fails, the resources remain preserved in memory. Userspace
* may attempt to call finish again. The resources will otherwise be reset
* during the next live update cycle.
*
* Return: 0 on success, negative error code on failure.
*/
struct liveupdate_session_finish {
__u32 size;
__u32 reserved;
};
#define LIVEUPDATE_SESSION_FINISH \
_IO(LIVEUPDATE_IOCTL_TYPE, LIVEUPDATE_CMD_SESSION_FINISH)
#endif /* _LIVEUPDATE_H */

1
lib/libc/include/any-linux-any/linux/lockd_netlink.h vendored
View file

@ -2,6 +2,7 @@
/* Do not edit directly, auto-generated from: */
/* Documentation/netlink/specs/lockd.yaml */
/* YNL-GEN uapi header */
/* To regenerate run: tools/net/ynl/ynl-regen.sh */
#ifndef _LINUX_LOCKD_NETLINK_H
#define _LINUX_LOCKD_NETLINK_H

1
lib/libc/include/any-linux-any/linux/magic.h vendored
View file

@ -103,5 +103,6 @@
#define DEVMEM_MAGIC 0x454d444d /* "DMEM" */
#define SECRETMEM_MAGIC 0x5345434d /* "SECM" */
#define PID_FS_MAGIC 0x50494446 /* "PIDF" */
#define GUEST_MEMFD_MAGIC 0x474d454d /* "GMEM" */
#endif /* __LINUX_MAGIC_H__ */

35
lib/libc/include/any-linux-any/linux/map_benchmark.h vendored Normal file
View file

@ -0,0 +1,35 @@
/* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */
/*
* Copyright (C) 2022-2025 HiSilicon Limited.
*/
#ifndef _DMA_BENCHMARK_H
#define _DMA_BENCHMARK_H
#include <linux/types.h>
#define DMA_MAP_BENCHMARK _IOWR('d', 1, struct map_benchmark)
#define DMA_MAP_MAX_THREADS 1024
#define DMA_MAP_MAX_SECONDS 300
#define DMA_MAP_MAX_TRANS_DELAY (10 * NSEC_PER_MSEC)
#define DMA_MAP_BIDIRECTIONAL 0
#define DMA_MAP_TO_DEVICE 1
#define DMA_MAP_FROM_DEVICE 2
struct map_benchmark {
__u64 avg_map_100ns; /* average map latency in 100ns */
__u64 map_stddev; /* standard deviation of map latency */
__u64 avg_unmap_100ns; /* as above */
__u64 unmap_stddev;
__u32 threads; /* how many threads will do map/unmap in parallel */
__u32 seconds; /* how long the test will last */
__s32 node; /* which numa node this benchmark will run on */
__u32 dma_bits; /* DMA addressing capability */
__u32 dma_dir; /* DMA data direction */
__u32 dma_trans_ns; /* time for DMA transmission in ns */
__u32 granule; /* how many PAGE_SIZE will do map/unmap once a time */
__u8 expansion[76]; /* For future use */
};
#endif /* _DMA_BENCHMARK_H */

23
lib/libc/include/any-linux-any/linux/mdio.h vendored
View file

@ -116,10 +116,24 @@
#define MDIO_CTRL1_SPEED10G (MDIO_CTRL1_SPEEDSELEXT | 0x00)
/* 10PASS-TS/2BASE-TL */
#define MDIO_CTRL1_SPEED10P2B (MDIO_CTRL1_SPEEDSELEXT | 0x04)
/* Note: the MDIO_CTRL1_SPEED_XXX values for everything past 10PASS-TS/2BASE-TL
* do not match between the PCS and PMA values. Any additions past this point
* should be PMA or PCS specific. The following 2 defines are workarounds for
* values added before this was caught. They should be considered deprecated.
*/
#define MDIO_CTRL1_SPEED2_5G MDIO_PMA_CTRL1_SPEED2_5G
#define MDIO_CTRL1_SPEED5G MDIO_PMA_CTRL1_SPEED5G
/* 100 Gb/s */
#define MDIO_PCS_CTRL1_SPEED100G (MDIO_CTRL1_SPEEDSELEXT | 0x10)
/* 25 Gb/s */
#define MDIO_PCS_CTRL1_SPEED25G (MDIO_CTRL1_SPEEDSELEXT | 0x14)
/* 50 Gb/s */
#define MDIO_PCS_CTRL1_SPEED50G (MDIO_CTRL1_SPEEDSELEXT | 0x18)
/* 2.5 Gb/s */
#define MDIO_CTRL1_SPEED2_5G (MDIO_CTRL1_SPEEDSELEXT | 0x18)
#define MDIO_PMA_CTRL1_SPEED2_5G (MDIO_CTRL1_SPEEDSELEXT | 0x18)
/* 5 Gb/s */
#define MDIO_CTRL1_SPEED5G (MDIO_CTRL1_SPEEDSELEXT | 0x1c)
#define MDIO_PMA_CTRL1_SPEED5G (MDIO_CTRL1_SPEEDSELEXT | 0x1c)
/* Status register 1. */
#define MDIO_STAT1_LPOWERABLE 0x0002 /* Low-power ability */
@ -133,6 +147,11 @@
#define MDIO_AN_STAT1_PAGE 0x0040 /* Page received */
#define MDIO_AN_STAT1_XNP 0x0080 /* Extended next page status */
/* Device Identifier 2 */
#define MDIO_DEVID2_OUI 0xfc00 /* OUI Portion of PHY ID */
#define MDIO_DEVID2_MODEL_NUM 0x03f0 /* Manufacturer's Model Number */
#define MDIO_DEVID2_REV_NUM 0x000f /* Revision Number */
/* Speed register. */
#define MDIO_SPEED_10G 0x0001 /* 10G capable */
#define MDIO_PMA_SPEED_2B 0x0002 /* 2BASE-TL capable */

9
lib/libc/include/any-linux-any/linux/media-bus-format.h vendored
View file

@ -34,7 +34,7 @@
#define MEDIA_BUS_FMT_FIXED 0x0001
/* RGB - next is 0x1028 */
/* RGB - next is 0x1029 */
#define MEDIA_BUS_FMT_RGB444_1X12 0x1016
#define MEDIA_BUS_FMT_RGB444_2X8_PADHI_BE 0x1001
#define MEDIA_BUS_FMT_RGB444_2X8_PADHI_LE 0x1002
@ -74,6 +74,7 @@
#define MEDIA_BUS_FMT_RGB888_1X36_CPADLO 0x1021
#define MEDIA_BUS_FMT_RGB121212_1X36 0x1019
#define MEDIA_BUS_FMT_RGB161616_1X48 0x101a
#define MEDIA_BUS_FMT_RGB202020_1X60 0x1028
/* YUV (including grey) - next is 0x202f */
#define MEDIA_BUS_FMT_Y8_1X8 0x2001
@ -123,7 +124,7 @@
#define MEDIA_BUS_FMT_YUV16_1X48 0x202a
#define MEDIA_BUS_FMT_UYYVYY16_0_5X48 0x202b
/* Bayer - next is 0x3021 */
/* Bayer - next is 0x3025 */
#define MEDIA_BUS_FMT_SBGGR8_1X8 0x3001
#define MEDIA_BUS_FMT_SGBRG8_1X8 0x3013
#define MEDIA_BUS_FMT_SGRBG8_1X8 0x3002
@ -156,6 +157,10 @@
#define MEDIA_BUS_FMT_SGBRG16_1X16 0x301e
#define MEDIA_BUS_FMT_SGRBG16_1X16 0x301f
#define MEDIA_BUS_FMT_SRGGB16_1X16 0x3020
#define MEDIA_BUS_FMT_SBGGR20_1X20 0x3021
#define MEDIA_BUS_FMT_SGBRG20_1X20 0x3022
#define MEDIA_BUS_FMT_SGRBG20_1X20 0x3023
#define MEDIA_BUS_FMT_SRGGB20_1X20 0x3024
/* JPEG compressed formats - next is 0x4002 */
#define MEDIA_BUS_FMT_JPEG_1X8 0x4001

84
lib/libc/include/any-linux-any/linux/media/amlogic/c3-isp-config.h vendored
View file

@ -8,6 +8,8 @@
#include <linux/types.h>
#include <linux/media/v4l2-isp.h>
/*
* Frames are split into zones of almost equal width and height - a zone is a
* rectangular tile of a frame. The metering blocks within the ISP collect
@ -141,7 +143,7 @@ struct c3_isp_stats_info {
* @C3_ISP_PARAMS_BUFFER_V0: First version of C3 ISP parameters block
*/
enum c3_isp_params_buffer_version {
C3_ISP_PARAMS_BUFFER_V0,
C3_ISP_PARAMS_BUFFER_V0 = V4L2_ISP_PARAMS_VERSION_V0,
};
/**
@ -176,62 +178,23 @@ enum c3_isp_params_block_type {
C3_ISP_PARAMS_BLOCK_SENTINEL
};
#define C3_ISP_PARAMS_BLOCK_FL_DISABLE (1U << 0)
#define C3_ISP_PARAMS_BLOCK_FL_ENABLE (1U << 1)
/* For backward compatibility */
#define C3_ISP_PARAMS_BLOCK_FL_DISABLE V4L2_ISP_PARAMS_FL_BLOCK_DISABLE
#define C3_ISP_PARAMS_BLOCK_FL_ENABLE V4L2_ISP_PARAMS_FL_BLOCK_ENABLE
/**
* struct c3_isp_params_block_header - C3 ISP parameter block header
* c3_isp_params_block_header - C3 ISP parameter block header
*
* This structure represents the common part of all the ISP configuration
* blocks. Each parameters block shall embed an instance of this structure type
* as its first member, followed by the block-specific configuration data. The
* driver inspects this common header to discern the block type and its size and
* properly handle the block content by casting it to the correct block-specific
* type.
* blocks and is identical to :c:type:`v4l2_isp_params_block_header`.
*
* The @type field is one of the values enumerated by
* The type field is one of the values enumerated by
* :c:type:`c3_isp_params_block_type` and specifies how the data should be
* interpreted by the driver. The @size field specifies the size of the
* parameters block and is used by the driver for validation purposes. The
* @flags field is a bitmask of per-block flags C3_ISP_PARAMS_FL*.
* interpreted by the driver.
*
* When userspace wants to disable an ISP block the
* C3_ISP_PARAMS_BLOCK_FL_DISABLED bit should be set in the @flags field. In
* this case userspace may optionally omit the remainder of the configuration
* block, which will be ignored by the driver.
*
* When a new configuration of an ISP block needs to be applied userspace
* shall fully populate the ISP block and omit setting the
* C3_ISP_PARAMS_BLOCK_FL_DISABLED bit in the @flags field.
*
* Userspace is responsible for correctly populating the parameters block header
* fields (@type, @flags and @size) and the block-specific parameters.
*
* For example:
*
* .. code-block:: c
*
* void populate_pst_gamma(struct c3_isp_params_block_header *block) {
* struct c3_isp_params_pst_gamma *gamma =
* (struct c3_isp_params_pst_gamma *)block;
*
* gamma->header.type = C3_ISP_PARAMS_BLOCK_PST_GAMMA;
* gamma->header.flags = C3_ISP_PARAMS_BLOCK_FL_ENABLE;
* gamma->header.size = sizeof(*gamma);
*
* for (unsigned int i = 0; i < 129; i++)
* gamma->pst_gamma_lut[i] = i;
* }
*
* @type: The parameters block type from :c:type:`c3_isp_params_block_type`
* @flags: A bitmask of block flags
* @size: Size (in bytes) of the parameters block, including this header
* The flags field is a bitmask of per-block flags C3_ISP_PARAMS_FL_*.
*/
struct c3_isp_params_block_header {
__u16 type;
__u16 flags;
__u32 size;
};
#define c3_isp_params_block_header v4l2_isp_params_block_header
/**
* struct c3_isp_params_awb_gains - Gains for auto-white balance
@ -498,26 +461,10 @@ struct c3_isp_params_blc {
/**
* struct c3_isp_params_cfg - C3 ISP configuration parameters
*
* This struct contains the configuration parameters of the C3 ISP
* algorithms, serialized by userspace into an opaque data buffer. Each
* configuration parameter block is represented by a block-specific structure
* which contains a :c:type:`c3_isp_param_block_header` entry as first
* member. Userspace populates the @data buffer with configuration parameters
* for the blocks that it intends to configure. As a consequence, the data
* buffer effective size changes according to the number of ISP blocks that
* userspace intends to configure.
* This is the driver-specific implementation of
* :c:type:`v4l2_isp_params_buffer`.
*
* The parameters buffer is versioned by the @version field to allow modifying
* and extending its definition. Userspace should populate the @version field to
* inform the driver about the version it intends to use. The driver will parse
* and handle the @data buffer according to the data layout specific to the
* indicated revision and return an error if the desired revision is not
* supported.
*
* For each ISP block that userspace wants to configure, a block-specific
* structure is appended to the @data buffer, one after the other without gaps
* in between nor overlaps. Userspace shall populate the @total_size field with
* the effective size, in bytes, of the @data buffer.
* Currently only C3_ISP_PARAM_BUFFER_V0 is supported.
*
* The expected memory layout of the parameters buffer is::
*
@ -561,4 +508,5 @@ struct c3_isp_params_cfg {
__u8 data[C3_ISP_PARAMS_MAX_SIZE];
};
#endif

785
lib/libc/include/any-linux-any/linux/media/arm/mali-c55-config.h vendored Normal file
View file

@ -0,0 +1,785 @@
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
/*
* ARM Mali-C55 ISP Driver - Userspace API
*
* Copyright (C) 2023 Ideas on Board Oy
*/
#ifndef __UAPI_MALI_C55_CONFIG_H
#define __UAPI_MALI_C55_CONFIG_H
#include <linux/types.h>
#include <linux/v4l2-controls.h>
#include <linux/media/v4l2-isp.h>
#define V4L2_CID_MALI_C55_CAPABILITIES (V4L2_CID_USER_MALI_C55_BASE + 0x0)
#define MALI_C55_GPS_PONG (1U << 0)
#define MALI_C55_GPS_WDR (1U << 1)
#define MALI_C55_GPS_COMPRESSION (1U << 2)
#define MALI_C55_GPS_TEMPER (1U << 3)
#define MALI_C55_GPS_SINTER_LITE (1U << 4)
#define MALI_C55_GPS_SINTER (1U << 5)
#define MALI_C55_GPS_IRIDIX_LTM (1U << 6)
#define MALI_C55_GPS_IRIDIX_GTM (1U << 7)
#define MALI_C55_GPS_CNR (1U << 8)
#define MALI_C55_GPS_FRSCALER (1U << 9)
#define MALI_C55_GPS_DS_PIPE (1U << 10)
/*
* Frames are split into zones of almost equal width and height - a zone is a
* rectangular tile of a frame. The metering blocks within the ISP collect
* aggregated statistics per zone. A maximum of 15x15 zones can be configured,
* and so the statistics buffer within the hardware is sized to accommodate
* that.
*
* The utilised number of zones is runtime configurable.
*/
#define MALI_C55_MAX_ZONES (15 * 15)
/**
* struct mali_c55_ae_1024bin_hist - Auto Exposure 1024-bin histogram statistics
*
* @bins: 1024 element array of 16-bit pixel counts.
*
* The 1024-bin histogram module collects image-global but zone-weighted
* intensity distributions of pixels in fixed-width bins. The modules can be
* configured into different "plane modes" which affect the contents of the
* collected statistics. In plane mode 0, pixel intensities are taken regardless
* of colour plane into a single 1024-bin histogram with a bin width of 4. In
* plane mode 1, four 256-bin histograms with a bin width of 16 are collected -
* one for each CFA colour plane. In plane modes 4, 5, 6 and 7 two 512-bin
* histograms with a bin width of 8 are collected - in each mode one of the
* colour planes is collected into the first histogram and all the others are
* combined into the second. The histograms are stored consecutively in the bins
* array.
*
* The 16-bit pixel counts are stored as a 4-bit exponent in the most
* significant bits followed by a 12-bit mantissa. Conversion to a usable
* format can be done according to the following pseudo-code::
*
* if (e == 0) {
* bin = m * 2;
* } else {
* bin = (m + 4096) * 2^e
* }
*
* where
* e is the exponent value in range 0..15
* m is the mantissa value in range 0..4095
*
* The pixels used in calculating the statistics can be masked using three
* methods:
*
* 1. Pixels can be skipped in X and Y directions independently.
* 2. Minimum/Maximum intensities can be configured
* 3. Zones can be differentially weighted, including 0 weighted to mask them
*
* The data for this histogram can be collected from different tap points in the
* ISP depending on configuration - after the white balance or digital gain
* blocks, or immediately after the input crossbar.
*/
struct mali_c55_ae_1024bin_hist {
__u16 bins[1024];
} __attribute__((packed));
/**
* struct mali_c55_ae_5bin_hist - Auto Exposure 5-bin histogram statistics
*
* @hist0: 16-bit normalised pixel count for the 0th intensity bin
* @hist1: 16-bit normalised pixel count for the 1st intensity bin
* @hist3: 16-bit normalised pixel count for the 3rd intensity bin
* @hist4: 16-bit normalised pixel count for the 4th intensity bin
*
* The ISP generates a 5-bin histogram of normalised pixel counts within bins of
* pixel intensity for each of 225 possible zones within a frame. The centre bin
* of the histogram for each zone is not available from the hardware and must be
* calculated by subtracting the values of hist0, hist1, hist3 and hist4 from
* 0xffff as in the following equation:
*
* hist2 = 0xffff - (hist0 + hist1 + hist3 + hist4)
*/
struct mali_c55_ae_5bin_hist {
__u16 hist0;
__u16 hist1;
__u16 hist3;
__u16 hist4;
} __attribute__((packed));
/**
* struct mali_c55_awb_average_ratios - Auto White Balance colour ratios
*
* @avg_rg_gr: Average R/G or G/R ratio in Q4.8 format.
* @avg_bg_br: Average B/G or B/R ratio in Q4.8 format.
* @num_pixels: The number of pixels used in the AWB calculation
*
* The ISP calculates and collects average colour ratios for each zone in an
* image and stores them in Q4.8 format (the lowest 8 bits are fractional, with
* bits [11:8] representing the integer). The exact ratios collected (either
* R/G, B/G or G/R, B/R) are configurable through the parameters buffer. The
* value of the 4 high bits is undefined.
*/
struct mali_c55_awb_average_ratios {
__u16 avg_rg_gr;
__u16 avg_bg_br;
__u32 num_pixels;
} __attribute__((packed));
/**
* struct mali_c55_af_statistics - Auto Focus edge and intensity statistics
*
* @intensity_stats: Packed mantissa and exponent value for pixel intensity
* @edge_stats: Packed mantissa and exponent values for edge intensity
*
* The ISP collects the squared sum of pixel intensities for each zone within a
* configurable Region of Interest on the frame. Additionally, the same data are
* collected after being passed through a bandpass filter which removes high and
* low frequency components - these are referred to as the edge statistics.
*
* The intensity and edge statistics for a zone can be used to calculate the
* contrast information for a zone
*
* C = E2 / I2
*
* Where I2 is the intensity statistic for a zone and E2 is the edge statistic
* for that zone. Optimum focus is reached when C is at its maximum.
*
* The intensity and edge statistics are stored packed into a non-standard 16
* bit floating point format, where the 7 most significant bits represent the
* exponent and the 9 least significant bits the mantissa. This format can be
* unpacked with the following pseudocode::
*
* if (e == 0) {
* x = m;
* } else {
* x = 2^e-1 * (m + 2^9)
* }
*
* where
* e is the exponent value in range 0..127
* m is the mantissa value in range 0..511
*/
struct mali_c55_af_statistics {
__u16 intensity_stats;
__u16 edge_stats;
} __attribute__((packed));
/**
* struct mali_c55_stats_buffer - 3A statistics for the mali-c55 ISP
*
* @ae_1024bin_hist: 1024-bin frame-global pixel intensity histogram
* @iridix_1024bin_hist: Post-Iridix block 1024-bin histogram
* @ae_5bin_hists: 5-bin pixel intensity histograms for AEC
* @reserved1: Undefined buffer space
* @awb_ratios: Color balance ratios for Auto White Balance
* @reserved2: Undefined buffer space
* @af_statistics: Pixel intensity statistics for Auto Focus
* @reserved3: Undefined buffer space
*
* This struct describes the metering statistics space in the Mali-C55 ISP's
* hardware in its entirety. The space between each defined area is marked as
* "unknown" and may not be 0, but should not be used. The @ae_5bin_hists,
* @awb_ratios and @af_statistics members are arrays of statistics per-zone.
* The zones are arranged in the array in raster order starting from the top
* left corner of the image.
*/
struct mali_c55_stats_buffer {
struct mali_c55_ae_1024bin_hist ae_1024bin_hist;
struct mali_c55_ae_1024bin_hist iridix_1024bin_hist;
struct mali_c55_ae_5bin_hist ae_5bin_hists[MALI_C55_MAX_ZONES];
__u32 reserved1[14];
struct mali_c55_awb_average_ratios awb_ratios[MALI_C55_MAX_ZONES];
__u32 reserved2[14];
struct mali_c55_af_statistics af_statistics[MALI_C55_MAX_ZONES];
__u32 reserved3[15];
} __attribute__((packed));
/**
* enum mali_c55_param_block_type - Enumeration of Mali-C55 parameter blocks
*
* This enumeration defines the types of Mali-C55 parameters block. Each block
* configures a specific processing block of the Mali-C55 ISP. The block
* type allows the driver to correctly interpret the parameters block data.
*
* It is the responsibility of userspace to correctly set the type of each
* parameters block.
*
* @MALI_C55_PARAM_BLOCK_SENSOR_OFFS: Sensor pre-shading black level offset
* @MALI_C55_PARAM_BLOCK_AEXP_HIST: Auto-exposure 1024-bin histogram
* configuration
* @MALI_C55_PARAM_BLOCK_AEXP_IHIST: Post-Iridix auto-exposure 1024-bin
* histogram configuration
* @MALI_C55_PARAM_BLOCK_AEXP_HIST_WEIGHTS: Auto-exposure 1024-bin histogram
* weighting
* @MALI_C55_PARAM_BLOCK_AEXP_IHIST_WEIGHTS: Post-Iridix auto-exposure 1024-bin
* histogram weighting
* @MALI_C55_PARAM_BLOCK_DIGITAL_GAIN: Digital gain
* @MALI_C55_PARAM_BLOCK_AWB_GAINS: Auto-white balance gains
* @MALI_C55_PARAM_BLOCK_AWB_CONFIG: Auto-white balance statistics config
* @MALI_C55_PARAM_BLOCK_AWB_GAINS_AEXP: Auto-white balance gains for AEXP-0 tap
* @MALI_C55_PARAM_MESH_SHADING_CONFIG : Mesh shading tables configuration
* @MALI_C55_PARAM_MESH_SHADING_SELECTION: Mesh shading table selection
*/
enum mali_c55_param_block_type {
MALI_C55_PARAM_BLOCK_SENSOR_OFFS,
MALI_C55_PARAM_BLOCK_AEXP_HIST,
MALI_C55_PARAM_BLOCK_AEXP_IHIST,
MALI_C55_PARAM_BLOCK_AEXP_HIST_WEIGHTS,
MALI_C55_PARAM_BLOCK_AEXP_IHIST_WEIGHTS,
MALI_C55_PARAM_BLOCK_DIGITAL_GAIN,
MALI_C55_PARAM_BLOCK_AWB_GAINS,
MALI_C55_PARAM_BLOCK_AWB_CONFIG,
MALI_C55_PARAM_BLOCK_AWB_GAINS_AEXP,
MALI_C55_PARAM_MESH_SHADING_CONFIG,
MALI_C55_PARAM_MESH_SHADING_SELECTION,
};
/**
* struct mali_c55_params_sensor_off_preshading - offset subtraction for each
* color channel
*
* Provides removal of the sensor black level from the sensor data. Separate
* offsets are provided for each of the four Bayer component color channels
* which are defaulted to R, Gr, Gb, B.
*
* header.type should be set to MALI_C55_PARAM_BLOCK_SENSOR_OFFS from
* :c:type:`mali_c55_param_block_type` for this block.
*
* @header: The Mali-C55 parameters block header
* @chan00: Offset for color channel 00 (default: R)
* @chan01: Offset for color channel 01 (default: Gr)
* @chan10: Offset for color channel 10 (default: Gb)
* @chan11: Offset for color channel 11 (default: B)
*/
struct mali_c55_params_sensor_off_preshading {
struct v4l2_isp_params_block_header header;
__u32 chan00;
__u32 chan01;
__u32 chan10;
__u32 chan11;
};
/**
* enum mali_c55_aexp_hist_tap_points - Tap points for the AEXP histogram
* @MALI_C55_AEXP_HIST_TAP_WB: After static white balance
* @MALI_C55_AEXP_HIST_TAP_FS: After WDR Frame Stitch
* @MALI_C55_AEXP_HIST_TAP_TPG: After the test pattern generator
*/
enum mali_c55_aexp_hist_tap_points {
MALI_C55_AEXP_HIST_TAP_WB = 0,
MALI_C55_AEXP_HIST_TAP_FS,
MALI_C55_AEXP_HIST_TAP_TPG,
};
/**
* enum mali_c55_aexp_skip_x - Horizontal pixel skipping
* @MALI_C55_AEXP_SKIP_X_EVERY_2ND: Collect every 2nd pixel horizontally
* @MALI_C55_AEXP_SKIP_X_EVERY_3RD: Collect every 3rd pixel horizontally
* @MALI_C55_AEXP_SKIP_X_EVERY_4TH: Collect every 4th pixel horizontally
* @MALI_C55_AEXP_SKIP_X_EVERY_5TH: Collect every 5th pixel horizontally
* @MALI_C55_AEXP_SKIP_X_EVERY_8TH: Collect every 8th pixel horizontally
* @MALI_C55_AEXP_SKIP_X_EVERY_9TH: Collect every 9th pixel horizontally
*/
enum mali_c55_aexp_skip_x {
MALI_C55_AEXP_SKIP_X_EVERY_2ND,
MALI_C55_AEXP_SKIP_X_EVERY_3RD,
MALI_C55_AEXP_SKIP_X_EVERY_4TH,
MALI_C55_AEXP_SKIP_X_EVERY_5TH,
MALI_C55_AEXP_SKIP_X_EVERY_8TH,
MALI_C55_AEXP_SKIP_X_EVERY_9TH
};
/**
* enum mali_c55_aexp_skip_y - Vertical pixel skipping
* @MALI_C55_AEXP_SKIP_Y_ALL: Collect every single pixel vertically
* @MALI_C55_AEXP_SKIP_Y_EVERY_2ND: Collect every 2nd pixel vertically
* @MALI_C55_AEXP_SKIP_Y_EVERY_3RD: Collect every 3rd pixel vertically
* @MALI_C55_AEXP_SKIP_Y_EVERY_4TH: Collect every 4th pixel vertically
* @MALI_C55_AEXP_SKIP_Y_EVERY_5TH: Collect every 5th pixel vertically
* @MALI_C55_AEXP_SKIP_Y_EVERY_8TH: Collect every 8th pixel vertically
* @MALI_C55_AEXP_SKIP_Y_EVERY_9TH: Collect every 9th pixel vertically
*/
enum mali_c55_aexp_skip_y {
MALI_C55_AEXP_SKIP_Y_ALL,
MALI_C55_AEXP_SKIP_Y_EVERY_2ND,
MALI_C55_AEXP_SKIP_Y_EVERY_3RD,
MALI_C55_AEXP_SKIP_Y_EVERY_4TH,
MALI_C55_AEXP_SKIP_Y_EVERY_5TH,
MALI_C55_AEXP_SKIP_Y_EVERY_8TH,
MALI_C55_AEXP_SKIP_Y_EVERY_9TH
};
/**
* enum mali_c55_aexp_row_column_offset - Start from the first or second row or
* column
* @MALI_C55_AEXP_FIRST_ROW_OR_COL: Start from the first row / column
* @MALI_C55_AEXP_SECOND_ROW_OR_COL: Start from the second row / column
*/
enum mali_c55_aexp_row_column_offset {
MALI_C55_AEXP_FIRST_ROW_OR_COL = 1,
MALI_C55_AEXP_SECOND_ROW_OR_COL = 2,
};
/**
* enum mali_c55_aexp_hist_plane_mode - Mode for the AEXP Histograms
* @MALI_C55_AEXP_HIST_COMBINED: All color planes in one 1024-bin histogram
* @MALI_C55_AEXP_HIST_SEPARATE: Each color plane in one 256-bin histogram with a bin width of 16
* @MALI_C55_AEXP_HIST_FOCUS_00: Top left plane in the first bank, rest in second bank
* @MALI_C55_AEXP_HIST_FOCUS_01: Top right plane in the first bank, rest in second bank
* @MALI_C55_AEXP_HIST_FOCUS_10: Bottom left plane in the first bank, rest in second bank
* @MALI_C55_AEXP_HIST_FOCUS_11: Bottom right plane in the first bank, rest in second bank
*
* In the "focus" modes statistics are collected into two 512-bin histograms
* with a bin width of 8. One colour plane is in the first histogram with the
* remainder combined into the second. The four options represent which of the
* four positions in a bayer pattern are the focused plane.
*/
enum mali_c55_aexp_hist_plane_mode {
MALI_C55_AEXP_HIST_COMBINED = 0,
MALI_C55_AEXP_HIST_SEPARATE = 1,
MALI_C55_AEXP_HIST_FOCUS_00 = 4,
MALI_C55_AEXP_HIST_FOCUS_01 = 5,
MALI_C55_AEXP_HIST_FOCUS_10 = 6,
MALI_C55_AEXP_HIST_FOCUS_11 = 7,
};
/**
* struct mali_c55_params_aexp_hist - configuration for AEXP metering hists
*
* This struct allows users to configure the 1024-bin AEXP histograms. Broadly
* speaking the parameters allow you to mask particular regions of the image and
* to select different kinds of histogram.
*
* The skip_x, offset_x, skip_y and offset_y fields allow users to ignore or
* mask pixels in the frame by their position relative to the top left pixel.
* First, the skip_y, offset_x and offset_y fields define which of the pixels
* within each 2x2 region will be counted in the statistics.
*
* If skip_y == 0 then two pixels from each covered region will be counted. If
* both offset_x and offset_y are zero, then the two left-most pixels in each
* 2x2 pixel region will be counted. Setting offset_x = 1 will discount the top
* left pixel and count the top right pixel. Setting offset_y = 1 will discount
* the bottom left pixel and count the bottom right pixel.
*
* If skip_y != 0 then only a single pixel from each region covered by the
* pattern will be counted. In this case offset_x controls whether the pixel
* that's counted is in the left (if offset_x == 0) or right (if offset_x == 1)
* column and offset_y controls whether the pixel that's counted is in the top
* (if offset_y == 0) or bottom (if offset_y == 1) row.
*
* The skip_x and skip_y fields control how the 2x2 pixel region is repeated
* across the image data. The first instance of the region is always in the top
* left of the image data. The skip_x field controls how many pixels are ignored
* in the x direction before the pixel masking region is repeated. The skip_y
* field controls how many pixels are ignored in the y direction before the
* pixel masking region is repeated.
*
* These fields can be used to reduce the number of pixels counted for the
* statistics, but it's important to be careful to configure them correctly.
* Some combinations of values will result in colour components from the input
* data being ignored entirely, for example in the following configuration:
*
* skip_x = 0
* offset_x = 0
* skip_y = 0
* offset_y = 0
*
* Only the R and Gb components of RGGB data that was input would be collected.
* Similarly in the following configuration:
*
* skip_x = 0
* offset_x = 0
* skip_y = 1
* offset_y = 1
*
* Only the Gb component of RGGB data that was input would be collected. To
* correct things such that all 4 colour components were included it would be
* necessary to set the skip_x and skip_y fields in a way that resulted in all
* four colour components being collected:
*
* skip_x = 1
* offset_x = 0
* skip_y = 1
* offset_y = 1
*
* header.type should be set to one of either MALI_C55_PARAM_BLOCK_AEXP_HIST or
* MALI_C55_PARAM_BLOCK_AEXP_IHIST from :c:type:`mali_c55_param_block_type`.
*
* @header: The Mali-C55 parameters block header
* @skip_x: Horizontal decimation. See enum mali_c55_aexp_skip_x
* @offset_x: Skip the first column, or not. See enum mali_c55_aexp_row_column_offset
* @skip_y: Vertical decimation. See enum mali_c55_aexp_skip_y
* @offset_y: Skip the first row, or not. See enum mali_c55_aexp_row_column_offset
* @scale_bottom: Scale pixels in bottom half of intensity range: 0=1x ,1=2x, 2=4x, 4=8x, 4=16x
* @scale_top: scale pixels in top half of intensity range: 0=1x ,1=2x, 2=4x, 4=8x, 4=16x
* @plane_mode: Plane separation mode. See enum mali_c55_aexp_hist_plane_mode
* @tap_point: Tap point for histogram from enum mali_c55_aexp_hist_tap_points.
* This parameter is unused for the post-Iridix Histogram
*/
struct mali_c55_params_aexp_hist {
struct v4l2_isp_params_block_header header;
__u8 skip_x;
__u8 offset_x;
__u8 skip_y;
__u8 offset_y;
__u8 scale_bottom;
__u8 scale_top;
__u8 plane_mode;
__u8 tap_point;
};
/**
* struct mali_c55_params_aexp_weights - Array of weights for AEXP metering
*
* This struct allows users to configure the weighting for both of the 1024-bin
* AEXP histograms. The pixel data collected for each zone is multiplied by the
* corresponding weight from this array, which may be zero if the intention is
* to mask off the zone entirely.
*
* header.type should be set to one of either MALI_C55_PARAM_BLOCK_AEXP_HIST_WEIGHTS
* or MALI_C55_PARAM_BLOCK_AEXP_IHIST_WEIGHTS from :c:type:`mali_c55_param_block_type`.
*
* @header: The Mali-C55 parameters block header
* @nodes_used_horiz: Number of active zones horizontally [0..15]
* @nodes_used_vert: Number of active zones vertically [0..15]
* @zone_weights: Zone weighting. Index is row*col where 0,0 is the top
* left zone continuing in raster order. Each zone can be
* weighted in the range [0..15]. The number of rows and
* columns is defined by @nodes_used_vert and
* @nodes_used_horiz
*/
struct mali_c55_params_aexp_weights {
struct v4l2_isp_params_block_header header;
__u8 nodes_used_horiz;
__u8 nodes_used_vert;
__u8 zone_weights[MALI_C55_MAX_ZONES];
};
/**
* struct mali_c55_params_digital_gain - Digital gain value
*
* This struct carries a digital gain value to set in the ISP.
*
* header.type should be set to MALI_C55_PARAM_BLOCK_DIGITAL_GAIN from
* :c:type:`mali_c55_param_block_type` for this block.
*
* @header: The Mali-C55 parameters block header
* @gain: The digital gain value to apply, in Q5.8 format.
*/
struct mali_c55_params_digital_gain {
struct v4l2_isp_params_block_header header;
__u16 gain;
};
/**
* enum mali_c55_awb_stats_mode - Statistics mode for AWB
* @MALI_C55_AWB_MODE_GRBR: Statistics collected as Green/Red and Blue/Red ratios
* @MALI_C55_AWB_MODE_RGBG: Statistics collected as Red/Green and Blue/Green ratios
*/
enum mali_c55_awb_stats_mode {
MALI_C55_AWB_MODE_GRBR = 0,
MALI_C55_AWB_MODE_RGBG,
};
/**
* struct mali_c55_params_awb_gains - Gain settings for auto white balance
*
* This struct allows users to configure the gains for auto-white balance. There
* are four gain settings corresponding to each colour channel in the bayer
* domain. Although named generically, the association between the gain applied
* and the colour channel is done automatically within the ISP depending on the
* input format, and so the following mapping always holds true::
*
* gain00 = R
* gain01 = Gr
* gain10 = Gb
* gain11 = B
*
* All of the gains are stored in Q4.8 format.
*
* header.type should be set to one of either MALI_C55_PARAM_BLOCK_AWB_GAINS or
* MALI_C55_PARAM_BLOCK_AWB_GAINS_AEXP from :c:type:`mali_c55_param_block_type`.
*
* @header: The Mali-C55 parameters block header
* @gain00: Multiplier for colour channel 00
* @gain01: Multiplier for colour channel 01
* @gain10: Multiplier for colour channel 10
* @gain11: Multiplier for colour channel 11
*/
struct mali_c55_params_awb_gains {
struct v4l2_isp_params_block_header header;
__u16 gain00;
__u16 gain01;
__u16 gain10;
__u16 gain11;
};
/**
* enum mali_c55_params_awb_tap_points - Tap points for the AWB statistics
* @MALI_C55_AWB_STATS_TAP_PF: Immediately after the Purple Fringe block
* @MALI_C55_AWB_STATS_TAP_CNR: Immediately after the CNR block
*/
enum mali_c55_params_awb_tap_points {
MALI_C55_AWB_STATS_TAP_PF = 0,
MALI_C55_AWB_STATS_TAP_CNR,
};
/**
* struct mali_c55_params_awb_config - Stats settings for auto-white balance
*
* This struct allows the configuration of the statistics generated for auto
* white balance. Pixel intensity limits can be set to exclude overly bright or
* dark regions of an image from the statistics entirely. Colour ratio minima
* and maxima can be set to discount pixels who's ratios fall outside the
* defined boundaries; there are two sets of registers to do this - the
* "min/max" ratios which bound a region and the "high/low" ratios which further
* trim the upper and lower ratios. For example with the boundaries configured
* as follows, only pixels whos colour ratios falls into the region marked "A"
* would be counted::
*
* cr_high
* 2.0 | |
* | cb_max --> _________________________v_____
* 1.8 | | \ |
* | | \ |
* 1.6 | | \ |
* | | \ |
* c 1.4 | cb_low -->|\ A \|<-- cb_high
* b | | \ |
* 1.2 | | \ |
* r | | \ |
* a 1.0 | cb_min --> |____\_________________________|
* t | ^ ^ ^
* i 0.8 | | | |
* o | cr_min | cr_max
* s 0.6 | |
* | cr_low
* 0.4 |
* |
* 0.2 |
* |
* 0.0 |_______________________________________________________________
* 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
* cr ratios
*
* header.type should be set to MALI_C55_PARAM_BLOCK_AWB_CONFIG from
* :c:type:`mali_c55_param_block_type` for this block.
*
* @header: The Mali-C55 parameters block header
* @tap_point: The tap point from enum mali_c55_params_awb_tap_points
* @stats_mode: AWB statistics collection mode, see :c:type:`mali_c55_awb_stats_mode`
* @white_level: Upper pixel intensity (I.E. raw pixel values) limit
* @black_level: Lower pixel intensity (I.E. raw pixel values) limit
* @cr_max: Maximum R/G ratio (Q4.8 format)
* @cr_min: Minimum R/G ratio (Q4.8 format)
* @cb_max: Maximum B/G ratio (Q4.8 format)
* @cb_min: Minimum B/G ratio (Q4.8 format)
* @nodes_used_horiz: Number of active zones horizontally [0..15]
* @nodes_used_vert: Number of active zones vertically [0..15]
* @cr_high: R/G ratio trim high (Q4.8 format)
* @cr_low: R/G ratio trim low (Q4.8 format)
* @cb_high: B/G ratio trim high (Q4.8 format)
* @cb_low: B/G ratio trim low (Q4.8 format)
*/
struct mali_c55_params_awb_config {
struct v4l2_isp_params_block_header header;
__u8 tap_point;
__u8 stats_mode;
__u16 white_level;
__u16 black_level;
__u16 cr_max;
__u16 cr_min;
__u16 cb_max;
__u16 cb_min;
__u8 nodes_used_horiz;
__u8 nodes_used_vert;
__u16 cr_high;
__u16 cr_low;
__u16 cb_high;
__u16 cb_low;
};
#define MALI_C55_NUM_MESH_SHADING_ELEMENTS 3072
/**
* struct mali_c55_params_mesh_shading_config - Mesh shading configuration
*
* The mesh shading correction module allows programming a separate table of
* either 16x16 or 32x32 node coefficients for 3 different light sources. The
* final correction coefficients applied are computed by blending the
* coefficients from two tables together.
*
* A page of 1024 32-bit integers is associated to each colour channel, with
* pages stored consecutively in memory. Each 32-bit integer packs 3 8-bit
* correction coefficients for a single node, one for each of the three light
* sources. The 8 most significant bits are unused. The following table
* describes the layout::
*
* +----------- Page (Colour Plane) 0 -------------+
* | @mesh[i] | Mesh Point | Bits | Light Source |
* +-----------+------------+-------+--------------+
* | 0 | 0,0 | 16,23 | LS2 |
* | | | 08-15 | LS1 |
* | | | 00-07 | LS0 |
* +-----------+------------+-------+--------------+
* | 1 | 0,1 | 16,23 | LS2 |
* | | | 08-15 | LS1 |
* | | | 00-07 | LS0 |
* +-----------+------------+-------+--------------+
* | ... | ... | ... | ... |
* +-----------+------------+-------+--------------+
* | 1023 | 31,31 | 16,23 | LS2 |
* | | | 08-15 | LS1 |
* | | | 00-07 | LS0 |
* +----------- Page (Colour Plane) 1 -------------+
* | @mesh[i] | Mesh Point | Bits | Light Source |
* +-----------+------------+-------+--------------+
* | 1024 | 0,0 | 16,23 | LS2 |
* | | | 08-15 | LS1 |
* | | | 00-07 | LS0 |
* +-----------+------------+-------+--------------+
* | 1025 | 0,1 | 16,23 | LS2 |
* | | | 08-15 | LS1 |
* | | | 00-07 | LS0 |
* +-----------+------------+-------+--------------+
* | ... | ... | ... | ... |
* +-----------+------------+-------+--------------+
* | 2047 | 31,31 | 16,23 | LS2 |
* | | | 08-15 | LS1 |
* | | | 00-07 | LS0 |
* +----------- Page (Colour Plane) 2 -------------+
* | @mesh[i] | Mesh Point | Bits | Light Source |
* +-----------+------------+-------+--------------+
* | 2048 | 0,0 | 16,23 | LS2 |
* | | | 08-15 | LS1 |
* | | | 00-07 | LS0 |
* +-----------+------------+-------+--------------+
* | 2049 | 0,1 | 16,23 | LS2 |
* | | | 08-15 | LS1 |
* | | | 00-07 | LS0 |
* +-----------+------------+-------+--------------+
* | ... | ... | ... | ... |
* +-----------+------------+-------+--------------+
* | 3071 | 31,31 | 16,23 | LS2 |
* | | | 08-15 | LS1 |
* | | | 00-07 | LS0 |
* +-----------+------------+-------+--------------+
*
* The @mesh_scale member determines the precision and minimum and maximum gain.
* For example if @mesh_scale is 0 and therefore selects 0 - 2x gain, a value of
* 0 in a coefficient means 0.0 gain, a value of 128 means 1.0 gain and 255
* means 2.0 gain.
*
* header.type should be set to MALI_C55_PARAM_MESH_SHADING_CONFIG from
* :c:type:`mali_c55_param_block_type` for this block.
*
* @header: The Mali-C55 parameters block header
* @mesh_show: Output the mesh data rather than image data
* @mesh_scale: Set the precision and maximum gain range of mesh shading
* - 0 = 0-2x gain
* - 1 = 0-4x gain
* - 2 = 0-8x gain
* - 3 = 0-16x gain
* - 4 = 1-2x gain
* - 5 = 1-3x gain
* - 6 = 1-5x gain
* - 7 = 1-9x gain
* @mesh_page_r: Mesh page select for red colour plane [0..2]
* @mesh_page_g: Mesh page select for green colour plane [0..2]
* @mesh_page_b: Mesh page select for blue colour plane [0..2]
* @mesh_width: Number of horizontal nodes minus 1 [15,31]
* @mesh_height: Number of vertical nodes minus 1 [15,31]
* @mesh: Mesh shading correction tables
*/
struct mali_c55_params_mesh_shading_config {
struct v4l2_isp_params_block_header header;
__u8 mesh_show;
__u8 mesh_scale;
__u8 mesh_page_r;
__u8 mesh_page_g;
__u8 mesh_page_b;
__u8 mesh_width;
__u8 mesh_height;
__u32 mesh[MALI_C55_NUM_MESH_SHADING_ELEMENTS];
};
/** enum mali_c55_params_mesh_alpha_bank - Mesh shading table bank selection
* @MALI_C55_MESH_ALPHA_BANK_LS0_AND_LS1 - Select Light Sources 0 and 1
* @MALI_C55_MESH_ALPHA_BANK_LS1_AND_LS2 - Select Light Sources 1 and 2
* @MALI_C55_MESH_ALPHA_BANK_LS0_AND_LS2 - Select Light Sources 0 and 2
*/
enum mali_c55_params_mesh_alpha_bank {
MALI_C55_MESH_ALPHA_BANK_LS0_AND_LS1 = 0,
MALI_C55_MESH_ALPHA_BANK_LS1_AND_LS2 = 1,
MALI_C55_MESH_ALPHA_BANK_LS0_AND_LS2 = 4
};
/**
* struct mali_c55_params_mesh_shading_selection - Mesh table selection
*
* The module computes the final correction coefficients by blending the ones
* from two light source tables, which are selected (independently for each
* colour channel) by the @mesh_alpha_bank_r/g/b fields.
*
* The final blended coefficients for each node are calculated using the
* following equation:
*
* Final coefficient = (a * LS\ :sub:`b`\ + (256 - a) * LS\ :sub:`a`\) / 256
*
* Where a is the @mesh_alpha_r/g/b value, and LS\ :sub:`a`\ and LS\ :sub:`b`\
* are the node cofficients for the two tables selected by the
* @mesh_alpha_bank_r/g/b value.
*
* The scale of the applied correction may also be controlled by tuning the
* @mesh_strength member. This is a modifier to the final coefficients which can
* be used to globally reduce the gains applied.
*
* header.type should be set to MALI_C55_PARAM_MESH_SHADING_SELECTION from
* :c:type:`mali_c55_param_block_type` for this block.
*
* @header: The Mali-C55 parameters block header
* @mesh_alpha_bank_r: Red mesh table select (c:type:`enum mali_c55_params_mesh_alpha_bank`)
* @mesh_alpha_bank_g: Green mesh table select (c:type:`enum mali_c55_params_mesh_alpha_bank`)
* @mesh_alpha_bank_b: Blue mesh table select (c:type:`enum mali_c55_params_mesh_alpha_bank`)
* @mesh_alpha_r: Blend coefficient for R [0..255]
* @mesh_alpha_g: Blend coefficient for G [0..255]
* @mesh_alpha_b: Blend coefficient for B [0..255]
* @mesh_strength: Mesh strength in Q4.12 format [0..4096]
*/
struct mali_c55_params_mesh_shading_selection {
struct v4l2_isp_params_block_header header;
__u8 mesh_alpha_bank_r;
__u8 mesh_alpha_bank_g;
__u8 mesh_alpha_bank_b;
__u8 mesh_alpha_r;
__u8 mesh_alpha_g;
__u8 mesh_alpha_b;
__u16 mesh_strength;
};
/**
* define MALI_C55_PARAMS_MAX_SIZE - Maximum size of all Mali C55 Parameters
*
* Though the parameters for the Mali-C55 are passed as optional blocks, the
* driver still needs to know the absolute maximum size so that it can allocate
* a buffer sized appropriately to accommodate userspace attempting to set all
* possible parameters in a single frame.
*
* Some structs are in this list multiple times. Where that's the case, it just
* reflects the fact that the same struct can be used with multiple different
* header types from :c:type:`mali_c55_param_block_type`.
*/
#define MALI_C55_PARAMS_MAX_SIZE \
(sizeof(struct mali_c55_params_sensor_off_preshading) + \
sizeof(struct mali_c55_params_aexp_hist) + \
sizeof(struct mali_c55_params_aexp_weights) + \
sizeof(struct mali_c55_params_aexp_hist) + \
sizeof(struct mali_c55_params_aexp_weights) + \
sizeof(struct mali_c55_params_digital_gain) + \
sizeof(struct mali_c55_params_awb_gains) + \
sizeof(struct mali_c55_params_awb_config) + \
sizeof(struct mali_c55_params_awb_gains) + \
sizeof(struct mali_c55_params_mesh_shading_config) + \
sizeof(struct mali_c55_params_mesh_shading_selection))
#endif /* __UAPI_MALI_C55_CONFIG_H */

102
lib/libc/include/any-linux-any/linux/media/v4l2-isp.h vendored Normal file
View file

@ -0,0 +1,102 @@
/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
/*
* Video4Linux2 generic ISP parameters and statistics support
*
* Copyright (C) 2025 Ideas On Board Oy
* Author: Jacopo Mondi <jacopo.mondi@ideasonboard.com>
*/
#ifndef _V4L2_ISP_H_
#define _V4L2_ISP_H_
#include <linux/stddef.h>
#include <linux/types.h>
/**
* enum v4l2_isp_params_version - V4L2 ISP parameters versioning
*
* @V4L2_ISP_PARAMS_VERSION_V0: First version of the V4L2 ISP parameters format
* (for compatibility)
* @V4L2_ISP_PARAMS_VERSION_V1: First version of the V4L2 ISP parameters format
*
* V0 and V1 are identical in order to support drivers compatible with the V4L2
* ISP parameters format already upstreamed which use either 0 or 1 as their
* versioning identifier. Both V0 and V1 refers to the first version of the
* V4L2 ISP parameters format.
*
* Future revisions of the V4L2 ISP parameters format should start from the
* value of 2.
*/
enum v4l2_isp_params_version {
V4L2_ISP_PARAMS_VERSION_V0 = 0,
V4L2_ISP_PARAMS_VERSION_V1
};
#define V4L2_ISP_PARAMS_FL_BLOCK_DISABLE (1U << 0)
#define V4L2_ISP_PARAMS_FL_BLOCK_ENABLE (1U << 1)
/*
* Reserve the first 8 bits for V4L2_ISP_PARAMS_FL_* flag.
*
* Driver-specific flags should be defined as:
* #define DRIVER_SPECIFIC_FLAG0 ((1U << V4L2_ISP_PARAMS_FL_DRIVER_FLAGS(0))
* #define DRIVER_SPECIFIC_FLAG1 ((1U << V4L2_ISP_PARAMS_FL_DRIVER_FLAGS(1))
*/
#define V4L2_ISP_PARAMS_FL_DRIVER_FLAGS(n) ((n) + 8)
/**
* struct v4l2_isp_params_block_header - V4L2 extensible parameters block header
* @type: The parameters block type (driver-specific)
* @flags: A bitmask of block flags (driver-specific)
* @size: Size (in bytes) of the parameters block, including this header
*
* This structure represents the common part of all the ISP configuration
* blocks. Each parameters block shall embed an instance of this structure type
* as its first member, followed by the block-specific configuration data.
*
* The @type field is an ISP driver-specific value that identifies the block
* type. The @size field specifies the size of the parameters block.
*
* The @flags field is a bitmask of per-block flags V4L2_PARAMS_ISP_FL_* and
* driver-specific flags specified by the driver header.
*/
struct v4l2_isp_params_block_header {
__u16 type;
__u16 flags;
__u32 size;
} __attribute__((aligned(8)));
/**
* struct v4l2_isp_params_buffer - V4L2 extensible parameters configuration
* @version: The parameters buffer version (driver-specific)
* @data_size: The configuration data effective size, excluding this header
* @data: The configuration data
*
* This structure contains the configuration parameters of the ISP algorithms,
* serialized by userspace into a data buffer. Each configuration parameter
* block is represented by a block-specific structure which contains a
* :c:type:`v4l2_isp_params_block_header` entry as first member. Userspace
* populates the @data buffer with configuration parameters for the blocks that
* it intends to configure. As a consequence, the data buffer effective size
* changes according to the number of ISP blocks that userspace intends to
* configure and is set by userspace in the @data_size field.
*
* The parameters buffer is versioned by the @version field to allow modifying
* and extending its definition. Userspace shall populate the @version field to
* inform the driver about the version it intends to use. The driver will parse
* and handle the @data buffer according to the data layout specific to the
* indicated version and return an error if the desired version is not
* supported.
*
* For each ISP block that userspace wants to configure, a block-specific
* structure is appended to the @data buffer, one after the other without gaps
* in between. Userspace shall populate the @data_size field with the effective
* size, in bytes, of the @data buffer.
*/
struct v4l2_isp_params_buffer {
__u32 version;
__u32 data_size;
__u8 data[] __counted_by(data_size);
};
#endif /* _V4L2_ISP_H_ */

12
lib/libc/include/any-linux-any/linux/mempolicy.h vendored
View file

@ -66,10 +66,16 @@ enum {
#define MPOL_F_MORON (1 << 4) /* Migrate On protnone Reference On Node */
/*
* These bit locations are exposed in the vm.zone_reclaim_mode sysctl
* ABI. New bits are OK, but existing bits can never change.
* Enabling zone reclaim means the page allocator will attempt to fulfill
* the allocation request on the current node by triggering reclaim and
* trying to shrink the current node.
* Fallback allocations on the next candidates in the zonelist are considered
* when reclaim fails to free up enough memory in the current node/zone.
*
* These bit locations are exposed in the vm.zone_reclaim_mode sysctl.
* New bits are OK, but existing bits should not be changed.
*/
#define RECLAIM_ZONE (1<<0) /* Run shrink_inactive_list on the zone */
#define RECLAIM_ZONE (1<<0) /* Enable zone reclaim */
#define RECLAIM_WRITE (1<<1) /* Writeout pages during reclaim */
#define RECLAIM_UNMAP (1<<2) /* Unmap pages during reclaim */

2
lib/libc/include/any-linux-any/linux/mount.h vendored
View file

@ -197,7 +197,7 @@ struct statmount {
*/
struct mnt_id_req {
__u32 size;
__u32 spare;
__u32 mnt_ns_fd;
__u64 mnt_id;
__u64 param;
__u64 mnt_ns_id;

24
lib/libc/include/any-linux-any/linux/mptcp.h vendored
View file

@ -30,20 +30,28 @@
#define MPTCP_INFO_FLAG_REMOTE_KEY_RECEIVED _BITUL(1)
#define MPTCP_PM_EV_FLAG_DENY_JOIN_ID0 _BITUL(0)
#define MPTCP_PM_EV_FLAG_SERVER_SIDE _BITUL(1)
#define MPTCP_PM_ADDR_FLAG_SIGNAL (1 << 0)
#define MPTCP_PM_ADDR_FLAG_SUBFLOW (1 << 1)
#define MPTCP_PM_ADDR_FLAG_BACKUP (1 << 2)
#define MPTCP_PM_ADDR_FLAG_FULLMESH (1 << 3)
#define MPTCP_PM_ADDR_FLAG_IMPLICIT (1 << 4)
#define MPTCP_PM_ADDR_FLAG_SIGNAL _BITUL(0)
#define MPTCP_PM_ADDR_FLAG_SUBFLOW _BITUL(1)
#define MPTCP_PM_ADDR_FLAG_BACKUP _BITUL(2)
#define MPTCP_PM_ADDR_FLAG_FULLMESH _BITUL(3)
#define MPTCP_PM_ADDR_FLAG_IMPLICIT _BITUL(4)
#define MPTCP_PM_ADDR_FLAG_LAMINAR _BITUL(5)
#define MPTCP_PM_ADDR_FLAGS_MASK GENMASK(5, 0)
struct mptcp_info {
__u8 mptcpi_subflows;
#define mptcpi_extra_subflows mptcpi_subflows
__u8 mptcpi_add_addr_signal;
__u8 mptcpi_add_addr_accepted;
__u8 mptcpi_subflows_max;
#define mptcpi_limit_extra_subflows mptcpi_subflows_max
__u8 mptcpi_add_addr_signal_max;
#define mptcpi_endp_signal_max mptcpi_add_addr_signal_max
__u8 mptcpi_add_addr_accepted_max;
#define mptcpi_limit_add_addr_accepted mptcpi_add_addr_accepted_max
/* 16-bit hole that can no longer be filled */
__u32 mptcpi_flags;
__u32 mptcpi_token;
__u64 mptcpi_write_seq;
@ -51,14 +59,18 @@ struct mptcp_info {
__u64 mptcpi_rcv_nxt;
__u8 mptcpi_local_addr_used;
__u8 mptcpi_local_addr_max;
#define mptcpi_endp_subflow_max mptcpi_local_addr_max
__u8 mptcpi_csum_enabled;
/* 8-bit hole that can no longer be filled */
__u32 mptcpi_retransmits;
__u64 mptcpi_bytes_retrans;
__u64 mptcpi_bytes_sent;
__u64 mptcpi_bytes_received;
__u64 mptcpi_bytes_acked;
__u8 mptcpi_subflows_total;
__u8 reserved[3];
__u8 mptcpi_endp_laminar_max;
__u8 mptcpi_endp_fullmesh_max;
__u8 reserved;
__u32 mptcpi_last_data_sent;
__u32 mptcpi_last_data_recv;
__u32 mptcpi_last_ack_recv;

5
lib/libc/include/any-linux-any/linux/mptcp_pm.h vendored
View file

@ -2,6 +2,7 @@
/* Do not edit directly, auto-generated from: */
/* Documentation/netlink/specs/mptcp_pm.yaml */
/* YNL-GEN uapi header */
/* To regenerate run: tools/net/ynl/ynl-regen.sh */
#ifndef _LINUX_MPTCP_PM_H
#define _LINUX_MPTCP_PM_H
@ -16,10 +17,10 @@
* good time to allocate memory and send ADD_ADDR if needed. Depending on the
* traffic-patterns it can take a long time until the MPTCP_EVENT_ESTABLISHED
* is sent. Attributes: token, family, saddr4 | saddr6, daddr4 | daddr6,
* sport, dport, server-side, [flags].
* sport, dport, [server-side], [flags].
* @MPTCP_EVENT_ESTABLISHED: A MPTCP connection is established (can start new
* subflows). Attributes: token, family, saddr4 | saddr6, daddr4 | daddr6,
* sport, dport, server-side, [flags].
* sport, dport, [server-side], [flags].
* @MPTCP_EVENT_CLOSED: A MPTCP connection has stopped. Attribute: token.
* @MPTCP_EVENT_ANNOUNCED: A new address has been announced by the peer.
* Attributes: token, rem_id, family, daddr4 | daddr6 [, dport].

116
lib/libc/include/any-linux-any/linux/mshv.h vendored
View file

@ -26,6 +26,7 @@ enum {
MSHV_PT_BIT_LAPIC,
MSHV_PT_BIT_X2APIC,
MSHV_PT_BIT_GPA_SUPER_PAGES,
MSHV_PT_BIT_CPU_AND_XSAVE_FEATURES,
MSHV_PT_BIT_COUNT,
};
@ -41,6 +42,8 @@ enum {
* @pt_flags: Bitmask of 1 << MSHV_PT_BIT_*
* @pt_isolation: MSHV_PT_ISOLATION_*
*
* This is the initial/v1 version for backward compatibility.
*
* Returns a file descriptor to act as a handle to a guest partition.
* At this point the partition is not yet initialized in the hypervisor.
* Some operations must be done with the partition in this state, e.g. setting
@ -52,6 +55,37 @@ struct mshv_create_partition {
__u64 pt_isolation;
};
#define MSHV_NUM_CPU_FEATURES_BANKS 2
/**
* struct mshv_create_partition_v2
*
* This is extended version of the above initial MSHV_CREATE_PARTITION
* ioctl and allows for following additional parameters:
*
* @pt_num_cpu_fbanks: Must be set to MSHV_NUM_CPU_FEATURES_BANKS.
* @pt_cpu_fbanks: Disabled processor feature banks array.
* @pt_disabled_xsave: Disabled xsave feature bits.
*
* pt_cpu_fbanks and pt_disabled_xsave are passed through as-is to the create
* partition hypercall.
*
* Returns : same as above original mshv_create_partition
*/
struct mshv_create_partition_v2 {
__u64 pt_flags;
__u64 pt_isolation;
__u16 pt_num_cpu_fbanks;
__u8 pt_rsvd[6]; /* MBZ */
__u64 pt_cpu_fbanks[MSHV_NUM_CPU_FEATURES_BANKS];
__u64 pt_rsvd1[2]; /* MBZ */
#if defined(__x86_64__)
__u64 pt_disabled_xsave;
#else
__u64 pt_rsvd2; /* MBZ */
#endif
} __attribute__((packed));
/* /dev/mshv */
#define MSHV_CREATE_PARTITION _IOW(MSHV_IOCTL, 0x00, struct mshv_create_partition)
@ -89,7 +123,7 @@ enum {
* @rsvd: MBZ
*
* Map or unmap a region of userspace memory to Guest Physical Addresses (GPA).
* Mappings can't overlap in GPA space or userspace.
* Mappings can't overlap in GPA space.
* To unmap, these fields must match an existing mapping.
*/
struct mshv_user_mem_region {
@ -288,4 +322,84 @@ struct mshv_get_set_vp_state {
* #define MSHV_ROOT_HVCALL _IOWR(MSHV_IOCTL, 0x07, struct mshv_root_hvcall)
*/
/* Structure definitions, macros and IOCTLs for mshv_vtl */
#define MSHV_CAP_CORE_API_STABLE 0x0
#define MSHV_CAP_REGISTER_PAGE 0x1
#define MSHV_CAP_VTL_RETURN_ACTION 0x2
#define MSHV_CAP_DR6_SHARED 0x3
#define MSHV_MAX_RUN_MSG_SIZE 256
struct mshv_vp_registers {
__u32 count; /* supports only 1 register at a time */
__u32 reserved; /* Reserved for alignment or future use */
__u64 regs_ptr; /* pointer to struct hv_register_assoc */
};
struct mshv_vtl_set_eventfd {
__s32 fd;
__u32 flag;
};
struct mshv_vtl_signal_event {
__u32 connection_id;
__u32 flag;
};
struct mshv_vtl_sint_post_msg {
__u64 message_type;
__u32 connection_id;
__u32 payload_size; /* Must not exceed HV_MESSAGE_PAYLOAD_BYTE_COUNT */
__u64 payload_ptr; /* pointer to message payload (bytes) */
};
struct mshv_vtl_ram_disposition {
__u64 start_pfn;
__u64 last_pfn;
};
struct mshv_vtl_set_poll_file {
__u32 cpu;
__u32 fd;
};
struct mshv_vtl_hvcall_setup {
__u64 bitmap_array_size; /* stores number of bytes */
__u64 allow_bitmap_ptr;
};
struct mshv_vtl_hvcall {
__u64 control; /* Hypercall control code */
__u64 input_size; /* Size of the input data */
__u64 input_ptr; /* Pointer to the input struct */
__u64 status; /* Status of the hypercall (output) */
__u64 output_size; /* Size of the output data */
__u64 output_ptr; /* Pointer to the output struct */
};
struct mshv_sint_mask {
__u8 mask;
__u8 reserved[7];
};
/* /dev/mshv device IOCTL */
#define MSHV_CHECK_EXTENSION _IOW(MSHV_IOCTL, 0x00, __u32)
/* vtl device */
#define MSHV_CREATE_VTL _IOR(MSHV_IOCTL, 0x1D, char)
#define MSHV_ADD_VTL0_MEMORY _IOW(MSHV_IOCTL, 0x21, struct mshv_vtl_ram_disposition)
#define MSHV_SET_POLL_FILE _IOW(MSHV_IOCTL, 0x25, struct mshv_vtl_set_poll_file)
#define MSHV_RETURN_TO_LOWER_VTL _IO(MSHV_IOCTL, 0x27)
#define MSHV_GET_VP_REGISTERS _IOWR(MSHV_IOCTL, 0x05, struct mshv_vp_registers)
#define MSHV_SET_VP_REGISTERS _IOW(MSHV_IOCTL, 0x06, struct mshv_vp_registers)
/* VMBus device IOCTLs */
#define MSHV_SINT_SIGNAL_EVENT _IOW(MSHV_IOCTL, 0x22, struct mshv_vtl_signal_event)
#define MSHV_SINT_POST_MESSAGE _IOW(MSHV_IOCTL, 0x23, struct mshv_vtl_sint_post_msg)
#define MSHV_SINT_SET_EVENTFD _IOW(MSHV_IOCTL, 0x24, struct mshv_vtl_set_eventfd)
#define MSHV_SINT_PAUSE_MESSAGE_STREAM _IOW(MSHV_IOCTL, 0x25, struct mshv_sint_mask)
/* hv_hvcall device */
#define MSHV_HVCALL_SETUP _IOW(MSHV_IOCTL, 0x1E, struct mshv_vtl_hvcall_setup)
#define MSHV_HVCALL _IOWR(MSHV_IOCTL, 0x1F, struct mshv_vtl_hvcall)
#endif

1
lib/libc/include/any-linux-any/linux/net_shaper.h vendored
View file

@ -2,6 +2,7 @@
/* Do not edit directly, auto-generated from: */
/* Documentation/netlink/specs/net_shaper.yaml */
/* YNL-GEN uapi header */
/* To regenerate run: tools/net/ynl/ynl-regen.sh */
#ifndef _LINUX_NET_SHAPER_H
#define _LINUX_NET_SHAPER_H

2
lib/libc/include/any-linux-any/linux/netdev.h vendored
View file

@ -2,6 +2,7 @@
/* Do not edit directly, auto-generated from: */
/* Documentation/netlink/specs/netdev.yaml */
/* YNL-GEN uapi header */
/* To regenerate run: tools/net/ynl/ynl-regen.sh */
#ifndef _LINUX_NETDEV_H
#define _LINUX_NETDEV_H
@ -80,6 +81,7 @@ enum netdev_qstats_scope {
enum netdev_napi_threaded {
NETDEV_NAPI_THREADED_DISABLED,
NETDEV_NAPI_THREADED_ENABLED,
NETDEV_NAPI_THREADED_BUSY_POLL,
};
enum {

16
lib/libc/include/any-linux-any/linux/netfilter/nf_tables.h vendored
View file

@ -881,7 +881,7 @@ enum nft_exthdr_flags {
* enum nft_exthdr_op - nf_tables match options
*
* @NFT_EXTHDR_OP_IPV6: match against ipv6 extension headers
* @NFT_EXTHDR_OP_TCP: match against tcp options
* @NFT_EXTHDR_OP_TCPOPT: match against tcp options
* @NFT_EXTHDR_OP_IPV4: match against ipv4 options
* @NFT_EXTHDR_OP_SCTP: match against sctp chunks
* @NFT_EXTHDR_OP_DCCP: match against dccp otions
@ -959,6 +959,7 @@ enum nft_exthdr_attributes {
* @NFT_META_SDIF: slave device interface index
* @NFT_META_SDIFNAME: slave device interface name
* @NFT_META_BRI_BROUTE: packet br_netfilter_broute bit
* @NFT_META_BRI_IIFHWADDR: packet input bridge interface ethernet address
*/
enum nft_meta_keys {
NFT_META_LEN,
@ -999,6 +1000,7 @@ enum nft_meta_keys {
NFT_META_SDIFNAME,
NFT_META_BRI_BROUTE,
__NFT_META_IIFTYPE,
NFT_META_BRI_IIFHWADDR,
};
/**
@ -1198,7 +1200,7 @@ enum nft_ct_attributes {
#define NFTA_CT_MAX (__NFTA_CT_MAX - 1)
/**
* enum nft_flow_attributes - ct offload expression attributes
* enum nft_offload_attributes - ct offload expression attributes
* @NFTA_FLOW_TABLE_NAME: flow table name (NLA_STRING)
*/
enum nft_offload_attributes {
@ -1408,7 +1410,7 @@ enum nft_reject_types {
};
/**
* enum nft_reject_code - Generic reject codes for IPv4/IPv6
* enum nft_reject_inet_code - Generic reject codes for IPv4/IPv6
*
* @NFT_REJECT_ICMPX_NO_ROUTE: no route to host / network unreachable
* @NFT_REJECT_ICMPX_PORT_UNREACH: port unreachable
@ -1478,9 +1480,9 @@ enum nft_nat_attributes {
/**
* enum nft_tproxy_attributes - nf_tables tproxy expression netlink attributes
*
* NFTA_TPROXY_FAMILY: Target address family (NLA_U32: nft_registers)
* NFTA_TPROXY_REG_ADDR: Target address register (NLA_U32: nft_registers)
* NFTA_TPROXY_REG_PORT: Target port register (NLA_U32: nft_registers)
* @NFTA_TPROXY_FAMILY: Target address family (NLA_U32: nft_registers)
* @NFTA_TPROXY_REG_ADDR: Target address register (NLA_U32: nft_registers)
* @NFTA_TPROXY_REG_PORT: Target port register (NLA_U32: nft_registers)
*/
enum nft_tproxy_attributes {
NFTA_TPROXY_UNSPEC,
@ -1781,7 +1783,7 @@ enum nft_synproxy_attributes {
#define NFTA_SYNPROXY_MAX (__NFTA_SYNPROXY_MAX - 1)
/**
* enum nft_device_attributes - nf_tables device netlink attributes
* enum nft_devices_attributes - nf_tables device netlink attributes
*
* @NFTA_DEVICE_NAME: name of this device (NLA_STRING)
* @NFTA_DEVICE_PREFIX: device name prefix, a simple wildcard (NLA_STRING)

40
lib/libc/include/any-linux-any/linux/netfilter_ipv6/ip6t_srh.h vendored
View file

@ -41,13 +41,13 @@
/**
* struct ip6t_srh - SRH match options
* @ next_hdr: Next header field of SRH
* @ hdr_len: Extension header length field of SRH
* @ segs_left: Segments left field of SRH
* @ last_entry: Last entry field of SRH
* @ tag: Tag field of SRH
* @ mt_flags: match options
* @ mt_invflags: Invert the sense of match options
* @next_hdr: Next header field of SRH
* @hdr_len: Extension header length field of SRH
* @segs_left: Segments left field of SRH
* @last_entry: Last entry field of SRH
* @tag: Tag field of SRH
* @mt_flags: match options
* @mt_invflags: Invert the sense of match options
*/
struct ip6t_srh {
@ -62,19 +62,19 @@ struct ip6t_srh {
/**
* struct ip6t_srh1 - SRH match options (revision 1)
* @ next_hdr: Next header field of SRH
* @ hdr_len: Extension header length field of SRH
* @ segs_left: Segments left field of SRH
* @ last_entry: Last entry field of SRH
* @ tag: Tag field of SRH
* @ psid_addr: Address of previous SID in SRH SID list
* @ nsid_addr: Address of NEXT SID in SRH SID list
* @ lsid_addr: Address of LAST SID in SRH SID list
* @ psid_msk: Mask of previous SID in SRH SID list
* @ nsid_msk: Mask of next SID in SRH SID list
* @ lsid_msk: MAsk of last SID in SRH SID list
* @ mt_flags: match options
* @ mt_invflags: Invert the sense of match options
* @next_hdr: Next header field of SRH
* @hdr_len: Extension header length field of SRH
* @segs_left: Segments left field of SRH
* @last_entry: Last entry field of SRH
* @tag: Tag field of SRH
* @psid_addr: Address of previous SID in SRH SID list
* @nsid_addr: Address of NEXT SID in SRH SID list
* @lsid_addr: Address of LAST SID in SRH SID list
* @psid_msk: Mask of previous SID in SRH SID list
* @nsid_msk: Mask of next SID in SRH SID list
* @lsid_msk: MAsk of last SID in SRH SID list
* @mt_flags: match options
* @mt_invflags: Invert the sense of match options
*/
struct ip6t_srh1 {

1
lib/libc/include/any-linux-any/linux/nfs.h vendored
View file

@ -49,7 +49,6 @@
NFSERR_NOENT = 2, /* v2 v3 v4 */
NFSERR_IO = 5, /* v2 v3 v4 */
NFSERR_NXIO = 6, /* v2 v3 v4 */
NFSERR_EAGAIN = 11, /* v2 v3 */
NFSERR_ACCES = 13, /* v2 v3 v4 */
NFSERR_EXIST = 17, /* v2 v3 v4 */
NFSERR_XDEV = 18, /* v3 v4 */

1
lib/libc/include/any-linux-any/linux/nfsd_netlink.h vendored
View file

@ -2,6 +2,7 @@
/* Do not edit directly, auto-generated from: */
/* Documentation/netlink/specs/nfsd.yaml */
/* YNL-GEN uapi header */
/* To regenerate run: tools/net/ynl/ynl-regen.sh */
#ifndef _LINUX_NFSD_NETLINK_H
#define _LINUX_NFSD_NETLINK_H

1
lib/libc/include/any-linux-any/linux/nl80211-vnd-intel.h vendored
View file

@ -84,7 +84,6 @@ enum iwl_vendor_auth_akm_mode {
*
* @NUM_IWL_MVM_VENDOR_ATTR: number of vendor attributes
* @MAX_IWL_MVM_VENDOR_ATTR: highest vendor attribute number
*/
enum iwl_mvm_vendor_attr {
__IWL_MVM_VENDOR_ATTR_INVALID = 0x00,

260
lib/libc/include/any-linux-any/linux/nl80211.h vendored
View file

@ -1085,8 +1085,9 @@
* %NL80211_ATTR_NAN_MASTER_PREF attribute and optional
* %NL80211_ATTR_BANDS attributes. If %NL80211_ATTR_BANDS is
* omitted or set to 0, it means don't-care and the device will
* decide what to use. After this command NAN functions can be
* added.
* decide what to use. Additional cluster configuration may be
* optionally provided with %NL80211_ATTR_NAN_CONFIG.
* After this command NAN functions can be added.
* @NL80211_CMD_STOP_NAN: Stop the NAN operation, identified by
* its %NL80211_ATTR_WDEV interface.
* @NL80211_CMD_ADD_NAN_FUNCTION: Add a NAN function. The function is defined
@ -1115,6 +1116,10 @@
* current configuration is not changed. If it is present but
* set to zero, the configuration is changed to don't-care
* (i.e. the device can decide what to do).
* Additional parameters may be provided with
* %NL80211_ATTR_NAN_CONFIG. User space should provide all previously
* configured nested attributes under %NL80211_ATTR_NAN_CONFIG, even if
* only a subset was changed.
* @NL80211_CMD_NAN_MATCH: Notification sent when a match is reported.
* This will contain a %NL80211_ATTR_NAN_MATCH nested attribute and
* %NL80211_ATTR_COOKIE.
@ -1344,6 +1349,18 @@
* control EPCS configuration. Used to notify userland on the current state
* of EPCS.
*
* @NL80211_CMD_NAN_NEXT_DW_NOTIFICATION: This command is used to notify
* user space about the next NAN Discovery Window (DW). User space may use
* it to prepare frames to be sent in the next DW.
* %NL80211_ATTR_WIPHY_FREQ is used to indicate the frequency of the next
* DW. SDF transmission should be requested with %NL80211_CMD_FRAME and
* the device/driver shall take care of the actual transmission timing.
* This notification is only sent to the NAN interface owning socket
* (see %NL80211_ATTR_SOCKET_OWNER flag).
* @NL80211_CMD_NAN_CLUSTER_JOINED: This command is used to notify
* user space that the NAN new cluster has been joined. The cluster ID is
* indicated by %NL80211_ATTR_MAC.
*
* @NL80211_CMD_MAX: highest used command number
* @__NL80211_CMD_AFTER_LAST: internal use
*/
@ -1604,6 +1621,9 @@ enum nl80211_commands {
NL80211_CMD_ASSOC_MLO_RECONF,
NL80211_CMD_EPCS_CFG,
NL80211_CMD_NAN_NEXT_DW_NOTIFICATION,
NL80211_CMD_NAN_CLUSTER_JOINED,
/* add new commands above here */
/* used to define NL80211_CMD_MAX below */
@ -1943,8 +1963,9 @@ enum nl80211_commands {
* The driver must also specify support for this with the extended
* features NL80211_EXT_FEATURE_BEACON_RATE_LEGACY,
* NL80211_EXT_FEATURE_BEACON_RATE_HT,
* NL80211_EXT_FEATURE_BEACON_RATE_VHT and
* NL80211_EXT_FEATURE_BEACON_RATE_HE.
* NL80211_EXT_FEATURE_BEACON_RATE_VHT,
* NL80211_EXT_FEATURE_BEACON_RATE_HE and
* NL80211_EXT_FEATURE_BEACON_RATE_EHT.
*
* @NL80211_ATTR_FRAME_MATCH: A binary attribute which typically must contain
* at least one byte, currently used with @NL80211_CMD_REGISTER_FRAME.
@ -2283,7 +2304,8 @@ enum nl80211_commands {
* @NL80211_ATTR_PEER_AID: Association ID for the peer TDLS station (u16).
* This is similar to @NL80211_ATTR_STA_AID but with a difference of being
* allowed to be used with the first @NL80211_CMD_SET_STATION command to
* update a TDLS peer STA entry.
* update a TDLS peer STA entry. For S1G interfaces, this is limited to
* 1600 for the current mac80211 implementation.
*
* @NL80211_ATTR_COALESCE_RULE: Coalesce rule information.
*
@ -2858,8 +2880,9 @@ enum nl80211_commands {
* index. If the userspace includes more RNR elements than number of
* MBSSID elements then these will be added in every EMA beacon.
*
* @NL80211_ATTR_MLO_LINK_DISABLED: Flag attribute indicating that the link is
* disabled.
* @NL80211_ATTR_MLO_LINK_DISABLED: Unused. It was used to indicate that a link
* is disabled during association. However, the AP will send the
* information by including a TTLM in the association response.
*
* @NL80211_ATTR_BSS_DUMP_INCLUDE_USE_DATA: Include BSS usage data, i.e.
* include BSSes that can only be used in restricted scenarios and/or
@ -2928,6 +2951,29 @@ enum nl80211_commands {
* required alongside this attribute. Refer to
* @enum nl80211_s1g_short_beacon_attrs for the attribute definitions.
*
* @NL80211_ATTR_BSS_PARAM: nested attribute used with %NL80211_CMD_GET_WIPHY
* which indicates which BSS parameters can be modified. The attribute can
* also be used as flag attribute by user-space in %NL80211_CMD_SET_BSS to
* indicate that it wants strict checking on the BSS parameters to be
* modified.
*
* @NL80211_ATTR_NAN_CONFIG: Nested attribute for
* extended NAN cluster configuration. This is used with
* %NL80211_CMD_START_NAN and %NL80211_CMD_CHANGE_NAN_CONFIG.
* See &enum nl80211_nan_conf_attributes for details.
* This attribute is optional.
* @NL80211_ATTR_NAN_NEW_CLUSTER: Flag attribute indicating that a new
* NAN cluster has been created. This is used with
* %NL80211_CMD_NAN_CLUSTER_JOINED
* @NL80211_ATTR_NAN_CAPABILITIES: Nested attribute for NAN capabilities.
* This is used with %NL80211_CMD_GET_WIPHY to indicate the NAN
* capabilities supported by the driver. See &enum nl80211_nan_capabilities
* for details.
*
* @NL80211_ATTR_S1G_PRIMARY_2MHZ: flag attribute indicating that the S1G
* primary channel is 2 MHz wide, and the control channel designates
* the 1 MHz primary subchannel within that 2 MHz primary.
*
* @NUM_NL80211_ATTR: total number of nl80211_attrs available
* @NL80211_ATTR_MAX: highest attribute number currently defined
* @__NL80211_ATTR_AFTER_LAST: internal use
@ -3489,6 +3535,12 @@ enum nl80211_attrs {
NL80211_ATTR_S1G_LONG_BEACON_PERIOD,
NL80211_ATTR_S1G_SHORT_BEACON,
NL80211_ATTR_BSS_PARAM,
NL80211_ATTR_NAN_CONFIG,
NL80211_ATTR_NAN_NEW_CLUSTER,
NL80211_ATTR_NAN_CAPABILITIES,
NL80211_ATTR_S1G_PRIMARY_2MHZ,
/* add attributes here, update the policy in nl80211.c */
@ -3735,6 +3787,22 @@ enum nl80211_eht_gi {
NL80211_RATE_INFO_EHT_GI_3_2,
};
/**
* enum nl80211_eht_ltf - EHT long training field
* @NL80211_RATE_INFO_EHT_1XLTF: 3.2 usec
* @NL80211_RATE_INFO_EHT_2XLTF: 6.4 usec
* @NL80211_RATE_INFO_EHT_4XLTF: 12.8 usec
* @NL80211_RATE_INFO_EHT_6XLTF: 19.2 usec
* @NL80211_RATE_INFO_EHT_8XLTF: 25.6 usec
*/
enum nl80211_eht_ltf {
NL80211_RATE_INFO_EHT_1XLTF,
NL80211_RATE_INFO_EHT_2XLTF,
NL80211_RATE_INFO_EHT_4XLTF,
NL80211_RATE_INFO_EHT_6XLTF,
NL80211_RATE_INFO_EHT_8XLTF,
};
/**
* enum nl80211_eht_ru_alloc - EHT RU allocation values
* @NL80211_RATE_INFO_EHT_RU_ALLOC_26: 26-tone RU allocation
@ -4371,6 +4439,12 @@ enum nl80211_wmm_rule {
* very low power (VLP) AP, despite being NO_IR.
* @NL80211_FREQUENCY_ATTR_ALLOW_20MHZ_ACTIVITY: This channel can be active in
* 20 MHz bandwidth, despite being NO_IR.
* @NL80211_FREQUENCY_ATTR_NO_4MHZ: 4 MHz operation is not allowed on this
* channel in current regulatory domain.
* @NL80211_FREQUENCY_ATTR_NO_8MHZ: 8 MHz operation is not allowed on this
* channel in current regulatory domain.
* @NL80211_FREQUENCY_ATTR_NO_16MHZ: 16 MHz operation is not allowed on this
* channel in current regulatory domain.
* @NL80211_FREQUENCY_ATTR_MAX: highest frequency attribute number
* currently defined
* @__NL80211_FREQUENCY_ATTR_AFTER_LAST: internal use
@ -4416,6 +4490,9 @@ enum nl80211_frequency_attr {
NL80211_FREQUENCY_ATTR_CAN_MONITOR,
NL80211_FREQUENCY_ATTR_ALLOW_6GHZ_VLP_AP,
NL80211_FREQUENCY_ATTR_ALLOW_20MHZ_ACTIVITY,
NL80211_FREQUENCY_ATTR_NO_4MHZ,
NL80211_FREQUENCY_ATTR_NO_8MHZ,
NL80211_FREQUENCY_ATTR_NO_16MHZ,
/* keep last */
__NL80211_FREQUENCY_ATTR_AFTER_LAST,
@ -5481,6 +5558,10 @@ enum nl80211_key_attributes {
* see &struct nl80211_txrate_he
* @NL80211_TXRATE_HE_GI: configure HE GI, 0.8us, 1.6us and 3.2us.
* @NL80211_TXRATE_HE_LTF: configure HE LTF, 1XLTF, 2XLTF and 4XLTF.
* @NL80211_TXRATE_EHT: EHT rates allowed for TX rate selection,
* see &struct nl80211_txrate_eht
* @NL80211_TXRATE_EHT_GI: configure EHT GI, (u8, see &enum nl80211_eht_gi)
* @NL80211_TXRATE_EHT_LTF: configure EHT LTF, (u8, see &enum nl80211_eht_ltf)
* @__NL80211_TXRATE_AFTER_LAST: internal
* @NL80211_TXRATE_MAX: highest TX rate attribute
*/
@ -5493,6 +5574,9 @@ enum nl80211_tx_rate_attributes {
NL80211_TXRATE_HE,
NL80211_TXRATE_HE_GI,
NL80211_TXRATE_HE_LTF,
NL80211_TXRATE_EHT,
NL80211_TXRATE_EHT_GI,
NL80211_TXRATE_EHT_LTF,
/* keep last */
__NL80211_TXRATE_AFTER_LAST,
@ -5525,6 +5609,15 @@ enum nl80211_txrate_gi {
NL80211_TXRATE_FORCE_LGI,
};
#define NL80211_EHT_NSS_MAX 16
/**
* struct nl80211_txrate_eht - EHT MCS/NSS txrate bitmap
* @mcs: MCS bitmap table for each NSS (array index 0 for 1 stream, etc.)
*/
struct nl80211_txrate_eht {
__u16 mcs[NL80211_EHT_NSS_MAX];
};
/**
* enum nl80211_band - Frequency band
* @NL80211_BAND_2GHZ: 2.4 GHz ISM band
@ -6649,6 +6742,9 @@ enum nl80211_feature_flags {
* (signaling and payload protected) A-MSDUs and this shall be advertised
* in the RSNXE.
*
* @NL80211_EXT_FEATURE_BEACON_RATE_EHT: Driver supports beacon rate
* configuration (AP/mesh) with EHT rates.
*
* @NUM_NL80211_EXT_FEATURES: number of extended features.
* @MAX_NL80211_EXT_FEATURES: highest extended feature index.
*/
@ -6724,6 +6820,7 @@ enum nl80211_ext_feature_index {
NL80211_EXT_FEATURE_OWE_OFFLOAD_AP,
NL80211_EXT_FEATURE_DFS_CONCURRENT,
NL80211_EXT_FEATURE_SPP_AMSDU_SUPPORT,
NL80211_EXT_FEATURE_BEACON_RATE_EHT,
/* add new features before the definition below */
NUM_NL80211_EXT_FEATURES,
@ -7278,6 +7375,105 @@ enum nl80211_nan_match_attributes {
NL80211_NAN_MATCH_ATTR_MAX = NUM_NL80211_NAN_MATCH_ATTR - 1
};
/**
* enum nl80211_nan_band_conf_attributes - NAN band configuration attributes
* @__NL80211_NAN_BAND_CONF_INVALID: Invalid.
* @NL80211_NAN_BAND_CONF_BAND: Band for which the configuration is
* being set. The value is according to &enum nl80211_band (u8).
* @NL80211_NAN_BAND_CONF_FREQ: Discovery frequency. This attribute shall not
* be present on 2.4 GHZ band. On 5 GHz band its presence is optional.
* The allowed values are 5220 (channel 44) or 5745 (channel 149).
* If not present, channel 149 is used if allowed, otherwise channel 44
* will be selected. The value is in MHz (u16).
* @NL80211_NAN_BAND_CONF_RSSI_CLOSE: RSSI close threshold used for NAN state
* transition algorithm as described in chapters 3.3.6 and 3.3.7 "NAN
* Device Role and State Transition" of Wi-Fi Aware (TM) Specification
* v4.0. If not specified, default device value is used. The value should
* be greater than -60 dBm (s8).
* @NL80211_NAN_BAND_CONF_RSSI_MIDDLE: RSSI middle threshold used for NAN state
* transition algorithm as described in chapters 3.3.6 and 3.3.7 "NAN
* Device Role and State Transition" of Wi-Fi Aware (TM) Specification
* v4.0. If not present, default device value is used. The value should be
* greater than -75 dBm and less than %NL80211_NAN_BAND_CONF_RSSI_CLOSE
* (s8).
* @NL80211_NAN_BAND_CONF_WAKE_DW: Committed DW information (values 0-5).
* Value 0 means that the device will not wake up during the
* discovery window. Values 1-5 mean that the device will wake up
* during each 2^(n - 1) discovery window, where n is the value of
* this attribute. Setting this attribute to 0 is not allowed on
* 2.4 GHz band (u8). This is an optional parameter (default is 1).
* @NL80211_NAN_BAND_CONF_DISABLE_SCAN: Optional flag attribute to disable
* scanning (for cluster merge) on the band. If set, the device will not
* scan on this band anymore. Disabling scanning on 2.4 GHz band is not
* allowed.
* @NUM_NL80211_NAN_BAND_CONF_ATTR: Internal.
* @NL80211_NAN_BAND_CONF_ATTR_MAX: Highest NAN band configuration attribute.
*
* These attributes are used to configure NAN band-specific parameters. Note,
* that both RSSI attributes should be configured (or both left unset).
*/
enum nl80211_nan_band_conf_attributes {
__NL80211_NAN_BAND_CONF_INVALID,
NL80211_NAN_BAND_CONF_BAND,
NL80211_NAN_BAND_CONF_FREQ,
NL80211_NAN_BAND_CONF_RSSI_CLOSE,
NL80211_NAN_BAND_CONF_RSSI_MIDDLE,
NL80211_NAN_BAND_CONF_WAKE_DW,
NL80211_NAN_BAND_CONF_DISABLE_SCAN,
/* keep last */
NUM_NL80211_NAN_BAND_CONF_ATTR,
NL80211_NAN_BAND_CONF_ATTR_MAX = NUM_NL80211_NAN_BAND_CONF_ATTR - 1,
};
/**
* enum nl80211_nan_conf_attributes - NAN configuration attributes
* @__NL80211_NAN_CONF_INVALID: Invalid attribute, used for validation.
* @NL80211_NAN_CONF_CLUSTER_ID: ID for the NAN cluster. This is a MAC
* address that can take values from 50-6F-9A-01-00-00 to
* 50-6F-9A-01-FF-FF. This attribute is optional. If not present,
* a random Cluster ID will be chosen.
* @NL80211_NAN_CONF_EXTRA_ATTRS: Additional NAN attributes to be
* published in the beacons. This is an optional byte array.
* @NL80211_NAN_CONF_VENDOR_ELEMS: Vendor-specific elements that will
* be published in the beacons. This is an optional byte array.
* @NL80211_NAN_CONF_BAND_CONFIGS: This is a nested array attribute,
* containing multiple entries for each supported band. Each band
* configuration consists of &enum nl80211_nan_band_conf_attributes.
* @NL80211_NAN_CONF_SCAN_PERIOD: Scan period in seconds. If not configured,
* device default is used. Zero value will disable scanning.
* This is u16 (optional).
* @NL80211_NAN_CONF_SCAN_DWELL_TIME: Scan dwell time in TUs per channel.
* Only non-zero values are valid. If not configured the device default
* value is used. This is u16 (optional)
* @NL80211_NAN_CONF_DISCOVERY_BEACON_INTERVAL: Discovery beacon interval
* in TUs. Valid range is 50-200 TUs. If not configured the device default
* value is used. This is u8 (optional)
* @NL80211_NAN_CONF_NOTIFY_DW: If set, the driver will notify userspace about
* the upcoming discovery window with
* %NL80211_CMD_NAN_NEXT_DW_NOTIFICATION.
* This is a flag attribute.
* @NUM_NL80211_NAN_CONF_ATTR: Internal.
* @NL80211_NAN_CONF_ATTR_MAX: Highest NAN configuration attribute.
*
* These attributes are used to configure NAN-specific parameters.
*/
enum nl80211_nan_conf_attributes {
__NL80211_NAN_CONF_INVALID,
NL80211_NAN_CONF_CLUSTER_ID,
NL80211_NAN_CONF_EXTRA_ATTRS,
NL80211_NAN_CONF_VENDOR_ELEMS,
NL80211_NAN_CONF_BAND_CONFIGS,
NL80211_NAN_CONF_SCAN_PERIOD,
NL80211_NAN_CONF_SCAN_DWELL_TIME,
NL80211_NAN_CONF_DISCOVERY_BEACON_INTERVAL,
NL80211_NAN_CONF_NOTIFY_DW,
/* keep last */
NUM_NL80211_NAN_CONF_ATTR,
NL80211_NAN_CONF_ATTR_MAX = NUM_NL80211_NAN_CONF_ATTR - 1,
};
/**
* enum nl80211_external_auth_action - Action to perform with external
* authentication request. Used by NL80211_ATTR_EXTERNAL_AUTH_ACTION.
@ -8187,4 +8383,54 @@ enum nl80211_s1g_short_beacon_attrs {
__NL80211_S1G_SHORT_BEACON_ATTR_LAST - 1
};
/**
* enum nl80211_nan_capabilities - NAN (Neighbor Aware Networking)
* capabilities.
*
* @__NL80211_NAN_CAPABILITIES_INVALID: Invalid.
* @NL80211_NAN_CAPA_CONFIGURABLE_SYNC: Flag attribute indicating that
* the device supports configurable synchronization. If set, the device
* should be able to handle %NL80211_ATTR_NAN_CONFIG
* attribute in the %NL80211_CMD_START_NAN (and change) command.
* @NL80211_NAN_CAPA_USERSPACE_DE: Flag attribute indicating that
* NAN Discovery Engine (DE) is not offloaded and the driver assumes
* user space DE implementation. When set, %NL80211_CMD_ADD_NAN_FUNCTION,
* %NL80211_CMD_DEL_NAN_FUNCTION and %NL80211_CMD_NAN_MATCH commands
* should not be used. In addition, the device/driver should support
* sending discovery window (DW) notifications using
* %NL80211_CMD_NAN_NEXT_DW_NOTIFICATION and handling transmission and
* reception of NAN SDF frames on NAN device interface during DW windows.
* (%NL80211_CMD_FRAME is used to transmit SDFs)
* @NL80211_NAN_CAPA_OP_MODE: u8 attribute indicating the supported operation
* modes as defined in Wi-Fi Aware (TM) specification Table 81 (Operation
* Mode field format).
* @NL80211_NAN_CAPA_NUM_ANTENNAS: u8 attribute indicating the number of
* TX and RX antennas supported by the device. Lower nibble indicates
* the number of TX antennas and upper nibble indicates the number of RX
* antennas. Value 0 indicates the information is not available.
* See table 79 of Wi-Fi Aware (TM) specification (Number of
* Antennas field).
* @NL80211_NAN_CAPA_MAX_CHANNEL_SWITCH_TIME: u16 attribute indicating the
* maximum time in microseconds that the device requires to switch
* channels.
* @NL80211_NAN_CAPA_CAPABILITIES: u8 attribute containing the
* capabilities of the device as defined in Wi-Fi Aware (TM)
* specification Table 79 (Capabilities field).
* @__NL80211_NAN_CAPABILITIES_LAST: Internal
* @NL80211_NAN_CAPABILITIES_MAX: Highest NAN capability attribute.
*/
enum nl80211_nan_capabilities {
__NL80211_NAN_CAPABILITIES_INVALID,
NL80211_NAN_CAPA_CONFIGURABLE_SYNC,
NL80211_NAN_CAPA_USERSPACE_DE,
NL80211_NAN_CAPA_OP_MODE,
NL80211_NAN_CAPA_NUM_ANTENNAS,
NL80211_NAN_CAPA_MAX_CHANNEL_SWITCH_TIME,
NL80211_NAN_CAPA_CAPABILITIES,
/* keep last */
__NL80211_NAN_CAPABILITIES_LAST,
NL80211_NAN_CAPABILITIES_MAX = __NL80211_NAN_CAPABILITIES_LAST - 1,
};
#endif /* __LINUX_NL80211_H */

70
lib/libc/include/any-linux-any/linux/nsfs.h vendored
View file

@ -16,8 +16,6 @@
#define NS_GET_NSTYPE _IO(NSIO, 0x3)
/* Get owner UID (in the caller's user namespace) for a user namespace */
#define NS_GET_OWNER_UID _IO(NSIO, 0x4)
/* Get the id for a mount namespace */
#define NS_GET_MNTNS_ID _IOR(NSIO, 0x5, __u64)
/* Translate pid from target pid namespace into the caller's pid namespace. */
#define NS_GET_PID_FROM_PIDNS _IOR(NSIO, 0x6, int)
/* Return thread-group leader id of pid in the callers pid namespace. */
@ -42,6 +40,10 @@ struct mnt_ns_info {
/* Get previous namespace. */
#define NS_MNT_GET_PREV _IOR(NSIO, 12, struct mnt_ns_info)
/* Retrieve namespace identifiers. */
#define NS_GET_MNTNS_ID _IOR(NSIO, 5, __u64)
#define NS_GET_ID _IOR(NSIO, 13, __u64)
enum init_ns_ino {
IPC_NS_INIT_INO = 0xEFFFFFFFU,
UTS_NS_INIT_INO = 0xEFFFFFFEU,
@ -53,4 +55,68 @@ enum init_ns_ino {
MNT_NS_INIT_INO = 0xEFFFFFF8U,
};
struct nsfs_file_handle {
__u64 ns_id;
__u32 ns_type;
__u32 ns_inum;
};
#define NSFS_FILE_HANDLE_SIZE_VER0 16 /* sizeof first published struct */
#define NSFS_FILE_HANDLE_SIZE_LATEST sizeof(struct nsfs_file_handle) /* sizeof latest published struct */
enum init_ns_id {
IPC_NS_INIT_ID = 1ULL,
UTS_NS_INIT_ID = 2ULL,
USER_NS_INIT_ID = 3ULL,
PID_NS_INIT_ID = 4ULL,
CGROUP_NS_INIT_ID = 5ULL,
TIME_NS_INIT_ID = 6ULL,
NET_NS_INIT_ID = 7ULL,
MNT_NS_INIT_ID = 8ULL,
};
enum ns_type {
TIME_NS = (1ULL << 7), /* CLONE_NEWTIME */
MNT_NS = (1ULL << 17), /* CLONE_NEWNS */
CGROUP_NS = (1ULL << 25), /* CLONE_NEWCGROUP */
UTS_NS = (1ULL << 26), /* CLONE_NEWUTS */
IPC_NS = (1ULL << 27), /* CLONE_NEWIPC */
USER_NS = (1ULL << 28), /* CLONE_NEWUSER */
PID_NS = (1ULL << 29), /* CLONE_NEWPID */
NET_NS = (1ULL << 30), /* CLONE_NEWNET */
};
/**
* struct ns_id_req - namespace ID request structure
* @size: size of this structure
* @spare: reserved for future use
* @filter: filter mask
* @ns_id: last namespace id
* @user_ns_id: owning user namespace ID
*
* Structure for passing namespace ID and miscellaneous parameters to
* statns(2) and listns(2).
*
* For statns(2) @param represents the request mask.
* For listns(2) @param represents the last listed mount id (or zero).
*/
struct ns_id_req {
__u32 size;
__u32 spare;
__u64 ns_id;
struct /* listns */ {
__u32 ns_type;
__u32 spare2;
__u64 user_ns_id;
};
};
/*
* Special @user_ns_id value that can be passed to listns()
*/
#define LISTNS_CURRENT_USER 0xffffffffffffffff /* Caller's userns */
/* List of all ns_id_req versions. */
#define NS_ID_REQ_SIZE_VER0 32 /* sizeof first published struct */
#endif /* __LINUX_NSFS_H */

1
lib/libc/include/any-linux-any/linux/ovpn.h vendored
View file

@ -2,6 +2,7 @@
/* Do not edit directly, auto-generated from: */
/* Documentation/netlink/specs/ovpn.yaml */
/* YNL-GEN uapi header */
/* To regenerate run: tools/net/ynl/ynl-regen.sh */
#ifndef _LINUX_OVPN_H
#define _LINUX_OVPN_H

99
lib/libc/include/any-linux-any/linux/pci_regs.h vendored
View file

@ -207,6 +207,9 @@
/* Capability lists */
#define PCI_CAP_ID_MASK 0x00ff /* Capability ID mask */
#define PCI_CAP_LIST_NEXT_MASK 0xff00 /* Next Capability Pointer mask */
#define PCI_CAP_LIST_ID 0 /* Capability ID */
#define PCI_CAP_ID_PM 0x01 /* Power Management */
#define PCI_CAP_ID_AGP 0x02 /* Accelerated Graphics Port */
@ -500,6 +503,7 @@
#define PCI_EXP_DEVCAP_PWR_VAL 0x03fc0000 /* Slot Power Limit Value */
#define PCI_EXP_DEVCAP_PWR_SCL 0x0c000000 /* Slot Power Limit Scale */
#define PCI_EXP_DEVCAP_FLR 0x10000000 /* Function Level Reset */
#define PCI_EXP_DEVCAP_TEE 0x40000000 /* TEE I/O (TDISP) Support */
#define PCI_EXP_DEVCTL 0x08 /* Device Control */
#define PCI_EXP_DEVCTL_CERE 0x0001 /* Correctable Error Reporting En. */
#define PCI_EXP_DEVCTL_NFERE 0x0002 /* Non-Fatal Error Reporting Enable */
@ -751,6 +755,8 @@
#define PCI_EXT_CAP_ID_NPEM 0x29 /* Native PCIe Enclosure Management */
#define PCI_EXT_CAP_ID_PL_32GT 0x2A /* Physical Layer 32.0 GT/s */
#define PCI_EXT_CAP_ID_DOE 0x2E /* Data Object Exchange */
#define PCI_EXT_CAP_ID_DEV3 0x2F /* Device 3 Capability/Control/Status */
#define PCI_EXT_CAP_ID_IDE 0x30 /* Integrity and Data Encryption */
#define PCI_EXT_CAP_ID_PL_64GT 0x31 /* Physical Layer 64.0 GT/s */
#define PCI_EXT_CAP_ID_MAX PCI_EXT_CAP_ID_PL_64GT
@ -776,6 +782,12 @@
#define PCI_ERR_UNC_MCBTLP 0x00800000 /* MC blocked TLP */
#define PCI_ERR_UNC_ATOMEG 0x01000000 /* Atomic egress blocked */
#define PCI_ERR_UNC_TLPPRE 0x02000000 /* TLP prefix blocked */
#define PCI_ERR_UNC_POISON_BLK 0x04000000 /* Poisoned TLP Egress Blocked */
#define PCI_ERR_UNC_DMWR_BLK 0x08000000 /* DMWr Request Egress Blocked */
#define PCI_ERR_UNC_IDE_CHECK 0x10000000 /* IDE Check Failed */
#define PCI_ERR_UNC_MISR_IDE 0x20000000 /* Misrouted IDE TLP */
#define PCI_ERR_UNC_PCRC_CHECK 0x40000000 /* PCRC Check Failed */
#define PCI_ERR_UNC_XLAT_BLK 0x80000000 /* TLP Translation Egress Blocked */
#define PCI_ERR_UNCOR_MASK 0x08 /* Uncorrectable Error Mask */
/* Same bits as above */
#define PCI_ERR_UNCOR_SEVER 0x0c /* Uncorrectable Error Severity */
@ -798,6 +810,7 @@
#define PCI_ERR_CAP_ECRC_CHKC 0x00000080 /* ECRC Check Capable */
#define PCI_ERR_CAP_ECRC_CHKE 0x00000100 /* ECRC Check Enable */
#define PCI_ERR_CAP_PREFIX_LOG_PRESENT 0x00000800 /* TLP Prefix Log Present */
#define PCI_ERR_CAP_COMP_TIME_LOG 0x00001000 /* Completion Timeout Prefix/Header Log Capable */
#define PCI_ERR_CAP_TLP_LOG_FLIT 0x00040000 /* TLP was logged in Flit Mode */
#define PCI_ERR_CAP_TLP_LOG_SIZE 0x00f80000 /* Logged TLP Size (only in Flit mode) */
#define PCI_ERR_HEADER_LOG 0x1c /* Header Log Register (16 bytes) */
@ -1234,9 +1247,95 @@
/* Deprecated old name, replaced with PCI_DOE_DATA_OBJECT_DISC_RSP_3_TYPE */
#define PCI_DOE_DATA_OBJECT_DISC_RSP_3_PROTOCOL PCI_DOE_DATA_OBJECT_DISC_RSP_3_TYPE
/* Device 3 Extended Capability */
#define PCI_DEV3_CAP 0x04 /* Device 3 Capabilities Register */
#define PCI_DEV3_CTL 0x08 /* Device 3 Control Register */
#define PCI_DEV3_STA 0x0c /* Device 3 Status Register */
#define PCI_DEV3_STA_SEGMENT 0x8 /* Segment Captured (end-to-end flit-mode detected) */
/* Compute Express Link (CXL r3.1, sec 8.1.5) */
#define PCI_DVSEC_CXL_PORT 3
#define PCI_DVSEC_CXL_PORT_CTL 0x0c
#define PCI_DVSEC_CXL_PORT_CTL_UNMASK_SBR 0x00000001
/* Integrity and Data Encryption Extended Capability */
#define PCI_IDE_CAP 0x04
#define PCI_IDE_CAP_LINK 0x1 /* Link IDE Stream Supported */
#define PCI_IDE_CAP_SELECTIVE 0x2 /* Selective IDE Streams Supported */
#define PCI_IDE_CAP_FLOWTHROUGH 0x4 /* Flow-Through IDE Stream Supported */
#define PCI_IDE_CAP_PARTIAL_HEADER_ENC 0x8 /* Partial Header Encryption Supported */
#define PCI_IDE_CAP_AGGREGATION 0x10 /* Aggregation Supported */
#define PCI_IDE_CAP_PCRC 0x20 /* PCRC Supported */
#define PCI_IDE_CAP_IDE_KM 0x40 /* IDE_KM Protocol Supported */
#define PCI_IDE_CAP_SEL_CFG 0x80 /* Selective IDE for Config Request Support */
#define PCI_IDE_CAP_ALG __GENMASK(12, 8) /* Supported Algorithms */
#define PCI_IDE_CAP_ALG_AES_GCM_256 0 /* AES-GCM 256 key size, 96b MAC */
#define PCI_IDE_CAP_LINK_TC_NUM __GENMASK(15, 13) /* Link IDE TCs */
#define PCI_IDE_CAP_SEL_NUM __GENMASK(23, 16) /* Supported Selective IDE Streams */
#define PCI_IDE_CAP_TEE_LIMITED 0x1000000 /* TEE-Limited Stream Supported */
#define PCI_IDE_CTL 0x08
#define PCI_IDE_CTL_FLOWTHROUGH_IDE 0x4 /* Flow-Through IDE Stream Enabled */
#define PCI_IDE_LINK_STREAM_0 0xc /* First Link Stream Register Block */
#define PCI_IDE_LINK_BLOCK_SIZE 8
/* Link IDE Stream block, up to PCI_IDE_CAP_LINK_TC_NUM */
#define PCI_IDE_LINK_CTL_0 0x00 /* First Link Control Register Offset in block */
#define PCI_IDE_LINK_CTL_EN 0x1 /* Link IDE Stream Enable */
#define PCI_IDE_LINK_CTL_TX_AGGR_NPR __GENMASK(3, 2) /* Tx Aggregation Mode NPR */
#define PCI_IDE_LINK_CTL_TX_AGGR_PR __GENMASK(5, 4) /* Tx Aggregation Mode PR */
#define PCI_IDE_LINK_CTL_TX_AGGR_CPL __GENMASK(7, 6) /* Tx Aggregation Mode CPL */
#define PCI_IDE_LINK_CTL_PCRC_EN 0x100 /* PCRC Enable */
#define PCI_IDE_LINK_CTL_PART_ENC __GENMASK(13, 10) /* Partial Header Encryption Mode */
#define PCI_IDE_LINK_CTL_ALG __GENMASK(18, 14) /* Selection from PCI_IDE_CAP_ALG */
#define PCI_IDE_LINK_CTL_TC __GENMASK(21, 19) /* Traffic Class */
#define PCI_IDE_LINK_CTL_ID __GENMASK(31, 24) /* Stream ID */
#define PCI_IDE_LINK_STS_0 0x4 /* First Link Status Register Offset in block */
#define PCI_IDE_LINK_STS_STATE __GENMASK(3, 0) /* Link IDE Stream State */
#define PCI_IDE_LINK_STS_IDE_FAIL 0x80000000 /* IDE fail message received */
/* Selective IDE Stream block, up to PCI_IDE_CAP_SELECTIVE_STREAMS_NUM */
/* Selective IDE Stream Capability Register */
#define PCI_IDE_SEL_CAP 0x00
#define PCI_IDE_SEL_CAP_ASSOC_NUM __GENMASK(3, 0)
/* Selective IDE Stream Control Register */
#define PCI_IDE_SEL_CTL 0x04
#define PCI_IDE_SEL_CTL_EN 0x1 /* Selective IDE Stream Enable */
#define PCI_IDE_SEL_CTL_TX_AGGR_NPR __GENMASK(3, 2) /* Tx Aggregation Mode NPR */
#define PCI_IDE_SEL_CTL_TX_AGGR_PR __GENMASK(5, 4) /* Tx Aggregation Mode PR */
#define PCI_IDE_SEL_CTL_TX_AGGR_CPL __GENMASK(7, 6) /* Tx Aggregation Mode CPL */
#define PCI_IDE_SEL_CTL_PCRC_EN 0x100 /* PCRC Enable */
#define PCI_IDE_SEL_CTL_CFG_EN 0x200 /* Selective IDE for Configuration Requests */
#define PCI_IDE_SEL_CTL_PART_ENC __GENMASK(13, 10) /* Partial Header Encryption Mode */
#define PCI_IDE_SEL_CTL_ALG __GENMASK(18, 14) /* Selection from PCI_IDE_CAP_ALG */
#define PCI_IDE_SEL_CTL_TC __GENMASK(21, 19) /* Traffic Class */
#define PCI_IDE_SEL_CTL_DEFAULT 0x400000 /* Default Stream */
#define PCI_IDE_SEL_CTL_TEE_LIMITED 0x800000 /* TEE-Limited Stream */
#define PCI_IDE_SEL_CTL_ID __GENMASK(31, 24) /* Stream ID */
#define PCI_IDE_SEL_CTL_ID_MAX 255
/* Selective IDE Stream Status Register */
#define PCI_IDE_SEL_STS 0x08
#define PCI_IDE_SEL_STS_STATE __GENMASK(3, 0) /* Selective IDE Stream State */
#define PCI_IDE_SEL_STS_STATE_INSECURE 0
#define PCI_IDE_SEL_STS_STATE_SECURE 2
#define PCI_IDE_SEL_STS_IDE_FAIL 0x80000000 /* IDE fail message received */
/* IDE RID Association Register 1 */
#define PCI_IDE_SEL_RID_1 0x0c
#define PCI_IDE_SEL_RID_1_LIMIT __GENMASK(23, 8)
/* IDE RID Association Register 2 */
#define PCI_IDE_SEL_RID_2 0x10
#define PCI_IDE_SEL_RID_2_VALID 0x1
#define PCI_IDE_SEL_RID_2_BASE __GENMASK(23, 8)
#define PCI_IDE_SEL_RID_2_SEG __GENMASK(31, 24)
/* Selective IDE Address Association Register Block, up to PCI_IDE_SEL_CAP_ASSOC_NUM */
#define PCI_IDE_SEL_ADDR_BLOCK_SIZE 12
#define PCI_IDE_SEL_ADDR_1(x) (20 + (x) * PCI_IDE_SEL_ADDR_BLOCK_SIZE)
#define PCI_IDE_SEL_ADDR_1_VALID 0x1
#define PCI_IDE_SEL_ADDR_1_BASE_LOW __GENMASK(19, 8)
#define PCI_IDE_SEL_ADDR_1_LIMIT_LOW __GENMASK(31, 20)
/* IDE Address Association Register 2 is "Memory Limit Upper" */
#define PCI_IDE_SEL_ADDR_2(x) (24 + (x) * PCI_IDE_SEL_ADDR_BLOCK_SIZE)
/* IDE Address Association Register 3 is "Memory Base Upper" */
#define PCI_IDE_SEL_ADDR_3(x) (28 + (x) * PCI_IDE_SEL_ADDR_BLOCK_SIZE)
#define PCI_IDE_SEL_BLOCK_SIZE(nr_assoc) (20 + PCI_IDE_SEL_ADDR_BLOCK_SIZE * (nr_assoc))
#endif /* LINUX_PCI_REGS_H */

25
lib/libc/include/any-linux-any/linux/perf_event.h vendored
View file

@ -2,7 +2,7 @@
/*
* Performance events:
*
* Copyright (C) 2008-2009, Thomas Gleixner <tglx@linutronix.de>
* Copyright (C) 2008-2009, Linutronix GmbH, Thomas Gleixner <tglx@kernel.org>
* Copyright (C) 2008-2011, Red Hat, Inc., Ingo Molnar
* Copyright (C) 2008-2011, Red Hat, Inc., Peter Zijlstra
*
@ -382,6 +382,7 @@ enum perf_event_read_format {
#define PERF_ATTR_SIZE_VER6 120 /* Add: aux_sample_size */
#define PERF_ATTR_SIZE_VER7 128 /* Add: sig_data */
#define PERF_ATTR_SIZE_VER8 136 /* Add: config3 */
#define PERF_ATTR_SIZE_VER9 144 /* add: config4 */
/*
* 'struct perf_event_attr' contains various attributes that define
@ -463,7 +464,9 @@ struct perf_event_attr {
inherit_thread : 1, /* children only inherit if cloned with CLONE_THREAD */
remove_on_exec : 1, /* event is removed from task on exec */
sigtrap : 1, /* send synchronous SIGTRAP on event */
__reserved_1 : 26;
defer_callchain: 1, /* request PERF_RECORD_CALLCHAIN_DEFERRED records */
defer_output : 1, /* output PERF_RECORD_CALLCHAIN_DEFERRED records */
__reserved_1 : 24;
union {
__u32 wakeup_events; /* wake up every n events */
@ -543,6 +546,7 @@ struct perf_event_attr {
__u64 sig_data;
__u64 config3; /* extension of config2 */
__u64 config4; /* extension of config3 */
};
/*
@ -1239,6 +1243,22 @@ enum perf_event_type {
*/
PERF_RECORD_AUX_OUTPUT_HW_ID = 21,
/*
* This user callchain capture was deferred until shortly before
* returning to user space. Previous samples would have kernel
* callchains only and they need to be stitched with this to make full
* callchains.
*
* struct {
* struct perf_event_header header;
* u64 cookie;
* u64 nr;
* u64 ips[nr];
* struct sample_id sample_id;
* };
*/
PERF_RECORD_CALLCHAIN_DEFERRED = 22,
PERF_RECORD_MAX, /* non-ABI */
};
@ -1269,6 +1289,7 @@ enum perf_callchain_context {
PERF_CONTEXT_HV = (__u64)-32,
PERF_CONTEXT_KERNEL = (__u64)-128,
PERF_CONTEXT_USER = (__u64)-512,
PERF_CONTEXT_USER_DEFERRED = (__u64)-640,
PERF_CONTEXT_GUEST = (__u64)-2048,
PERF_CONTEXT_GUEST_KERNEL = (__u64)-2176,

11
lib/libc/include/any-linux-any/linux/pidfd.h vendored
View file

@ -22,8 +22,12 @@
#define PIDFD_INFO_CGROUPID (1UL << 2) /* Always returned if available, even if not requested */
#define PIDFD_INFO_EXIT (1UL << 3) /* Only returned if requested. */
#define PIDFD_INFO_COREDUMP (1UL << 4) /* Only returned if requested. */
#define PIDFD_INFO_SUPPORTED_MASK (1UL << 5) /* Want/got supported mask flags */
#define PIDFD_INFO_COREDUMP_SIGNAL (1UL << 6) /* Always returned if PIDFD_INFO_COREDUMP is requested. */
#define PIDFD_INFO_SIZE_VER0 64 /* sizeof first published struct */
#define PIDFD_INFO_SIZE_VER1 72 /* sizeof second published struct */
#define PIDFD_INFO_SIZE_VER2 80 /* sizeof third published struct */
/*
* Values for @coredump_mask in pidfd_info.
@ -87,8 +91,11 @@ struct pidfd_info {
__u32 fsuid;
__u32 fsgid;
__s32 exit_code;
__u32 coredump_mask;
__u32 __spare1;
struct /* coredump info */ {
__u32 coredump_mask;
__u32 coredump_signal;
};
__u64 supported_mask; /* Mask flags that this kernel supports */
};
#define PIDFS_IOCTL_MAGIC 0xFF

16
lib/libc/include/any-linux-any/linux/pr.h vendored
View file

@ -56,6 +56,18 @@ struct pr_clear {
__u32 __pad;
};
struct pr_read_keys {
__u32 generation;
__u32 num_keys;
__u64 keys_ptr;
};
struct pr_read_reservation {
__u64 key;
__u32 generation;
__u32 type;
};
#define PR_FL_IGNORE_KEY (1 << 0) /* ignore existing key */
#define IOC_PR_REGISTER _IOW('p', 200, struct pr_registration)
@ -64,5 +76,9 @@ struct pr_clear {
#define IOC_PR_PREEMPT _IOW('p', 203, struct pr_preempt)
#define IOC_PR_PREEMPT_ABORT _IOW('p', 204, struct pr_preempt)
#define IOC_PR_CLEAR _IOW('p', 205, struct pr_clear)
#define IOC_PR_READ_KEYS _IOWR('p', 206, struct pr_read_keys)
#define IOC_PR_READ_RESERVATION _IOR('p', 207, struct pr_read_reservation)
#define PR_KEYS_MAX (1u << 16)
#endif /* _PR_H */

10
lib/libc/include/any-linux-any/linux/prctl.h vendored
View file

@ -177,7 +177,17 @@ struct prctl_mm_map {
#define PR_GET_TID_ADDRESS 40
/*
* Flags for PR_SET_THP_DISABLE are only applicable when disabling. Bit 0
* is reserved, so PR_GET_THP_DISABLE can return "1 | flags", to effectively
* return "1" when no flags were specified for PR_SET_THP_DISABLE.
*/
#define PR_SET_THP_DISABLE 41
/*
* Don't disable THPs when explicitly advised (e.g., MADV_HUGEPAGE /
* VM_HUGEPAGE, MADV_COLLAPSE).
*/
# define PR_THP_DISABLE_EXCEPT_ADVISED (1 << 1)
#define PR_GET_THP_DISABLE 42
/*

76
lib/libc/include/any-linux-any/linux/psp-sev.h vendored
View file

@ -47,32 +47,32 @@ typedef enum {
* with possible values from the specification.
*/
SEV_RET_NO_FW_CALL = -1,
SEV_RET_SUCCESS = 0,
SEV_RET_INVALID_PLATFORM_STATE,
SEV_RET_INVALID_GUEST_STATE,
SEV_RET_INAVLID_CONFIG,
SEV_RET_SUCCESS = 0,
SEV_RET_INVALID_PLATFORM_STATE = 0x0001,
SEV_RET_INVALID_GUEST_STATE = 0x0002,
SEV_RET_INAVLID_CONFIG = 0x0003,
SEV_RET_INVALID_CONFIG = SEV_RET_INAVLID_CONFIG,
SEV_RET_INVALID_LEN,
SEV_RET_ALREADY_OWNED,
SEV_RET_INVALID_CERTIFICATE,
SEV_RET_POLICY_FAILURE,
SEV_RET_INACTIVE,
SEV_RET_INVALID_ADDRESS,
SEV_RET_BAD_SIGNATURE,
SEV_RET_BAD_MEASUREMENT,
SEV_RET_ASID_OWNED,
SEV_RET_INVALID_ASID,
SEV_RET_WBINVD_REQUIRED,
SEV_RET_DFFLUSH_REQUIRED,
SEV_RET_INVALID_GUEST,
SEV_RET_INVALID_COMMAND,
SEV_RET_ACTIVE,
SEV_RET_HWSEV_RET_PLATFORM,
SEV_RET_HWSEV_RET_UNSAFE,
SEV_RET_UNSUPPORTED,
SEV_RET_INVALID_PARAM,
SEV_RET_RESOURCE_LIMIT,
SEV_RET_SECURE_DATA_INVALID,
SEV_RET_INVALID_LEN = 0x0004,
SEV_RET_ALREADY_OWNED = 0x0005,
SEV_RET_INVALID_CERTIFICATE = 0x0006,
SEV_RET_POLICY_FAILURE = 0x0007,
SEV_RET_INACTIVE = 0x0008,
SEV_RET_INVALID_ADDRESS = 0x0009,
SEV_RET_BAD_SIGNATURE = 0x000A,
SEV_RET_BAD_MEASUREMENT = 0x000B,
SEV_RET_ASID_OWNED = 0x000C,
SEV_RET_INVALID_ASID = 0x000D,
SEV_RET_WBINVD_REQUIRED = 0x000E,
SEV_RET_DFFLUSH_REQUIRED = 0x000F,
SEV_RET_INVALID_GUEST = 0x0010,
SEV_RET_INVALID_COMMAND = 0x0011,
SEV_RET_ACTIVE = 0x0012,
SEV_RET_HWSEV_RET_PLATFORM = 0x0013,
SEV_RET_HWSEV_RET_UNSAFE = 0x0014,
SEV_RET_UNSUPPORTED = 0x0015,
SEV_RET_INVALID_PARAM = 0x0016,
SEV_RET_RESOURCE_LIMIT = 0x0017,
SEV_RET_SECURE_DATA_INVALID = 0x0018,
SEV_RET_INVALID_PAGE_SIZE = 0x0019,
SEV_RET_INVALID_PAGE_STATE = 0x001A,
SEV_RET_INVALID_MDATA_ENTRY = 0x001B,
@ -87,6 +87,22 @@ typedef enum {
SEV_RET_RESTORE_REQUIRED = 0x0025,
SEV_RET_RMP_INITIALIZATION_FAILED = 0x0026,
SEV_RET_INVALID_KEY = 0x0027,
SEV_RET_SHUTDOWN_INCOMPLETE = 0x0028,
SEV_RET_INCORRECT_BUFFER_LENGTH = 0x0030,
SEV_RET_EXPAND_BUFFER_LENGTH_REQUEST = 0x0031,
SEV_RET_SPDM_REQUEST = 0x0032,
SEV_RET_SPDM_ERROR = 0x0033,
SEV_RET_SEV_STATUS_ERR_IN_DEV_CONN = 0x0035,
SEV_RET_SEV_STATUS_INVALID_DEV_CTX = 0x0036,
SEV_RET_SEV_STATUS_INVALID_TDI_CTX = 0x0037,
SEV_RET_SEV_STATUS_INVALID_TDI = 0x0038,
SEV_RET_SEV_STATUS_RECLAIM_REQUIRED = 0x0039,
SEV_RET_IN_USE = 0x003A,
SEV_RET_SEV_STATUS_INVALID_DEV_STATE = 0x003B,
SEV_RET_SEV_STATUS_INVALID_TDI_STATE = 0x003C,
SEV_RET_SEV_STATUS_DEV_CERT_CHANGED = 0x003D,
SEV_RET_SEV_STATUS_RESYNC_REQ = 0x003E,
SEV_RET_SEV_STATUS_RESPONSE_TOO_LARGE = 0x003F,
SEV_RET_MAX,
} sev_ret_code;
@ -185,6 +201,10 @@ struct sev_user_data_get_id2 {
* @mask_chip_id: whether chip id is present in attestation reports or not
* @mask_chip_key: whether attestation reports are signed or not
* @vlek_en: VLEK (Version Loaded Endorsement Key) hashstick is loaded
* @feature_info: whether SNP_FEATURE_INFO command is available
* @rapl_dis: whether RAPL is disabled
* @ciphertext_hiding_cap: whether platform has ciphertext hiding capability
* @ciphertext_hiding_en: whether ciphertext hiding is enabled
* @rsvd1: reserved
* @guest_count: the number of guest currently managed by the firmware
* @current_tcb_version: current TCB version
@ -200,7 +220,11 @@ struct sev_user_data_snp_status {
__u32 mask_chip_id:1; /* Out */
__u32 mask_chip_key:1; /* Out */
__u32 vlek_en:1; /* Out */
__u32 rsvd1:29;
__u32 feature_info:1; /* Out */
__u32 rapl_dis:1; /* Out */
__u32 ciphertext_hiding_cap:1; /* Out */
__u32 ciphertext_hiding_en:1; /* Out */
__u32 rsvd1:25;
__u32 guest_count; /* Out */
__u64 current_tcb_version; /* Out */
__u64 reported_tcb_version; /* Out */

87
lib/libc/include/any-linux-any/linux/psp-sfs.h vendored Normal file
View file

@ -0,0 +1,87 @@
/* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */
/*
* Userspace interface for AMD Seamless Firmware Servicing (SFS)
*
* Copyright (C) 2025 Advanced Micro Devices, Inc.
*
* Author: Ashish Kalra <ashish.kalra@amd.com>
*/
#ifndef __PSP_SFS_USER_H__
#define __PSP_SFS_USER_H__
#include <linux/types.h>
/**
* SFS: AMD Seamless Firmware Support (SFS) interface
*/
#define PAYLOAD_NAME_SIZE 64
#define TEE_EXT_CMD_BUFFER_SIZE 4096
/**
* struct sfs_user_get_fw_versions - get current level of base firmware (output).
* @blob: current level of base firmware for ASP and patch levels (input/output).
* @sfs_status: 32-bit SFS status value (output).
* @sfs_extended_status: 32-bit SFS extended status value (output).
*/
struct sfs_user_get_fw_versions {
__u8 blob[TEE_EXT_CMD_BUFFER_SIZE];
__u32 sfs_status;
__u32 sfs_extended_status;
} __attribute__((packed));
/**
* struct sfs_user_update_package - update SFS package (input).
* @payload_name: name of SFS package to load, verify and execute (input).
* @sfs_status: 32-bit SFS status value (output).
* @sfs_extended_status: 32-bit SFS extended status value (output).
*/
struct sfs_user_update_package {
char payload_name[PAYLOAD_NAME_SIZE];
__u32 sfs_status;
__u32 sfs_extended_status;
} __attribute__((packed));
/**
* Seamless Firmware Support (SFS) IOC
*
* possible return codes for all SFS IOCTLs:
* 0: success
* -EINVAL: invalid input
* -E2BIG: excess data passed
* -EFAULT: failed to copy to/from userspace
* -EBUSY: mailbox in recovery or in use
* -ENODEV: driver not bound with PSP device
* -EACCES: request isn't authorized
* -EINVAL: invalid parameter
* -ETIMEDOUT: request timed out
* -EAGAIN: invalid request for state machine
* -ENOENT: not implemented
* -ENFILE: overflow
* -EPERM: invalid signature
* -EIO: PSP I/O error
*/
#define SFS_IOC_TYPE 'S'
/**
* SFSIOCFWVERS - returns blob containing FW versions
* ASP provides the current level of Base Firmware for the ASP
* and the other microprocessors as well as current patch
* level(s).
*/
#define SFSIOCFWVERS _IOWR(SFS_IOC_TYPE, 0x1, struct sfs_user_get_fw_versions)
/**
* SFSIOCUPDATEPKG - updates package/payload
* ASP loads, verifies and executes the SFS package.
* By default, the SFS package/payload is loaded from
* /lib/firmware/amd, but alternative firmware loading
* path can be specified using kernel parameter
* firmware_class.path or the firmware loading path
* can be customized using sysfs file:
* /sys/module/firmware_class/parameters/path.
*/
#define SFSIOCUPDATEPKG _IOWR(SFS_IOC_TYPE, 0x2, struct sfs_user_update_package)
#endif /* __PSP_SFS_USER_H__ */

85
lib/libc/include/any-linux-any/linux/psp.h vendored Normal file
View file

@ -0,0 +1,85 @@
/* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause) */
/* Do not edit directly, auto-generated from: */
/* Documentation/netlink/specs/psp.yaml */
/* YNL-GEN uapi header */
/* To regenerate run: tools/net/ynl/ynl-regen.sh */
#ifndef _LINUX_PSP_H
#define _LINUX_PSP_H
#define PSP_FAMILY_NAME "psp"
#define PSP_FAMILY_VERSION 1
enum psp_version {
PSP_VERSION_HDR0_AES_GCM_128,
PSP_VERSION_HDR0_AES_GCM_256,
PSP_VERSION_HDR0_AES_GMAC_128,
PSP_VERSION_HDR0_AES_GMAC_256,
};
enum {
PSP_A_DEV_ID = 1,
PSP_A_DEV_IFINDEX,
PSP_A_DEV_PSP_VERSIONS_CAP,
PSP_A_DEV_PSP_VERSIONS_ENA,
__PSP_A_DEV_MAX,
PSP_A_DEV_MAX = (__PSP_A_DEV_MAX - 1)
};
enum {
PSP_A_ASSOC_DEV_ID = 1,
PSP_A_ASSOC_VERSION,
PSP_A_ASSOC_RX_KEY,
PSP_A_ASSOC_TX_KEY,
PSP_A_ASSOC_SOCK_FD,
__PSP_A_ASSOC_MAX,
PSP_A_ASSOC_MAX = (__PSP_A_ASSOC_MAX - 1)
};
enum {
PSP_A_KEYS_KEY = 1,
PSP_A_KEYS_SPI,
__PSP_A_KEYS_MAX,
PSP_A_KEYS_MAX = (__PSP_A_KEYS_MAX - 1)
};
enum {
PSP_A_STATS_DEV_ID = 1,
PSP_A_STATS_KEY_ROTATIONS,
PSP_A_STATS_STALE_EVENTS,
PSP_A_STATS_RX_PACKETS,
PSP_A_STATS_RX_BYTES,
PSP_A_STATS_RX_AUTH_FAIL,
PSP_A_STATS_RX_ERROR,
PSP_A_STATS_RX_BAD,
PSP_A_STATS_TX_PACKETS,
PSP_A_STATS_TX_BYTES,
PSP_A_STATS_TX_ERROR,
__PSP_A_STATS_MAX,
PSP_A_STATS_MAX = (__PSP_A_STATS_MAX - 1)
};
enum {
PSP_CMD_DEV_GET = 1,
PSP_CMD_DEV_ADD_NTF,
PSP_CMD_DEV_DEL_NTF,
PSP_CMD_DEV_SET,
PSP_CMD_DEV_CHANGE_NTF,
PSP_CMD_KEY_ROTATE,
PSP_CMD_KEY_ROTATE_NTF,
PSP_CMD_RX_ASSOC,
PSP_CMD_TX_ASSOC,
PSP_CMD_GET_STATS,
__PSP_CMD_MAX,
PSP_CMD_MAX = (__PSP_CMD_MAX - 1)
};
#define PSP_MCGRP_MGMT "mgmt"
#define PSP_MCGRP_USE "use"
#endif /* _LINUX_PSP_H */

4
lib/libc/include/any-linux-any/linux/ptp_clock.h vendored
View file

@ -248,6 +248,10 @@ struct ptp_pin_desc {
_IOWR(PTP_CLK_MAGIC, 18, struct ptp_sys_offset_extended)
#define PTP_MASK_CLEAR_ALL _IO(PTP_CLK_MAGIC, 19)
#define PTP_MASK_EN_SINGLE _IOW(PTP_CLK_MAGIC, 20, unsigned int)
#define PTP_SYS_OFFSET_PRECISE_CYCLES \
_IOWR(PTP_CLK_MAGIC, 21, struct ptp_sys_offset_precise)
#define PTP_SYS_OFFSET_EXTENDED_CYCLES \
_IOWR(PTP_CLK_MAGIC, 22, struct ptp_sys_offset_extended)
struct ptp_extts_event {
struct ptp_clock_time t; /* Time event occurred. */

3
lib/libc/include/any-linux-any/linux/raid/md_p.h vendored
View file

@ -291,7 +291,8 @@ struct mdp_superblock_1 {
__le64 resync_offset; /* data before this offset (from data_offset) known to be in sync */
__le32 sb_csum; /* checksum up to devs[max_dev] */
__le32 max_dev; /* size of devs[] array to consider */
__u8 pad3[64-32]; /* set to 0 when writing */
__le32 logical_block_size; /* same as q->limits->logical_block_size */
__u8 pad3[64-36]; /* set to 0 when writing */
/* device state information. Indexed by dev_number.
* 2 bytes per device

98
lib/libc/include/any-linux-any/linux/rkisp1-config.h vendored
View file

@ -9,6 +9,8 @@
#include <linux/types.h>
#include <linux/media/v4l2-isp.h>
/* Defect Pixel Cluster Detection */
#define RKISP1_CIF_ISP_MODULE_DPCC (1U << 0)
/* Black Level Subtraction */
@ -1158,79 +1160,26 @@ enum rkisp1_ext_params_block_type {
RKISP1_EXT_PARAMS_BLOCK_TYPE_WDR,
};
#define RKISP1_EXT_PARAMS_FL_BLOCK_DISABLE (1U << 0)
#define RKISP1_EXT_PARAMS_FL_BLOCK_ENABLE (1U << 1)
/* For backward compatibility */
#define RKISP1_EXT_PARAMS_FL_BLOCK_DISABLE V4L2_ISP_PARAMS_FL_BLOCK_DISABLE
#define RKISP1_EXT_PARAMS_FL_BLOCK_ENABLE V4L2_ISP_PARAMS_FL_BLOCK_ENABLE
/* A bitmask of parameters blocks supported on the current hardware. */
#define RKISP1_CID_SUPPORTED_PARAMS_BLOCKS (V4L2_CID_USER_RKISP1_BASE + 0x01)
/**
* struct rkisp1_ext_params_block_header - RkISP1 extensible parameters block
* header
* rkisp1_ext_params_block_header - RkISP1 extensible parameters block header
*
* This structure represents the common part of all the ISP configuration
* blocks. Each parameters block shall embed an instance of this structure type
* as its first member, followed by the block-specific configuration data. The
* driver inspects this common header to discern the block type and its size and
* properly handle the block content by casting it to the correct block-specific
* type.
* blocks and is identical to :c:type:`v4l2_isp_params_block_header`.
*
* The @type field is one of the values enumerated by
* The type field is one of the values enumerated by
* :c:type:`rkisp1_ext_params_block_type` and specifies how the data should be
* interpreted by the driver. The @size field specifies the size of the
* parameters block and is used by the driver for validation purposes.
* interpreted by the driver.
*
* The @flags field is a bitmask of per-block flags RKISP1_EXT_PARAMS_FL_*.
*
* When userspace wants to configure and enable an ISP block it shall fully
* populate the block configuration and set the
* RKISP1_EXT_PARAMS_FL_BLOCK_ENABLE bit in the @flags field.
*
* When userspace simply wants to disable an ISP block the
* RKISP1_EXT_PARAMS_FL_BLOCK_DISABLE bit should be set in @flags field. The
* driver ignores the rest of the block configuration structure in this case.
*
* If a new configuration of an ISP block has to be applied userspace shall
* fully populate the ISP block configuration and omit setting the
* RKISP1_EXT_PARAMS_FL_BLOCK_ENABLE and RKISP1_EXT_PARAMS_FL_BLOCK_DISABLE bits
* in the @flags field.
*
* Setting both the RKISP1_EXT_PARAMS_FL_BLOCK_ENABLE and
* RKISP1_EXT_PARAMS_FL_BLOCK_DISABLE bits in the @flags field is not allowed
* and not accepted by the driver.
*
* Userspace is responsible for correctly populating the parameters block header
* fields (@type, @flags and @size) and the block-specific parameters.
*
* For example:
*
* .. code-block:: c
*
* void populate_bls(struct rkisp1_ext_params_block_header *block) {
* struct rkisp1_ext_params_bls_config *bls =
* (struct rkisp1_ext_params_bls_config *)block;
*
* bls->header.type = RKISP1_EXT_PARAMS_BLOCK_ID_BLS;
* bls->header.flags = RKISP1_EXT_PARAMS_FL_BLOCK_ENABLE;
* bls->header.size = sizeof(*bls);
*
* bls->config.enable_auto = 0;
* bls->config.fixed_val.r = blackLevelRed_;
* bls->config.fixed_val.gr = blackLevelGreenR_;
* bls->config.fixed_val.gb = blackLevelGreenB_;
* bls->config.fixed_val.b = blackLevelBlue_;
* }
*
* @type: The parameters block type, see
* :c:type:`rkisp1_ext_params_block_type`
* @flags: A bitmask of block flags
* @size: Size (in bytes) of the parameters block, including this header
* The flags field is a bitmask of per-block flags RKISP1_EXT_PARAMS_FL_*.
*/
struct rkisp1_ext_params_block_header {
__u16 type;
__u16 flags;
__u32 size;
};
#define rkisp1_ext_params_block_header v4l2_isp_params_block_header
/**
* struct rkisp1_ext_params_bls_config - RkISP1 extensible params BLS config
@ -1588,27 +1537,14 @@ struct rkisp1_ext_params_wdr_config {
* @RKISP1_EXT_PARAM_BUFFER_V1: First version of RkISP1 extensible parameters
*/
enum rksip1_ext_param_buffer_version {
RKISP1_EXT_PARAM_BUFFER_V1 = 1,
RKISP1_EXT_PARAM_BUFFER_V1 = V4L2_ISP_PARAMS_VERSION_V1,
};
/**
* struct rkisp1_ext_params_cfg - RkISP1 extensible parameters configuration
*
* This struct contains the configuration parameters of the RkISP1 ISP
* algorithms, serialized by userspace into a data buffer. Each configuration
* parameter block is represented by a block-specific structure which contains a
* :c:type:`rkisp1_ext_params_block_header` entry as first member. Userspace
* populates the @data buffer with configuration parameters for the blocks that
* it intends to configure. As a consequence, the data buffer effective size
* changes according to the number of ISP blocks that userspace intends to
* configure and is set by userspace in the @data_size field.
*
* The parameters buffer is versioned by the @version field to allow modifying
* and extending its definition. Userspace shall populate the @version field to
* inform the driver about the version it intends to use. The driver will parse
* and handle the @data buffer according to the data layout specific to the
* indicated version and return an error if the desired version is not
* supported.
* This is the driver-specific implementation of
* :c:type:`v4l2_isp_params_buffer`.
*
* Currently the single RKISP1_EXT_PARAM_BUFFER_V1 version is supported.
* When a new format version will be added, a mechanism for userspace to query
@ -1624,11 +1560,6 @@ enum rksip1_ext_param_buffer_version {
* the maximum value represents the blocks supported by the kernel driver,
* independently of the device instance.
*
* For each ISP block that userspace wants to configure, a block-specific
* structure is appended to the @data buffer, one after the other without gaps
* in between nor overlaps. Userspace shall populate the @data_size field with
* the effective size, in bytes, of the @data buffer.
*
* The expected memory layout of the parameters buffer is::
*
* +-------------------- struct rkisp1_ext_params_cfg -------------------+
@ -1678,4 +1609,5 @@ struct rkisp1_ext_params_cfg {
__u8 data[RKISP1_EXT_PARAMS_MAX_SIZE];
};
#endif /* _RKISP1_CONFIG_H */

21
lib/libc/include/any-linux-any/linux/rseq.h vendored
View file

@ -114,20 +114,13 @@ struct rseq {
/*
* Restartable sequences flags field.
*
* This field should only be updated by the thread which
* registered this data structure. Read by the kernel.
* Mainly used for single-stepping through rseq critical sections
* with debuggers.
*
* - RSEQ_CS_FLAG_NO_RESTART_ON_PREEMPT
* Inhibit instruction sequence block restart on preemption
* for this thread.
* - RSEQ_CS_FLAG_NO_RESTART_ON_SIGNAL
* Inhibit instruction sequence block restart on signal
* delivery for this thread.
* - RSEQ_CS_FLAG_NO_RESTART_ON_MIGRATE
* Inhibit instruction sequence block restart on migration for
* this thread.
* This field was initially intended to allow event masking for
* single-stepping through rseq critical sections with debuggers.
* The kernel does not support this anymore and the relevant bits
* are checked for being always false:
* - RSEQ_CS_FLAG_NO_RESTART_ON_PREEMPT
* - RSEQ_CS_FLAG_NO_RESTART_ON_SIGNAL
* - RSEQ_CS_FLAG_NO_RESTART_ON_MIGRATE
*/
__u32 flags;

1
lib/libc/include/any-linux-any/linux/stddef.h vendored
View file

@ -3,7 +3,6 @@
#define _LINUX_STDDEF_H
#ifndef __always_inline
#define __always_inline __inline__
#endif

Some files were not shown because too many files have changed in this diff Show more