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c9543cca94
QMP combo phy V6 and above use the clamp register from the PCS always on (AON) address space. Update the driver accordingly. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: Elson Roy Serrao <quic_eserrao@quicinc.com> Signed-off-by: Wesley Cheng <wesley.cheng@oss.qualcomm.com> Reviewed-by: Abel Vesa <abel.vesa@linaro.org> Link: https://patch.msgid.link/20251209-linux-next-12825-v8-7-42133596bda0@oss.qualcomm.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
12 lines
296 B
C
12 lines
296 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#ifndef QCOM_PHY_QMP_PCS_MISC_V5_H_
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#define QCOM_PHY_QMP_PCS_MISC_V5_H_
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/* Only for QMP V5 PHY - PCS_MISC registers */
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#define QPHY_V5_PCS_MISC_CLAMP_ENABLE 0x0c
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#endif
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