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Apple's Type-C PHY (ATCPHY) is a PHY for USB 2.0, USB 3.x, USB4/Thunderbolt, and DisplayPort connectivity found in Apple Silicon SoCs. The PHY handles muxing between these different protocols and also provides the reset controller for the attached dwc3 USB controller. Reviewed-by: Neal Gompa <neal@gompa.dev> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Signed-off-by: Sven Peter <sven@kernel.org> Link: https://patch.msgid.link/20251214-b4-atcphy-v3-2-ba82b20e9459@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
222 lines
6 KiB
YAML
222 lines
6 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/phy/apple,atcphy.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Apple Type-C PHY (ATCPHY)
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maintainers:
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- Sven Peter <sven@kernel.org>
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description: >
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The Apple Type-C PHY (ATCPHY) is a combined PHY for USB 2.0, USB 3.x,
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USB4/Thunderbolt, and DisplayPort connectivity via Type-C ports found in
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Apple Silicon SoCs.
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The PHY handles muxing between these different protocols and also provides the
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reset controller for the attached DWC3 USB controller.
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It is designed for USB4 operation and does not handle individual differential
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pairs as distinct DisplayPort lanes. Any reference to lane in this binding
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hence refers to two differential pairs (RX and TX) as used in USB terminology.
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In order to correctly setup these lanes for the various modes calibration
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values copied from Apple's firmware and converted to the format described
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below by our bootloader m1n1 are required. Without these only USB2 operation
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is possible.
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allOf:
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- $ref: /schemas/usb/usb-switch.yaml#
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$defs:
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apple,tunable:
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$ref: /schemas/types.yaml#/definitions/uint32-matrix
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items:
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items:
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- description: Register offset
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- description: Mask to be applied to the register value
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- description: Bits to be set after applying the mask
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description: >
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List of (register offset, mask, value) tuples copied from Apple's Device
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Tree by our bootloader m1n1 and used to configure the PHY. These values
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even vary for a single product/device and likely contain calibration
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values determined by Apple at manufacturing time.
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Unless otherwise noted these tunables are always applied to the core
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register region.
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properties:
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compatible:
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oneOf:
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- items:
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- enum:
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- apple,t6000-atcphy
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- apple,t6020-atcphy
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- apple,t8112-atcphy
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- const: apple,t8103-atcphy
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- const: apple,t8103-atcphy
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reg:
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items:
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- description: Common controls for all PHYs (USB2/3/4, DisplayPort, TBT)
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- description: DisplayPort Alternate Mode PHY specific controls
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- description: Type-C PHY AXI to Apple Fabric interconnect controls
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- description: USB2 PHY specific controls
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- description: USB3 PIPE interface controls
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reg-names:
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items:
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- const: core
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- const: lpdptx
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- const: axi2af
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- const: usb2phy
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- const: pipehandler
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"#phy-cells":
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const: 1
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"#reset-cells":
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const: 0
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mode-switch: true
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orientation-switch: true
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power-domains:
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maxItems: 1
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ports:
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$ref: /schemas/graph.yaml#/properties/ports
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properties:
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port@0:
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$ref: /schemas/graph.yaml#/properties/port
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description: Outgoing connection to the SS port of the Type-C connector.
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port@1:
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$ref: /schemas/graph.yaml#/properties/port
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description: Incoming endpoint from the USB3 controller.
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port@2:
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$ref: /schemas/graph.yaml#/properties/port
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description: Incoming endpoint from the DisplayPort controller.
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port@3:
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$ref: /schemas/graph.yaml#/properties/port
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description: Incoming endpoint from the USB4/Thunderbolt controller.
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apple,tunable-common-a:
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$ref: "#/$defs/apple,tunable"
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description: >
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Common tunables required for all modes, applied before tunable-axi2af.
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apple,tunable-axi2af:
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$ref: "#/$defs/apple,tunable"
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description: >
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AXI to Apple Fabric tunables, required for all modes. Unlike all other
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tunables these are applied to the axi2af region.
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apple,tunable-common-b:
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$ref: "#/$defs/apple,tunable"
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description: >
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Common tunables required for all modes, applied after tunable-axi2af.
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apple,tunable-lane0-usb:
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$ref: "#/$defs/apple,tunable"
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description: USB3 tunables for lane 0.
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apple,tunable-lane1-usb:
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$ref: "#/$defs/apple,tunable"
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description: USB3 tunables for lane 1.
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apple,tunable-lane0-cio:
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$ref: "#/$defs/apple,tunable"
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description: USB4/Thunderbolt ("Converged IO") tunables for lane 0.
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apple,tunable-lane1-cio:
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$ref: "#/$defs/apple,tunable"
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description: USB4/Thunderbolt ("Converged IO") tunables for lane 1.
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apple,tunable-lane0-dp:
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$ref: "#/$defs/apple,tunable"
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description: >
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DisplayPort tunables for lane 0.
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Note that lane here refers to a USB RX and TX pair re-used for DisplayPort
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and not to an individual DisplayPort differential lane.
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apple,tunable-lane1-dp:
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$ref: "#/$defs/apple,tunable"
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description: >
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DisplayPort tunables for lane 1.
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Note that lane here refers to a USB RX and TX pair re-used for DisplayPort
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and not to an individual DisplayPort differential lane.
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required:
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- compatible
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- reg
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- reg-names
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- "#phy-cells"
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- "#reset-cells"
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- orientation-switch
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- mode-switch
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- power-domains
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- ports
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additionalProperties: false
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examples:
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- |
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phy@83000000 {
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compatible = "apple,t8103-atcphy";
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reg = <0x83000000 0x4c000>,
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<0x83050000 0x8000>,
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<0x80000000 0x4000>,
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<0x82a90000 0x4000>,
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<0x82a84000 0x4000>;
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reg-names = "core", "lpdptx", "axi2af", "usb2phy",
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"pipehandler";
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#phy-cells = <1>;
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#reset-cells = <0>;
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orientation-switch;
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mode-switch;
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power-domains = <&ps_atc0_usb>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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endpoint {
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remote-endpoint = <&typec_connector_ss>;
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};
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};
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port@1 {
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reg = <1>;
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endpoint {
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remote-endpoint = <&dwc3_ss_out>;
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};
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};
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port@2 {
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reg = <2>;
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endpoint {
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remote-endpoint = <&dcp_dp_out>;
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};
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};
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port@3 {
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reg = <3>;
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endpoint {
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remote-endpoint = <&acio_tbt_out>;
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};
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};
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};
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};
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