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8e38607aa4
Patch series "mm: folio_zero_user: clear page ranges", v11.
This series adds clearing of contiguous page ranges for hugepages.
The series improves on the current discontiguous clearing approach in two
ways:
- clear pages in a contiguous fashion.
- use batched clearing via clear_pages() wherever exposed.
The first is useful because it allows us to make much better use of
hardware prefetchers.
The second, enables advertising the real extent to the processor. Where
specific instructions support it (ex. string instructions on x86; "mops"
on arm64 etc), a processor can optimize based on this because, instead of
seeing a sequence of 8-byte stores, or a sequence of 4KB pages, it sees a
larger unit being operated on.
For instance, AMD Zen uarchs (for extents larger than LLC-size) switch to
a mode where they start eliding cacheline allocation. This is helpful not
just because it results in higher bandwidth, but also because now the
cache is not evicting useful cachelines and replacing them with zeroes.
Demand faulting a 64GB region shows performance improvement:
$ perf bench mem mmap -p $pg-sz -f demand -s 64GB -l 5
baseline +series
(GBps +- %stdev) (GBps +- %stdev)
pg-sz=2MB 11.76 +- 1.10% 25.34 +- 1.18% [*] +115.47% preempt=*
pg-sz=1GB 24.85 +- 2.41% 39.22 +- 2.32% + 57.82% preempt=none|voluntary
pg-sz=1GB (similar) 52.73 +- 0.20% [#] +112.19% preempt=full|lazy
[*] This improvement is because switching to sequential clearing
allows the hardware prefetchers to do a much better job.
[#] For pg-sz=1GB a large part of the improvement is because of the
cacheline elision mentioned above. preempt=full|lazy improves upon
that because, not needing explicit invocations of cond_resched() to
ensure reasonable preemption latency, it can clear the full extent
as a single unit. In comparison the maximum extent used for
preempt=none|voluntary is PROCESS_PAGES_NON_PREEMPT_BATCH (32MB).
When provided the full extent the processor forgoes allocating
cachelines on this path almost entirely.
(The hope is that eventually, in the fullness of time, the lazy
preemption model will be able to do the same job that none or
voluntary models are used for, allowing us to do away with
cond_resched().)
Raghavendra also tested previous version of the series on AMD Genoa and
sees similar improvement [1] with preempt=lazy.
$ perf bench mem map -p $page-size -f populate -s 64GB -l 10
base patched change
pg-sz=2MB 12.731939 GB/sec 26.304263 GB/sec 106.6%
pg-sz=1GB 26.232423 GB/sec 61.174836 GB/sec 133.2%
This patch (of 8):
Let's drop all variants that effectively map to clear_page() and provide
it in a generic variant instead.
We'll use the macro clear_user_page to indicate whether an architecture
provides it's own variant.
Also, clear_user_page() is only called from the generic variant of
clear_user_highpage(), so define it only if the architecture does not
provide a clear_user_highpage(). And, for simplicity define it in
linux/highmem.h.
Note that for parisc, clear_page() and clear_user_page() map to
clear_page_asm(), so we can just get rid of the custom clear_user_page()
implementation. There is a clear_user_page_asm() function on parisc, that
seems to be unused. Not sure what's up with that.
Link: https://lkml.kernel.org/r/20260107072009.1615991-1-ankur.a.arora@oracle.com
Link: https://lkml.kernel.org/r/20260107072009.1615991-2-ankur.a.arora@oracle.com
Signed-off-by: David Hildenbrand <david@redhat.com>
Co-developed-by: Ankur Arora <ankur.a.arora@oracle.com>
Signed-off-by: Ankur Arora <ankur.a.arora@oracle.com>
Cc: Andy Lutomirski <luto@kernel.org>
Cc: Ankur Arora <ankur.a.arora@oracle.com>
Cc: "Borislav Petkov (AMD)" <bp@alien8.de>
Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Cc: David Hildenbrand <david@kernel.org>
Cc: "H. Peter Anvin" <hpa@zytor.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Konrad Rzessutek Wilk <konrad.wilk@oracle.com>
Cc: Lance Yang <ioworker0@gmail.com>
Cc: "Liam R. Howlett" <Liam.Howlett@oracle.com>
Cc: Li Zhe <lizhe.67@bytedance.com>
Cc: Lorenzo Stoakes <lorenzo.stoakes@oracle.com>
Cc: Mateusz Guzik <mjguzik@gmail.com>
Cc: Matthew Wilcox (Oracle) <willy@infradead.org>
Cc: Michal Hocko <mhocko@suse.com>
Cc: Mike Rapoport <rppt@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Raghavendra K T <raghavendra.kt@amd.com>
Cc: Suren Baghdasaryan <surenb@google.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Vlastimil Babka <vbabka@suse.cz>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
133 lines
3.5 KiB
C
133 lines
3.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Page management definitions for the Hexagon architecture
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*
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* Copyright (c) 2010-2013, The Linux Foundation. All rights reserved.
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*/
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#ifndef _ASM_PAGE_H
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#define _ASM_PAGE_H
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#include <linux/const.h>
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/* This is probably not the most graceful way to handle this. */
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#ifdef CONFIG_PAGE_SIZE_4KB
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#define HEXAGON_L1_PTE_SIZE __HVM_PDE_S_4KB
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#endif
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#ifdef CONFIG_PAGE_SIZE_16KB
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#define HEXAGON_L1_PTE_SIZE __HVM_PDE_S_16KB
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#endif
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#ifdef CONFIG_PAGE_SIZE_64KB
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#define HEXAGON_L1_PTE_SIZE __HVM_PDE_S_64KB
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#endif
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#ifdef CONFIG_PAGE_SIZE_256KB
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#define HEXAGON_L1_PTE_SIZE __HVM_PDE_S_256KB
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#endif
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#ifdef CONFIG_PAGE_SIZE_1MB
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#define HEXAGON_L1_PTE_SIZE __HVM_PDE_S_1MB
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#endif
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/*
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* These should be defined in hugetlb.h, but apparently not.
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* "Huge" for us should be 4MB or 16MB, which are both represented
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* in L1 PTE's. Right now, it's set up for 4MB.
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*/
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#ifdef CONFIG_HUGETLB_PAGE
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#define HPAGE_SHIFT 22
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#define HPAGE_SIZE (1UL << HPAGE_SHIFT)
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#define HPAGE_MASK (~(HPAGE_SIZE-1))
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#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT-PAGE_SHIFT)
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#define HVM_HUGEPAGE_SIZE 0x5
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#endif
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#include <vdso/page.h>
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#ifdef __KERNEL__
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#ifndef __ASSEMBLY__
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/*
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* This is for PFN_DOWN, which mm.h needs. Seems the right place to pull it in.
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*/
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#include <linux/pfn.h>
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/*
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* We implement a two-level architecture-specific page table structure.
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* Null intermediate page table level (pmd, pud) definitions will come from
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* asm-generic/pagetable-nopmd.h and asm-generic/pagetable-nopud.h
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*/
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typedef struct { unsigned long pte; } pte_t;
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typedef struct { unsigned long pgd; } pgd_t;
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typedef struct { unsigned long pgprot; } pgprot_t;
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typedef struct page *pgtable_t;
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#define pte_val(x) ((x).pte)
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#define pgd_val(x) ((x).pgd)
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#define pgprot_val(x) ((x).pgprot)
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#define __pte(x) ((pte_t) { (x) })
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#define __pgd(x) ((pgd_t) { (x) })
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#define __pgprot(x) ((pgprot_t) { (x) })
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/* Needed for PAGE_OFFSET used in the macro right below */
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#include <asm/mem-layout.h>
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/*
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* We need a __pa and a __va routine for kernel space.
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* MIPS says they're only used during mem_init.
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* also, check if we need a PHYS_OFFSET.
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*/
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#define __pa(x) ((unsigned long)(x) - PAGE_OFFSET + PHYS_OFFSET)
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#define __va(x) ((void *)((unsigned long)(x) - PHYS_OFFSET + PAGE_OFFSET))
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/* The "page frame" descriptor is defined in linux/mm.h */
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struct page;
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/* Returns page frame descriptor for virtual address. */
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#define virt_to_page(kaddr) pfn_to_page(PFN_DOWN(__pa(kaddr)))
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/* Default vm area behavior is non-executable. */
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#define VM_DATA_DEFAULT_FLAGS VM_DATA_FLAGS_NON_EXEC
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#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
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/* Need to not use a define for linesize; may move this to another file. */
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static inline void clear_page(void *page)
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{
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/* This can only be done on pages with L1 WB cache */
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asm volatile(
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" loop0(1f,%1);\n"
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"1: { dczeroa(%0);\n"
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" %0 = add(%0,#32); }:endloop0\n"
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: "+r" (page)
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: "r" (PAGE_SIZE/32)
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: "lc0", "sa0", "memory"
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);
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}
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#define copy_page(to, from) memcpy((to), (from), PAGE_SIZE)
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/*
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* Under assumption that kernel always "sees" user map...
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*/
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#define copy_user_page(to, from, vaddr, pg) copy_page(to, from)
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static inline unsigned long virt_to_pfn(const void *kaddr)
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{
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return __pa(kaddr) >> PAGE_SHIFT;
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}
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#define page_to_virt(page) __va(page_to_phys(page))
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#include <asm/mem-layout.h>
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#include <asm-generic/memory_model.h>
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/* XXX Todo: implement assembly-optimized version of getorder. */
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#include <asm-generic/getorder.h>
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#endif /* ifdef __ASSEMBLY__ */
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#endif /* ifdef __KERNEL__ */
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#endif
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