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The platform_get_irq_byname() function already prints an error message internally upon failure using dev_err_probe(). Therefore, the explicit dev_err() is redundant and results in duplicate error logs. Remove the redundant dev_err() call to clean up the error path. Signed-off-by: Chen Ni <nichen@iscas.ac.cn> Acked-by: Thinh Nguyen <Thinh.Nguyen@synopsys.com> Link: https://patch.msgid.link/20260115023800.4142416-1-nichen@iscas.ac.cn Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
626 lines
17 KiB
C
626 lines
17 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* dwc3-google.c - Google DWC3 Specific Glue Layer
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*
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* Copyright (c) 2025, Google LLC
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* Author: Roy Luo <royluo@google.com>
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*/
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#include <linux/bitfield.h>
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#include <linux/clk.h>
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#include <linux/iopoll.h>
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#include <linux/irq.h>
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#include <linux/kernel.h>
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#include <linux/mfd/syscon.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/pm_domain.h>
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#include <linux/regmap.h>
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#include <linux/reset.h>
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#include "core.h"
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#include "glue.h"
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/* HOST CFG registers */
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#define HC_STATUS_OFFSET 0x0
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#define HC_STATUS_CURRENT_POWER_STATE_U2PMU GENMASK(1, 0)
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#define HC_STATUS_CURRENT_POWER_STATE_U3PMU GENMASK(4, 3)
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#define HOST_CFG1_OFFSET 0x4
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#define HOST_CFG1_PME_EN BIT(3)
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#define HOST_CFG1_PM_POWER_STATE_REQUEST GENMASK(5, 4)
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#define HOST_CFG1_PM_POWER_STATE_D0 0x0
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#define HOST_CFG1_PM_POWER_STATE_D3 0x3
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/* USBINT registers */
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#define USBINT_CFG1_OFFSET 0x0
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#define USBINT_CFG1_USBDRD_PME_GEN_U2P_INTR_MSK BIT(2)
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#define USBINT_CFG1_USBDRD_PME_GEN_U3P_INTR_MSK BIT(3)
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#define USBINT_CFG1_USBDRD_PME_GEN_U2P_INTR_INT_EN BIT(8)
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#define USBINT_CFG1_USBDRD_PME_GEN_U3P_INTR_INT_EN BIT(9)
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#define USBINT_CFG1_USBDRD_PME_GEN_U2_INTR_CLR BIT(14)
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#define USBINT_CFG1_USBDRD_PME_GEN_U3_INTR_CLR BIT(15)
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#define USBINT_STATUS_OFFSET 0x4
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#define USBINT_STATUS_USBDRD_PME_GEN_U2P_INTR_STS_RAW BIT(2)
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#define USBINT_STATUS_USBDRD_PME_GEN_U3P_INTR_STS_RAW BIT(3)
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#define USBCS_TOP_CTRL_CFG1_OFFSET 0xc
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#define USBCS_TOP_CTRL_CFG1_USB2ONLY_MODE BIT(5)
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#define DWC3_GOOGLE_MAX_RESETS 4
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struct dwc3_google {
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struct device *dev;
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struct dwc3 dwc;
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struct clk_bulk_data *clks;
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int num_clks;
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struct reset_control_bulk_data rsts[DWC3_GOOGLE_MAX_RESETS];
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int num_rsts;
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struct reset_control *non_sticky_rst;
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struct device *usb_psw_pd;
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struct device_link *usb_psw_pd_dl;
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struct notifier_block usb_psw_pd_nb;
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struct device *usb_top_pd;
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struct device_link *usb_top_pd_dl;
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struct regmap *usb_cfg_regmap;
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unsigned int host_cfg_offset;
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unsigned int usbint_cfg_offset;
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int hs_pme_irq;
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int ss_pme_irq;
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bool is_usb2only;
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bool is_hibernation;
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};
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#define to_dwc3_google(d) container_of_const((d), struct dwc3_google, dwc)
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static int dwc3_google_rst_init(struct dwc3_google *google)
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{
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int ret;
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google->num_rsts = 4;
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google->rsts[0].id = "non_sticky";
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google->rsts[1].id = "sticky";
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google->rsts[2].id = "drd_bus";
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google->rsts[3].id = "top";
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ret = devm_reset_control_bulk_get_exclusive(google->dev,
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google->num_rsts,
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google->rsts);
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if (ret < 0)
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return ret;
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google->non_sticky_rst = google->rsts[0].rstc;
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return 0;
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}
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static int dwc3_google_set_pmu_state(struct dwc3_google *google, int state)
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{
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u32 reg;
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int ret;
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regmap_read(google->usb_cfg_regmap,
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google->host_cfg_offset + HOST_CFG1_OFFSET, ®);
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reg &= ~HOST_CFG1_PM_POWER_STATE_REQUEST;
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reg |= (FIELD_PREP(HOST_CFG1_PM_POWER_STATE_REQUEST, state) |
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HOST_CFG1_PME_EN);
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regmap_write(google->usb_cfg_regmap,
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google->host_cfg_offset + HOST_CFG1_OFFSET, reg);
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ret = regmap_read_poll_timeout(google->usb_cfg_regmap,
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google->host_cfg_offset + HC_STATUS_OFFSET, reg,
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(FIELD_GET(HC_STATUS_CURRENT_POWER_STATE_U2PMU,
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reg) == state &&
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FIELD_GET(HC_STATUS_CURRENT_POWER_STATE_U3PMU,
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reg) == state),
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10, 10000);
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if (ret)
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dev_err(google->dev, "failed to set PMU state %d\n", state);
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return ret;
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}
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/*
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* Clear pme interrupts and report their status.
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* The hardware requires write-1 then write-0 sequence to clear the interrupt bits.
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*/
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static u32 dwc3_google_clear_pme_irqs(struct dwc3_google *google)
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{
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u32 irq_status, reg_set, reg_clear;
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regmap_read(google->usb_cfg_regmap,
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google->usbint_cfg_offset + USBINT_STATUS_OFFSET, &irq_status);
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irq_status &= (USBINT_STATUS_USBDRD_PME_GEN_U2P_INTR_STS_RAW |
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USBINT_STATUS_USBDRD_PME_GEN_U3P_INTR_STS_RAW);
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if (!irq_status)
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return irq_status;
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regmap_read(google->usb_cfg_regmap,
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google->usbint_cfg_offset + USBINT_CFG1_OFFSET, ®_set);
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reg_clear = reg_set;
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if (irq_status & USBINT_STATUS_USBDRD_PME_GEN_U2P_INTR_STS_RAW) {
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reg_set |= USBINT_CFG1_USBDRD_PME_GEN_U2_INTR_CLR;
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reg_clear &= ~USBINT_CFG1_USBDRD_PME_GEN_U2_INTR_CLR;
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}
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if (irq_status & USBINT_STATUS_USBDRD_PME_GEN_U3P_INTR_STS_RAW) {
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reg_set |= USBINT_CFG1_USBDRD_PME_GEN_U3_INTR_CLR;
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reg_clear &= ~USBINT_CFG1_USBDRD_PME_GEN_U3_INTR_CLR;
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}
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regmap_write(google->usb_cfg_regmap,
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google->usbint_cfg_offset + USBINT_CFG1_OFFSET, reg_set);
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regmap_write(google->usb_cfg_regmap,
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google->usbint_cfg_offset + USBINT_CFG1_OFFSET, reg_clear);
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return irq_status;
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}
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static void dwc3_google_enable_pme_irq(struct dwc3_google *google)
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{
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u32 reg;
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regmap_read(google->usb_cfg_regmap,
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google->usbint_cfg_offset + USBINT_CFG1_OFFSET, ®);
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reg &= ~(USBINT_CFG1_USBDRD_PME_GEN_U2P_INTR_MSK |
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USBINT_CFG1_USBDRD_PME_GEN_U3P_INTR_MSK);
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reg |= (USBINT_CFG1_USBDRD_PME_GEN_U2P_INTR_INT_EN |
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USBINT_CFG1_USBDRD_PME_GEN_U3P_INTR_INT_EN);
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regmap_write(google->usb_cfg_regmap,
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google->usbint_cfg_offset + USBINT_CFG1_OFFSET, reg);
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enable_irq(google->hs_pme_irq);
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enable_irq(google->ss_pme_irq);
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enable_irq_wake(google->hs_pme_irq);
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enable_irq_wake(google->ss_pme_irq);
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}
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static void dwc3_google_disable_pme_irq(struct dwc3_google *google)
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{
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u32 reg;
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regmap_read(google->usb_cfg_regmap,
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google->usbint_cfg_offset + USBINT_CFG1_OFFSET, ®);
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reg &= ~(USBINT_CFG1_USBDRD_PME_GEN_U2P_INTR_INT_EN |
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USBINT_CFG1_USBDRD_PME_GEN_U3P_INTR_INT_EN);
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reg |= (USBINT_CFG1_USBDRD_PME_GEN_U2P_INTR_MSK |
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USBINT_CFG1_USBDRD_PME_GEN_U3P_INTR_MSK);
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regmap_write(google->usb_cfg_regmap,
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google->usbint_cfg_offset + USBINT_CFG1_OFFSET, reg);
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disable_irq_wake(google->hs_pme_irq);
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disable_irq_wake(google->ss_pme_irq);
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disable_irq_nosync(google->hs_pme_irq);
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disable_irq_nosync(google->ss_pme_irq);
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}
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static irqreturn_t dwc3_google_resume_irq(int irq, void *data)
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{
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struct dwc3_google *google = data;
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struct dwc3 *dwc = &google->dwc;
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u32 irq_status, dr_role;
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irq_status = dwc3_google_clear_pme_irqs(google);
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dr_role = dwc->current_dr_role;
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if (!irq_status || !google->is_hibernation ||
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dr_role != DWC3_GCTL_PRTCAP_HOST) {
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dev_dbg(google->dev, "spurious pme irq %d, hibernation %d, dr_role %u\n",
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irq, google->is_hibernation, dr_role);
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return IRQ_HANDLED;
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}
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if (dwc->xhci)
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pm_runtime_resume(&dwc->xhci->dev);
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return IRQ_HANDLED;
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}
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static int dwc3_google_request_irq(struct dwc3_google *google, struct platform_device *pdev,
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const char *irq_name, const char *req_name)
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{
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int ret;
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int irq;
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irq = platform_get_irq_byname(pdev, irq_name);
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if (irq < 0)
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return irq;
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irq_set_status_flags(irq, IRQ_NOAUTOEN);
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ret = devm_request_threaded_irq(google->dev, irq, NULL,
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dwc3_google_resume_irq,
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IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
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req_name, google);
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if (ret < 0) {
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dev_err(google->dev, "failed to request irq %s\n", req_name);
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return ret;
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}
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return irq;
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}
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static int dwc3_google_usb_psw_pd_notifier(struct notifier_block *nb, unsigned long action, void *d)
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{
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struct dwc3_google *google = container_of(nb, struct dwc3_google, usb_psw_pd_nb);
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int ret;
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if (!google->is_hibernation)
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return NOTIFY_OK;
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if (action == GENPD_NOTIFY_OFF) {
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dev_dbg(google->dev, "enter D3 power state\n");
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dwc3_google_set_pmu_state(google, HOST_CFG1_PM_POWER_STATE_D3);
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ret = reset_control_assert(google->non_sticky_rst);
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if (ret)
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dev_err(google->dev, "non sticky reset assert failed: %d\n", ret);
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} else if (action == GENPD_NOTIFY_ON) {
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dev_dbg(google->dev, "enter D0 power state\n");
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dwc3_google_clear_pme_irqs(google);
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ret = reset_control_deassert(google->non_sticky_rst);
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if (ret)
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dev_err(google->dev, "non sticky reset deassert failed: %d\n", ret);
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dwc3_google_set_pmu_state(google, HOST_CFG1_PM_POWER_STATE_D0);
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}
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return NOTIFY_OK;
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}
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static void dwc3_google_pm_domain_deinit(struct dwc3_google *google)
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{
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if (google->usb_top_pd_dl)
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device_link_del(google->usb_top_pd_dl);
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if (!IS_ERR_OR_NULL(google->usb_top_pd)) {
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device_set_wakeup_capable(google->usb_top_pd, false);
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dev_pm_domain_detach(google->usb_top_pd, true);
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}
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if (google->usb_psw_pd_dl)
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device_link_del(google->usb_psw_pd_dl);
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if (!IS_ERR_OR_NULL(google->usb_psw_pd)) {
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dev_pm_genpd_remove_notifier(google->usb_psw_pd);
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dev_pm_domain_detach(google->usb_psw_pd, true);
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}
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}
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static int dwc3_google_pm_domain_init(struct dwc3_google *google)
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{
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int ret;
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/*
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* Establish PM RUNTIME link between dwc dev and its power domain usb_psw_pd,
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* register notifier block to handle hibernation.
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*/
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google->usb_psw_pd = dev_pm_domain_attach_by_name(google->dev, "psw");
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if (IS_ERR_OR_NULL(google->usb_psw_pd)) {
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dev_err(google->dev, "failed to get psw pd");
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ret = google->usb_psw_pd ? PTR_ERR(google->usb_psw_pd) : -ENODATA;
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return ret;
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}
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google->usb_psw_pd_nb.notifier_call = dwc3_google_usb_psw_pd_notifier;
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ret = dev_pm_genpd_add_notifier(google->usb_psw_pd, &google->usb_psw_pd_nb);
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if (ret) {
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dev_err(google->dev, "failed to add psw pd notifier");
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goto err;
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}
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google->usb_psw_pd_dl = device_link_add(google->dev, google->usb_psw_pd,
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DL_FLAG_STATELESS | DL_FLAG_PM_RUNTIME |
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DL_FLAG_RPM_ACTIVE);
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if (!google->usb_psw_pd_dl) {
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dev_err(google->usb_psw_pd, "failed to add device link");
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ret = -ENODEV;
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goto err;
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}
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/*
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* usb_top_pd is the parent power domain of usb_psw_pd. Keeping usb_top_pd on
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* while usb_psw_pd is off places the controller in a power-gated state,
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* essential for hibernation. Acquire a handle to usb_top_pd and sets it as
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* wakeup-capable to allow the domain to be left on during system suspend.
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*/
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google->usb_top_pd = dev_pm_domain_attach_by_name(google->dev, "top");
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if (IS_ERR_OR_NULL(google->usb_top_pd)) {
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dev_err(google->dev, "failed to get top pd");
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ret = google->usb_top_pd ? PTR_ERR(google->usb_top_pd) : -ENODATA;
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goto err;
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}
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device_set_wakeup_capable(google->usb_top_pd, true);
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google->usb_top_pd_dl = device_link_add(google->dev, google->usb_top_pd,
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DL_FLAG_STATELESS);
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if (!google->usb_top_pd_dl) {
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dev_err(google->usb_top_pd, "failed to add device link");
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ret = -ENODEV;
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goto err;
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}
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return 0;
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err:
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dwc3_google_pm_domain_deinit(google);
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return ret;
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}
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static void dwc3_google_program_usb2only(struct dwc3_google *google)
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{
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u32 reg;
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regmap_read(google->usb_cfg_regmap,
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google->usbint_cfg_offset + USBCS_TOP_CTRL_CFG1_OFFSET, ®);
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reg |= USBCS_TOP_CTRL_CFG1_USB2ONLY_MODE;
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regmap_write(google->usb_cfg_regmap,
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google->usbint_cfg_offset + USBCS_TOP_CTRL_CFG1_OFFSET, reg);
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}
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static int dwc3_google_probe(struct platform_device *pdev)
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{
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struct dwc3_probe_data probe_data = {};
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struct device *dev = &pdev->dev;
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struct dwc3_google *google;
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struct resource *res;
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int ret;
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u32 args[2];
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google = devm_kzalloc(&pdev->dev, sizeof(*google), GFP_KERNEL);
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if (!google)
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return -ENOMEM;
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google->dev = &pdev->dev;
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ret = dwc3_google_pm_domain_init(google);
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if (ret < 0)
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return dev_err_probe(dev, ret, "failed to init pdom\n");
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google->usb_cfg_regmap =
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syscon_regmap_lookup_by_phandle_args(dev->of_node,
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"google,usb-cfg-csr",
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ARRAY_SIZE(args), args);
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if (IS_ERR(google->usb_cfg_regmap)) {
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return dev_err_probe(dev, PTR_ERR(google->usb_cfg_regmap),
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"invalid usb cfg csr\n");
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}
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google->host_cfg_offset = args[0];
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google->usbint_cfg_offset = args[1];
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if (device_property_match_string(dev, "phy-names", "usb3-phy") < 0) {
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google->is_usb2only = true;
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dwc3_google_program_usb2only(google);
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}
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ret = devm_clk_bulk_get_all_enabled(dev, &google->clks);
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if (ret < 0) {
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ret = dev_err_probe(dev, ret, "failed to get and enable clks\n");
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goto err_deinit_pdom;
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}
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google->num_clks = ret;
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ret = dwc3_google_rst_init(google);
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if (ret) {
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ret = dev_err_probe(dev, ret, "failed to get resets\n");
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goto err_deinit_pdom;
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}
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ret = reset_control_bulk_deassert(google->num_rsts, google->rsts);
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if (ret) {
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ret = dev_err_probe(dev, ret, "failed to deassert rsts\n");
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goto err_deinit_pdom;
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}
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ret = dwc3_google_request_irq(google, pdev, "hs_pme", "USB HS wakeup");
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if (ret < 0) {
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ret = dev_err_probe(dev, ret, "failed to request hs pme irq");
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goto err_reset_assert;
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}
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google->hs_pme_irq = ret;
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ret = dwc3_google_request_irq(google, pdev, "ss_pme", "USB SS wakeup");
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if (ret < 0) {
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ret = dev_err_probe(dev, ret, "failed to request ss pme irq");
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goto err_reset_assert;
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}
|
|
google->ss_pme_irq = ret;
|
|
|
|
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
if (!res) {
|
|
ret = dev_err_probe(dev, -ENODEV, "invalid memory\n");
|
|
goto err_reset_assert;
|
|
}
|
|
|
|
device_init_wakeup(dev, true);
|
|
|
|
google->dwc.dev = dev;
|
|
probe_data.dwc = &google->dwc;
|
|
probe_data.res = res;
|
|
probe_data.ignore_clocks_and_resets = true;
|
|
ret = dwc3_core_probe(&probe_data);
|
|
if (ret) {
|
|
ret = dev_err_probe(dev, ret, "failed to register DWC3 Core\n");
|
|
goto err_reset_assert;
|
|
}
|
|
|
|
return 0;
|
|
|
|
err_reset_assert:
|
|
reset_control_bulk_assert(google->num_rsts, google->rsts);
|
|
|
|
err_deinit_pdom:
|
|
dwc3_google_pm_domain_deinit(google);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static void dwc3_google_remove(struct platform_device *pdev)
|
|
{
|
|
struct dwc3 *dwc = platform_get_drvdata(pdev);
|
|
struct dwc3_google *google = to_dwc3_google(dwc);
|
|
|
|
dwc3_core_remove(&google->dwc);
|
|
|
|
reset_control_bulk_assert(google->num_rsts, google->rsts);
|
|
|
|
dwc3_google_pm_domain_deinit(google);
|
|
}
|
|
|
|
static int dwc3_google_suspend(struct dwc3_google *google, pm_message_t msg)
|
|
{
|
|
if (pm_runtime_suspended(google->dev))
|
|
return 0;
|
|
|
|
if (google->dwc.current_dr_role == DWC3_GCTL_PRTCAP_HOST) {
|
|
/*
|
|
* Follow dwc3_suspend_common() guidelines for deciding between
|
|
* a full teardown and hibernation.
|
|
*/
|
|
if (PMSG_IS_AUTO(msg) || device_may_wakeup(google->dev)) {
|
|
dev_dbg(google->dev, "enter hibernation");
|
|
pm_runtime_get_sync(google->usb_top_pd);
|
|
device_wakeup_enable(google->usb_top_pd);
|
|
dwc3_google_enable_pme_irq(google);
|
|
google->is_hibernation = true;
|
|
return 0;
|
|
}
|
|
}
|
|
|
|
reset_control_bulk_assert(google->num_rsts, google->rsts);
|
|
clk_bulk_disable_unprepare(google->num_clks, google->clks);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int dwc3_google_resume(struct dwc3_google *google, pm_message_t msg)
|
|
{
|
|
int ret;
|
|
|
|
if (google->is_hibernation) {
|
|
dev_dbg(google->dev, "exit hibernation");
|
|
dwc3_google_disable_pme_irq(google);
|
|
device_wakeup_disable(google->usb_top_pd);
|
|
pm_runtime_put_sync(google->usb_top_pd);
|
|
google->is_hibernation = false;
|
|
return 0;
|
|
}
|
|
|
|
if (google->is_usb2only)
|
|
dwc3_google_program_usb2only(google);
|
|
|
|
ret = clk_bulk_prepare_enable(google->num_clks, google->clks);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = reset_control_bulk_deassert(google->num_rsts, google->rsts);
|
|
if (ret) {
|
|
clk_bulk_disable_unprepare(google->num_clks, google->clks);
|
|
return ret;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int dwc3_google_pm_suspend(struct device *dev)
|
|
{
|
|
struct dwc3 *dwc = dev_get_drvdata(dev);
|
|
struct dwc3_google *google = to_dwc3_google(dwc);
|
|
int ret;
|
|
|
|
ret = dwc3_pm_suspend(&google->dwc);
|
|
if (ret)
|
|
return ret;
|
|
|
|
return dwc3_google_suspend(google, PMSG_SUSPEND);
|
|
}
|
|
|
|
static int dwc3_google_pm_resume(struct device *dev)
|
|
{
|
|
struct dwc3 *dwc = dev_get_drvdata(dev);
|
|
struct dwc3_google *google = to_dwc3_google(dwc);
|
|
int ret;
|
|
|
|
ret = dwc3_google_resume(google, PMSG_RESUME);
|
|
if (ret)
|
|
return ret;
|
|
|
|
return dwc3_pm_resume(&google->dwc);
|
|
}
|
|
|
|
static void dwc3_google_complete(struct device *dev)
|
|
{
|
|
struct dwc3 *dwc = dev_get_drvdata(dev);
|
|
|
|
dwc3_pm_complete(dwc);
|
|
}
|
|
|
|
static int dwc3_google_prepare(struct device *dev)
|
|
{
|
|
struct dwc3 *dwc = dev_get_drvdata(dev);
|
|
|
|
return dwc3_pm_prepare(dwc);
|
|
}
|
|
|
|
static int dwc3_google_runtime_suspend(struct device *dev)
|
|
{
|
|
struct dwc3 *dwc = dev_get_drvdata(dev);
|
|
struct dwc3_google *google = to_dwc3_google(dwc);
|
|
int ret;
|
|
|
|
ret = dwc3_runtime_suspend(&google->dwc);
|
|
if (ret)
|
|
return ret;
|
|
|
|
return dwc3_google_suspend(google, PMSG_AUTO_SUSPEND);
|
|
}
|
|
|
|
static int dwc3_google_runtime_resume(struct device *dev)
|
|
{
|
|
struct dwc3 *dwc = dev_get_drvdata(dev);
|
|
struct dwc3_google *google = to_dwc3_google(dwc);
|
|
int ret;
|
|
|
|
ret = dwc3_google_resume(google, PMSG_AUTO_RESUME);
|
|
if (ret)
|
|
return ret;
|
|
|
|
return dwc3_runtime_resume(&google->dwc);
|
|
}
|
|
|
|
static int dwc3_google_runtime_idle(struct device *dev)
|
|
{
|
|
return dwc3_runtime_idle(dev_get_drvdata(dev));
|
|
}
|
|
|
|
static const struct dev_pm_ops dwc3_google_dev_pm_ops = {
|
|
SYSTEM_SLEEP_PM_OPS(dwc3_google_pm_suspend, dwc3_google_pm_resume)
|
|
RUNTIME_PM_OPS(dwc3_google_runtime_suspend, dwc3_google_runtime_resume,
|
|
dwc3_google_runtime_idle)
|
|
.complete = pm_sleep_ptr(dwc3_google_complete),
|
|
.prepare = pm_sleep_ptr(dwc3_google_prepare),
|
|
};
|
|
|
|
static const struct of_device_id dwc3_google_of_match[] = {
|
|
{ .compatible = "google,lga-dwc3" },
|
|
{ }
|
|
};
|
|
MODULE_DEVICE_TABLE(of, dwc3_google_of_match);
|
|
|
|
static struct platform_driver dwc3_google_driver = {
|
|
.probe = dwc3_google_probe,
|
|
.remove = dwc3_google_remove,
|
|
.driver = {
|
|
.name = "dwc3-google",
|
|
.pm = pm_ptr(&dwc3_google_dev_pm_ops),
|
|
.of_match_table = dwc3_google_of_match,
|
|
},
|
|
};
|
|
|
|
module_platform_driver(dwc3_google_driver);
|
|
MODULE_LICENSE("GPL");
|
|
MODULE_DESCRIPTION("DesignWare DWC3 Google Glue Driver");
|