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The Socionext Uniphier DWC3 controller binding is already in use, but undocumented. It's a straight-forward binding similar to other DWC3 bindings. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Reviewed-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Link: https://patch.msgid.link/20260105162418.2842825-1-robh@kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
89 lines
1.8 KiB
YAML
89 lines
1.8 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/usb/socionext,uniphier-dwc3.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Socionext Uniphier SuperSpeed DWC3 USB SoC controller
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maintainers:
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- Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
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- Masami Hiramatsu <mhiramat@kernel.org>
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select:
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properties:
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compatible:
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contains:
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const: socionext,uniphier-dwc3
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required:
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- compatible
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properties:
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compatible:
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items:
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- const: socionext,uniphier-dwc3
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- const: snps,dwc3
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reg:
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maxItems: 1
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interrupts:
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minItems: 1
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items:
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- description: Host or single combined interrupt
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- description: Peripheral interrupt
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interrupt-names:
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minItems: 1
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items:
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- enum:
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- dwc_usb3
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- host
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- const: peripheral
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clocks:
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maxItems: 3
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clock-names:
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items:
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- const: ref
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- const: bus_early
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- const: suspend
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phys:
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description: 1 to 4 HighSpeed PHYs followed by 1 or 2 SuperSpeed PHYs
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minItems: 1
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maxItems: 6
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resets:
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maxItems: 1
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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- phys
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unevaluatedProperties: false
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allOf:
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- $ref: snps,dwc3.yaml#
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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usb@65a00000 {
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compatible = "socionext,uniphier-dwc3", "snps,dwc3";
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reg = <0x65a00000 0xcd00>;
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interrupt-names = "dwc_usb3";
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interrupts = <GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>;
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clock-names = "ref", "bus_early", "suspend";
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clocks = <&sys_clk 12>, <&sys_clk 12>, <&sys_clk 12>;
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resets = <&usb0_rst 15>;
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phys = <&usb0_hsphy0>, <&usb0_hsphy1>,
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<&usb0_ssphy0>, <&usb0_ssphy1>;
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dr_mode = "host";
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};
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