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Microchip LAN969x has DWC3 compatible controller, though limited to 2.0(HS) speed, so document it. Signed-off-by: Robert Marko <robert.marko@sartura.hr> Reviewed-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20251229184004.571837-2-robert.marko@sartura.hr Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
66 lines
1.2 KiB
YAML
66 lines
1.2 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/usb/microchip,lan9691-dwc3.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Microchip LAN969x SuperSpeed DWC3 USB SoC controller
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maintainers:
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- Robert Marko <robert.marko@sartura.hr>
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select:
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properties:
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compatible:
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contains:
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enum:
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- microchip,lan9691-dwc3
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required:
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- compatible
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properties:
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compatible:
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items:
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- enum:
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- microchip,lan9691-dwc3
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- const: snps,dwc3
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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items:
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- description: Gated USB DRD clock
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- description: Controller reference clock
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clock-names:
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items:
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- const: bus_early
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- const: ref
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unevaluatedProperties: false
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- clock-names
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allOf:
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- $ref: snps,dwc3.yaml#
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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usb@300000 {
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compatible = "microchip,lan9691-dwc3", "snps,dwc3";
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reg = <0x300000 0x80000>;
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interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clks 12>, <&clks 11>;
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clock-names = "bus_early", "ref";
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};
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