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The Loongson PCH interrupt controller can be referenced in interrupt-map properties (e.g. in arch/loongarch/boot/dts/loongson-2k2000.dtsi), thus the nodes should have address-cells property. Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn> Link: https://patch.msgid.link/e531084ee65a695ec08d0f559caec067877fb9a5.1767505859.git.zhoubinbin@loongson.cn Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
60 lines
1.3 KiB
YAML
60 lines
1.3 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/interrupt-controller/loongson,pch-pic.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Loongson PCH PIC Controller
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maintainers:
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- Jiaxun Yang <jiaxun.yang@flygoat.com>
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description:
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This interrupt controller is found in the Loongson LS7A family of PCH for
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transforming interrupts from on-chip devices into HyperTransport vectorized
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interrupts.
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properties:
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compatible:
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const: loongson,pch-pic-1.0
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reg:
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maxItems: 1
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loongson,pic-base-vec:
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description:
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u32 value of the base of parent HyperTransport vector allocated
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to PCH PIC.
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$ref: /schemas/types.yaml#/definitions/uint32
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minimum: 0
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maximum: 192
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'#address-cells':
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const: 0
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interrupt-controller: true
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'#interrupt-cells':
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const: 2
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required:
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- compatible
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- reg
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- loongson,pic-base-vec
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- interrupt-controller
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- '#interrupt-cells'
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/irq.h>
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pic: interrupt-controller@10000000 {
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compatible = "loongson,pch-pic-1.0";
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reg = <0x10000000 0x400>;
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interrupt-controller;
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#interrupt-cells = <2>;
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loongson,pic-base-vec = <64>;
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interrupt-parent = <&htvec>;
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};
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...
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