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The Loongson Extend I/O interrupt controller can be referenced in interrupt-map properties (e.g. in arch/loongarch/boot/dts/loongson-2k0500.dtsi), thus the nodes should have address-cells property. Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn> Link: https://patch.msgid.link/3e903541d37432c88c27272094420b03418a607d.1767505859.git.zhoubinbin@loongson.cn Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
62 lines
1.2 KiB
YAML
62 lines
1.2 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/interrupt-controller/loongson,eiointc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Loongson Extended I/O Interrupt Controller
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maintainers:
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- Binbin Zhou <zhoubinbin@loongson.cn>
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description: |
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This interrupt controller is found on the Loongson-3 family chips and
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Loongson-2K series chips and is used to distribute interrupts directly to
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individual cores without forwarding them through the HT's interrupt line.
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allOf:
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- $ref: /schemas/interrupt-controller.yaml#
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properties:
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compatible:
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enum:
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- loongson,ls2k0500-eiointc
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- loongson,ls2k2000-eiointc
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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'#address-cells':
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const: 0
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interrupt-controller: true
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'#interrupt-cells':
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const: 1
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required:
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- compatible
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- reg
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- interrupts
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- interrupt-controller
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- '#interrupt-cells'
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unevaluatedProperties: false
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examples:
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- |
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eiointc: interrupt-controller@1fe11600 {
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compatible = "loongson,ls2k0500-eiointc";
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reg = <0x1fe10000 0x10000>;
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interrupt-controller;
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#interrupt-cells = <1>;
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interrupt-parent = <&cpuintc>;
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interrupts = <3>;
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};
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...
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