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The Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs expose the temperature calibration via SMC SIP and do not have a reset for the TSU peripheral, and use different minimum and maximum temperature values compared to the already supported RZ/G3E. Although the calibration data is stored in an OTP memory, the OTP itself is not memory-mapped, access to it is done through an OTP controller. The OTP controller is only accessible from the secure world, but the temperature calibration data stored in the OTP is exposed via SMC. Add support for retrieving the calibration data using arm_smcc_smc(). Add a compatible for RZ/T2H, RZ/N2H can use it as a fallback. Reviewed-by: John Madieu <john.madieu.xa@bp.renesas.com> Tested-by: John Madieu <john.madieu.xa@bp.renesas.com> Signed-off-by: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com> Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com> Link: https://patch.msgid.link/20260108195223.193531-6-cosmin-gabriel.tanislav.xa@renesas.com Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> |
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| .. | ||
| Kconfig | ||
| Makefile | ||
| rcar_gen3_thermal.c | ||
| rcar_thermal.c | ||
| rzg2l_thermal.c | ||
| rzg3e_thermal.c | ||
| rzg3s_thermal.c | ||