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90f7520b76
The boot integrity attribute represents that the CPU or APU is used for the hardware root of trust in the boot process. This bit only represents the CPU/APU and some vendors have other hardware root of trust implementations specific to their designs. Link: https://github.com/fwupd/fwupd/pull/9825 Reviewed-by: Mark Pearson <mpearson-lenovo@squebb.ca> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
137 lines
3.5 KiB
C
137 lines
3.5 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* AMD Platform Security Processor (PSP) interface driver
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*
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* Copyright (C) 2017-2019 Advanced Micro Devices, Inc.
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*
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* Author: Brijesh Singh <brijesh.singh@amd.com>
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*/
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#ifndef __PSP_DEV_H__
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#define __PSP_DEV_H__
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#include <linux/device.h>
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#include <linux/list.h>
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#include <linux/bits.h>
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#include <linux/interrupt.h>
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#include <linux/mutex.h>
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#include <linux/psp.h>
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#include <linux/psp-platform-access.h>
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#include "sp-dev.h"
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#define MAX_PSP_NAME_LEN 16
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extern struct psp_device *psp_master;
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typedef void (*psp_irq_handler_t)(int, void *, unsigned int);
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union psp_cap_register {
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unsigned int raw;
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struct {
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unsigned int sev :1,
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tee :1,
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dbc_thru_ext :1,
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sfs :1,
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rsvd1 :3,
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security_reporting :1,
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fused_part :1,
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boot_integrity :1,
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debug_lock_on :1,
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rsvd3 :2,
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tsme_status :1,
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rsvd4 :1,
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anti_rollback_status :1,
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rpmc_production_enabled :1,
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rpmc_spirom_available :1,
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hsp_tpm_available :1,
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rom_armor_enforced :1,
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rsvd5 :12;
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};
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};
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struct psp_device {
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struct list_head entry;
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struct psp_vdata *vdata;
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char name[MAX_PSP_NAME_LEN];
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struct device *dev;
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struct sp_device *sp;
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void __iomem *io_regs;
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struct mutex mailbox_mutex;
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psp_irq_handler_t sev_irq_handler;
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void *sev_irq_data;
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void *sev_data;
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void *tee_data;
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void *platform_access_data;
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void *dbc_data;
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void *sfs_data;
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union psp_cap_register capability;
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};
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void psp_set_sev_irq_handler(struct psp_device *psp, psp_irq_handler_t handler,
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void *data);
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void psp_clear_sev_irq_handler(struct psp_device *psp);
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struct psp_device *psp_get_master_device(void);
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/**
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* enum psp_cmd - PSP mailbox commands
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* @PSP_CMD_TEE_RING_INIT: Initialize TEE ring buffer
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* @PSP_CMD_TEE_RING_DESTROY: Destroy TEE ring buffer
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* @PSP_CMD_TEE_EXTENDED_CMD: Extended command
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* @PSP_CMD_MAX: Maximum command id
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*/
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enum psp_cmd {
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PSP_CMD_TEE_RING_INIT = 1,
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PSP_CMD_TEE_RING_DESTROY = 2,
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PSP_CMD_TEE_EXTENDED_CMD = 14,
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PSP_CMD_MAX = 15,
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};
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int psp_mailbox_command(struct psp_device *psp, enum psp_cmd cmd, void *cmdbuff,
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unsigned int timeout_msecs, unsigned int *cmdresp);
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/**
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* struct psp_ext_req_buffer_hdr - Structure of the extended command header
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* @payload_size: total payload size
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* @sub_cmd_id: extended command ID
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* @status: status of command execution (out)
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*/
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struct psp_ext_req_buffer_hdr {
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u32 payload_size;
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u32 sub_cmd_id;
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u32 status;
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} __packed;
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struct psp_ext_request {
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struct psp_ext_req_buffer_hdr header;
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void *buf;
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} __packed;
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/**
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* enum psp_sub_cmd - PSP mailbox sub commands
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* @PSP_SUB_CMD_DBC_GET_NONCE: Get nonce from DBC
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* @PSP_SUB_CMD_DBC_SET_UID: Set UID for DBC
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* @PSP_SUB_CMD_DBC_GET_PARAMETER: Get parameter from DBC
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* @PSP_SUB_CMD_DBC_SET_PARAMETER: Set parameter for DBC
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* @PSP_SUB_CMD_SFS_GET_FW_VERS: Get firmware versions for ASP and other MP
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* @PSP_SUB_CMD_SFS_UPDATE: Command to load, verify and execute SFS package
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*/
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enum psp_sub_cmd {
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PSP_SUB_CMD_DBC_GET_NONCE = PSP_DYNAMIC_BOOST_GET_NONCE,
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PSP_SUB_CMD_DBC_SET_UID = PSP_DYNAMIC_BOOST_SET_UID,
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PSP_SUB_CMD_DBC_GET_PARAMETER = PSP_DYNAMIC_BOOST_GET_PARAMETER,
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PSP_SUB_CMD_DBC_SET_PARAMETER = PSP_DYNAMIC_BOOST_SET_PARAMETER,
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PSP_SUB_CMD_SFS_GET_FW_VERS = PSP_SFS_GET_FW_VERSIONS,
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PSP_SUB_CMD_SFS_UPDATE = PSP_SFS_UPDATE,
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};
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int psp_extended_mailbox_cmd(struct psp_device *psp, unsigned int timeout_msecs,
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struct psp_ext_request *req);
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#endif /* __PSP_DEV_H */
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