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This significantly reduces the complexity of the pata_legacy driver. The VLB bus is very obsolete and last appeared on P5 Pentium-era hardware. Support for it has been removed from other drivers, and it is highly unlikely anyone is using it with modern Linux kernels. Some of these chips were integrated on motherboards, but they seem to have all been 486-era boards, which are equally obsolete. Signed-off-by: Ethan Nelson-Moore <enelsonmoore@gmail.com> Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
437 lines
11 KiB
C
437 lines
11 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* pata-legacy.c - Legacy port PATA/SATA controller driver.
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* Copyright 2005/2006 Red Hat, all rights reserved.
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*
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* An ATA driver for the legacy ATA ports.
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*
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* This driver handles legacy (that is "ISA side") IDE ports found
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* on PC class systems. There are three hybrid devices that are exceptions:
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* The Cyrix 5510/5520 where a pre SFF ATA device is on the bridge and
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* the MPIIX where the tuning is PCI side but the IDE is "ISA side".
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*/
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#include <linux/async.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/init.h>
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#include <linux/blkdev.h>
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#include <linux/delay.h>
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#include <scsi/scsi_host.h>
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#include <linux/ata.h>
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#include <linux/libata.h>
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#include <linux/platform_device.h>
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#define DRV_NAME "pata_legacy"
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#define DRV_VERSION "0.6.5"
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#define NR_HOST 6
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static int all;
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module_param(all, int, 0444);
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MODULE_PARM_DESC(all,
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"Set to probe unclaimed pri/sec ISA port ranges even if PCI");
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static int probe_all;
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module_param(probe_all, int, 0);
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MODULE_PARM_DESC(probe_all,
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"Set to probe tertiary+ ISA port ranges even if PCI");
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static int probe_mask = ~0;
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module_param(probe_mask, int, 0);
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MODULE_PARM_DESC(probe_mask, "Probe mask for legacy ISA PATA ports");
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static int autospeed;
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module_param(autospeed, int, 0);
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MODULE_PARM_DESC(autospeed, "Chip present that snoops speed changes");
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static int pio_mask = ATA_PIO4;
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module_param(pio_mask, int, 0);
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MODULE_PARM_DESC(pio_mask, "PIO range for autospeed devices");
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static int iordy_mask = 0xFFFFFFFF;
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module_param(iordy_mask, int, 0);
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MODULE_PARM_DESC(iordy_mask, "Use IORDY if available");
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enum controller {
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BIOS = 0,
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SNOOP = 1,
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UNKNOWN = -1
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};
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struct legacy_data {
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unsigned long timing;
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u8 clock[2];
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u8 last;
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int fast;
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enum controller type;
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struct platform_device *platform_dev;
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};
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struct legacy_probe {
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unsigned char *name;
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unsigned long port;
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unsigned int irq;
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unsigned int slot;
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enum controller type;
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unsigned long private;
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};
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struct legacy_controller {
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const char *name;
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struct ata_port_operations *ops;
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unsigned int pio_mask;
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unsigned int flags;
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unsigned int pflags;
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int (*setup)(struct platform_device *, struct legacy_probe *probe,
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struct legacy_data *data);
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};
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static int legacy_port[NR_HOST] = { 0x1f0, 0x170, 0x1e8, 0x168, 0x1e0, 0x160 };
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static struct legacy_probe probe_list[NR_HOST];
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static struct legacy_data legacy_data[NR_HOST];
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static struct ata_host *legacy_host[NR_HOST];
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/**
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* legacy_probe_add - Add interface to probe list
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* @port: Controller port
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* @irq: IRQ number
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* @type: Controller type
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* @private: Controller specific info
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*
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* Add an entry into the probe list for ATA controllers. This is used
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* to add the default ISA slots and then to build up the table
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* further according to other ISA/Weird device scans
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*
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* An I/O port list is used to keep ordering stable and sane, as we
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* don't have any good way to talk about ordering otherwise
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*/
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static int legacy_probe_add(unsigned long port, unsigned int irq,
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enum controller type, unsigned long private)
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{
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struct legacy_probe *lp = &probe_list[0];
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int i;
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struct legacy_probe *free = NULL;
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for (i = 0; i < NR_HOST; i++) {
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if (lp->port == 0 && free == NULL)
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free = lp;
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/* Matching port, or the correct slot for ordering */
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if (lp->port == port || legacy_port[i] == port) {
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if (!(probe_mask & 1 << i))
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return -1;
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free = lp;
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break;
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}
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lp++;
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}
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if (free == NULL) {
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printk(KERN_ERR "pata_legacy: Too many interfaces.\n");
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return -1;
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}
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/* Fill in the entry for later probing */
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free->port = port;
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free->irq = irq;
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free->type = type;
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free->private = private;
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return 0;
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}
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/**
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* legacy_set_mode - mode setting
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* @link: IDE link
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* @unused: Device that failed when error is returned
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*
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* Use a non standard set_mode function. We don't want to be tuned.
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*
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* The BIOS configured everything. Our job is not to fiddle. Just use
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* whatever PIO the hardware is using and leave it at that. When we
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* get some kind of nice user driven API for control then we can
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* expand on this as per hdparm in the base kernel.
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*/
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static int legacy_set_mode(struct ata_link *link, struct ata_device **unused)
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{
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struct ata_device *dev;
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ata_for_each_dev(dev, link, ENABLED) {
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ata_dev_info(dev, "configured for PIO\n");
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dev->pio_mode = XFER_PIO_0;
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dev->xfer_mode = XFER_PIO_0;
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dev->xfer_shift = ATA_SHIFT_PIO;
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dev->flags |= ATA_DFLAG_PIO;
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}
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return 0;
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}
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static const struct scsi_host_template legacy_sht = {
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ATA_PIO_SHT(DRV_NAME),
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};
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static const struct ata_port_operations legacy_base_port_ops = {
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.inherits = &ata_sff_port_ops,
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.cable_detect = ata_cable_40wire,
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};
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/*
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* These ops are used if the user indicates the hardware
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* snoops the commands to decide on the mode and handles the
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* mode selection "magically" itself. Several legacy controllers
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* do this. The mode range can be set if it is not 0x1F by setting
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* pio_mask as well.
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*/
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static struct ata_port_operations simple_port_ops = {
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.inherits = &legacy_base_port_ops,
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.sff_data_xfer = ata_sff_data_xfer32,
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};
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static struct ata_port_operations legacy_port_ops = {
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.inherits = &legacy_base_port_ops,
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.sff_data_xfer = ata_sff_data_xfer32,
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.set_mode = legacy_set_mode,
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};
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static struct legacy_controller controllers[] = {
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{"BIOS", &legacy_port_ops, ATA_PIO4,
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ATA_FLAG_NO_IORDY, 0, NULL },
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{"Snooping", &simple_port_ops, ATA_PIO4,
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0, 0, NULL },
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};
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/**
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* probe_chip_type - Discover controller
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* @probe: Probe entry to check
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*
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* Probe an ATA port and identify the type of controller. We don't
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* check if the controller appears to be driveless at this point.
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*/
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static __init int probe_chip_type(struct legacy_probe *probe)
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{
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int mask = 1 << probe->slot;
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if (autospeed & mask)
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return SNOOP;
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return BIOS;
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}
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/**
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* legacy_init_one - attach a legacy interface
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* @probe: probe record
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*
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* Register an ISA bus IDE interface. Such interfaces are PIO and we
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* assume do not support IRQ sharing.
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*/
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static __init int legacy_init_one(struct legacy_probe *probe)
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{
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struct legacy_controller *controller = &controllers[probe->type];
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int pio_modes = controller->pio_mask;
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unsigned long io = probe->port;
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u32 mask = (1 << probe->slot);
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struct ata_port_operations *ops = controller->ops;
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struct legacy_data *ld = &legacy_data[probe->slot];
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struct ata_host *host = NULL;
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struct ata_port *ap;
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struct platform_device *pdev;
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struct ata_device *dev;
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void __iomem *io_addr, *ctrl_addr;
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u32 iordy = (iordy_mask & mask) ? 0: ATA_FLAG_NO_IORDY;
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int ret;
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iordy |= controller->flags;
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pdev = platform_device_register_simple(DRV_NAME, probe->slot, NULL, 0);
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if (IS_ERR(pdev))
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return PTR_ERR(pdev);
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ret = -EBUSY;
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if (devm_request_region(&pdev->dev, io, 8, "pata_legacy") == NULL ||
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devm_request_region(&pdev->dev, io + 0x0206, 1,
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"pata_legacy") == NULL)
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goto fail;
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ret = -ENOMEM;
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io_addr = devm_ioport_map(&pdev->dev, io, 8);
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ctrl_addr = devm_ioport_map(&pdev->dev, io + 0x0206, 1);
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if (!io_addr || !ctrl_addr)
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goto fail;
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ld->type = probe->type;
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if (controller->setup)
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if (controller->setup(pdev, probe, ld) < 0)
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goto fail;
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host = ata_host_alloc(&pdev->dev, 1);
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if (!host)
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goto fail;
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ap = host->ports[0];
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ap->ops = ops;
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ap->pio_mask = pio_modes;
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ap->flags |= ATA_FLAG_SLAVE_POSS | iordy;
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ap->pflags |= controller->pflags;
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ap->ioaddr.cmd_addr = io_addr;
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ap->ioaddr.altstatus_addr = ctrl_addr;
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ap->ioaddr.ctl_addr = ctrl_addr;
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ata_sff_std_ports(&ap->ioaddr);
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ap->host->private_data = ld;
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ata_port_desc(ap, "cmd 0x%lx ctl 0x%lx", io, io + 0x0206);
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ret = ata_host_activate(host, probe->irq, ata_sff_interrupt, 0,
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&legacy_sht);
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if (ret)
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goto fail;
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async_synchronize_full();
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ld->platform_dev = pdev;
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/* Nothing found means we drop the port as its probably not there */
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ret = -ENODEV;
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ata_for_each_dev(dev, &ap->link, ALL) {
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if (!ata_dev_absent(dev)) {
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legacy_host[probe->slot] = host;
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ld->platform_dev = pdev;
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return 0;
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}
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}
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ata_host_detach(host);
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fail:
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platform_device_unregister(pdev);
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return ret;
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}
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/**
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* legacy_check_special_cases - ATA special cases
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* @p: PCI device to check
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* @primary: set this if we find an ATA master
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* @secondary: set this if we find an ATA secondary
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*
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* A small number of vendors implemented early PCI ATA interfaces
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* on bridge logic without the ATA interface being PCI visible.
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* Where we have a matching PCI driver we must skip the relevant
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* device here. If we don't know about it then the legacy driver
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* is the right driver anyway.
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*/
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static void __init legacy_check_special_cases(struct pci_dev *p, int *primary,
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int *secondary)
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{
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/* Cyrix CS5510 pre SFF MWDMA ATA on the bridge */
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if (p->vendor == 0x1078 && p->device == 0x0000) {
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*primary = *secondary = 1;
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return;
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}
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/* Cyrix CS5520 pre SFF MWDMA ATA on the bridge */
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if (p->vendor == 0x1078 && p->device == 0x0002) {
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*primary = *secondary = 1;
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return;
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}
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/* Intel MPIIX - PIO ATA on non PCI side of bridge */
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if (p->vendor == 0x8086 && p->device == 0x1234) {
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u16 r;
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pci_read_config_word(p, 0x6C, &r);
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if (r & 0x8000) {
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/* ATA port enabled */
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if (r & 0x4000)
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*secondary = 1;
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else
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*primary = 1;
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}
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return;
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}
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}
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/**
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* legacy_init - attach legacy interfaces
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*
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* Attach legacy IDE interfaces by scanning the usual IRQ/port suspects.
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* Right now we do not scan the ide0 and ide1 address but should do so
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* for non PCI systems or systems with no PCI IDE legacy mode devices.
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* If you fix that note there are special cases to consider like CS5510/20.
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*/
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static __init int legacy_init(void)
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{
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int i;
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int ct = 0;
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int primary = 0;
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int secondary = 0;
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int pci_present = 0;
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struct legacy_probe *pl = &probe_list[0];
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int slot = 0;
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struct pci_dev *p = NULL;
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for_each_pci_dev(p) {
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int r;
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/* Check for any overlap of the system ATA mappings. Native
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mode controllers stuck on these addresses or some devices
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in 'raid' mode won't be found by the storage class test */
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for (r = 0; r < 6; r++) {
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if (pci_resource_start(p, r) == 0x1f0)
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primary = 1;
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if (pci_resource_start(p, r) == 0x170)
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secondary = 1;
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}
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/* Check for special cases */
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legacy_check_special_cases(p, &primary, &secondary);
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/* If PCI bus is present then don't probe for tertiary
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legacy ports */
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pci_present = 1;
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}
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if (primary == 0 || all)
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legacy_probe_add(0x1F0, 14, UNKNOWN, 0);
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if (secondary == 0 || all)
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legacy_probe_add(0x170, 15, UNKNOWN, 0);
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if (probe_all || !pci_present) {
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/* ISA extra ports */
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legacy_probe_add(0x1E8, 11, UNKNOWN, 0);
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legacy_probe_add(0x168, 10, UNKNOWN, 0);
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legacy_probe_add(0x1E0, 8, UNKNOWN, 0);
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legacy_probe_add(0x160, 12, UNKNOWN, 0);
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}
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for (i = 0; i < NR_HOST; i++, pl++) {
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if (pl->port == 0)
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continue;
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if (pl->type == UNKNOWN)
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pl->type = probe_chip_type(pl);
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pl->slot = slot++;
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if (legacy_init_one(pl) == 0)
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ct++;
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}
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if (ct != 0)
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return 0;
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return -ENODEV;
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}
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static __exit void legacy_exit(void)
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{
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int i;
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for (i = 0; i < NR_HOST; i++) {
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struct legacy_data *ld = &legacy_data[i];
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if (legacy_host[i])
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ata_host_detach(legacy_host[i]);
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platform_device_unregister(ld->platform_dev);
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}
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}
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MODULE_AUTHOR("Alan Cox");
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MODULE_DESCRIPTION("low-level driver for legacy ATA");
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MODULE_LICENSE("GPL");
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MODULE_VERSION(DRV_VERSION);
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module_init(legacy_init);
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module_exit(legacy_exit);
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