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bb0c99e08a
The implementation of __READ_ONCE() under CONFIG_LTO=y incorrectly
qualified the fallback "once" access for types larger than 8 bytes,
which are not atomic but should still happen "once" and suppress common
compiler optimizations.
The cast `volatile typeof(__x)` applied the volatile qualifier to the
pointer type itself rather than the pointee. This created a volatile
pointer to a non-volatile type, which violated __READ_ONCE() semantics.
Fix this by casting to `volatile typeof(*__x) *`.
With a defconfig + LTO + debug options build, we see the following
functions to be affected:
xen_manage_runstate_time (884 -> 944 bytes)
xen_steal_clock (248 -> 340 bytes)
^-- use __READ_ONCE() to load vcpu_runstate_info structs
Fixes: e35123d83e ("arm64: lto: Strengthen READ_ONCE() to acquire when CONFIG_LTO=y")
Cc: stable@vger.kernel.org
Reviewed-by: Boqun Feng <boqun@kernel.org>
Signed-off-by: Marco Elver <elver@google.com>
Tested-by: David Laight <david.laight.linux@gmail.com>
Signed-off-by: Will Deacon <will@kernel.org>
69 lines
1.8 KiB
C
69 lines
1.8 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (C) 2020 Google LLC.
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*/
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#ifndef __ASM_RWONCE_H
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#define __ASM_RWONCE_H
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#if defined(CONFIG_LTO) && !defined(__ASSEMBLER__)
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#include <linux/compiler_types.h>
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#include <asm/alternative-macros.h>
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#ifndef BUILD_VDSO
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#define __LOAD_RCPC(sfx, regs...) \
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ALTERNATIVE( \
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"ldar" #sfx "\t" #regs, \
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".arch_extension rcpc\n" \
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"ldapr" #sfx "\t" #regs, \
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ARM64_HAS_LDAPR)
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/*
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* When building with LTO, there is an increased risk of the compiler
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* converting an address dependency headed by a READ_ONCE() invocation
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* into a control dependency and consequently allowing for harmful
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* reordering by the CPU.
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*
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* Ensure that such transformations are harmless by overriding the generic
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* READ_ONCE() definition with one that provides RCpc acquire semantics
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* when building with LTO.
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*/
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#define __READ_ONCE(x) \
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({ \
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typeof(&(x)) __x = &(x); \
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int atomic = 1; \
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union { __unqual_scalar_typeof(*__x) __val; char __c[1]; } __u; \
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switch (sizeof(x)) { \
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case 1: \
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asm volatile(__LOAD_RCPC(b, %w0, %1) \
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: "=r" (*(__u8 *)__u.__c) \
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: "Q" (*__x) : "memory"); \
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break; \
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case 2: \
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asm volatile(__LOAD_RCPC(h, %w0, %1) \
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: "=r" (*(__u16 *)__u.__c) \
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: "Q" (*__x) : "memory"); \
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break; \
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case 4: \
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asm volatile(__LOAD_RCPC(, %w0, %1) \
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: "=r" (*(__u32 *)__u.__c) \
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: "Q" (*__x) : "memory"); \
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break; \
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case 8: \
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asm volatile(__LOAD_RCPC(, %0, %1) \
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: "=r" (*(__u64 *)__u.__c) \
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: "Q" (*__x) : "memory"); \
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break; \
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default: \
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atomic = 0; \
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} \
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atomic ? (typeof(*__x))__u.__val : (*(volatile typeof(*__x) *)__x);\
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})
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#endif /* !BUILD_VDSO */
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#endif /* CONFIG_LTO && !__ASSEMBLER__ */
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#include <asm-generic/rwonce.h>
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#endif /* __ASM_RWONCE_H */
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