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iio: dac: Add MAX22007 DAC driver support
Add support for the MAX22007 4 channel DAC that drives a voltage or current output on each channel. Signed-off-by: Janani Sunil <janani.sunil@analog.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
This commit is contained in:
Janani Sunil
Jonathan Cameron
parent
2f7bc8f01a
commit
f52690c508
4 changed files with 506 additions and 0 deletions
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@ -1616,6 +1616,7 @@ L: linux-iio@vger.kernel.org
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S: Supported
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W: https://ez.analog.com/linux-software-drivers
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F: Documentation/devicetree/bindings/iio/dac/adi,max22007.yaml
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F: drivers/iio/dac/max22007.c
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ANALOG DEVICES INC ADA4250 DRIVER
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M: Antoniu Miclaus <antoniu.miclaus@analog.com>
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@ -482,6 +482,19 @@ config MAX517
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This driver can also be built as a module. If so, the module
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will be called max517.
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config MAX22007
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tristate "Analog Devices MAX22007 DAC Driver"
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depends on SPI
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select REGMAP_SPI
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select CRC8
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help
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Say Y here if you want to build a driver for Analog Devices MAX22007.
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MAX22007 is a quad-channel, 12-bit, voltage-output digital to
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analog converter (DAC) with SPI interface.
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If compiled as a module, it will be called max22007.
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config MAX5522
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tristate "Maxim MAX5522 DAC driver"
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depends on SPI_MASTER
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@ -48,6 +48,7 @@ obj-$(CONFIG_LTC2664) += ltc2664.o
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obj-$(CONFIG_LTC2688) += ltc2688.o
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obj-$(CONFIG_M62332) += m62332.o
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obj-$(CONFIG_MAX517) += max517.o
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obj-$(CONFIG_MAX22007) += max22007.o
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obj-$(CONFIG_MAX5522) += max5522.o
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obj-$(CONFIG_MAX5821) += max5821.o
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obj-$(CONFIG_MCP4725) += mcp4725.o
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491
drivers/iio/dac/max22007.c
Normal file
491
drivers/iio/dac/max22007.c
Normal file
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@ -0,0 +1,491 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* max22007.c - MAX22007 DAC driver
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*
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* Driver for Analog Devices MAX22007 Digital to Analog Converter.
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*
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* Copyright (c) 2026 Analog Devices Inc.
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*/
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#include <linux/bitfield.h>
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#include <linux/bits.h>
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#include <linux/crc8.h>
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#include <linux/delay.h>
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#include <linux/dev_printk.h>
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#include <linux/device/devres.h>
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#include <linux/err.h>
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#include <linux/errno.h>
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#include <linux/gpio/consumer.h>
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#include <linux/iio/iio.h>
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#include <linux/kstrtox.h>
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#include <linux/minmax.h>
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#include <linux/mod_devicetable.h>
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#include <linux/module.h>
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#include <linux/property.h>
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#include <linux/regmap.h>
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#include <linux/regulator/consumer.h>
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#include <linux/slab.h>
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#include <linux/spi/spi.h>
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#include <linux/string.h>
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#include <linux/sysfs.h>
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#include <linux/types.h>
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#include <dt-bindings/iio/addac/adi,ad74413r.h>
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struct device;
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#define MAX22007_NUM_CHANNELS 4
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#define MAX22007_REV_ID_REG 0x00
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#define MAX22007_STAT_INTR_REG 0x01
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#define MAX22007_INTERRUPT_EN_REG 0x02
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#define MAX22007_CONFIG_REG 0x03
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#define MAX22007_CONTROL_REG 0x04
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#define MAX22007_CHANNEL_MODE_REG 0x05
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#define MAX22007_SOFT_RESET_REG 0x06
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#define MAX22007_DAC_CHANNEL_REG(ch) (0x07 + (ch))
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#define MAX22007_GPIO_CTRL_REG 0x0B
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#define MAX22007_GPIO_DATA_REG 0x0C
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#define MAX22007_GPI_EDGE_INT_CTRL_REG 0x0D
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#define MAX22007_GPI_INT_STATUS_REG 0x0E
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/* Channel mask definitions */
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#define MAX22007_CH_MODE_CH_MASK(ch) BIT(12 + (ch))
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#define MAX22007_CH_PWRON_CH_MASK(ch) BIT(8 + (ch))
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#define MAX22007_DAC_LATCH_MODE_MASK(ch) BIT(12 + (ch))
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#define MAX22007_LDAC_UPDATE_MASK(ch) BIT(12 + (ch))
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#define MAX22007_SW_RST_MASK BIT(8)
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#define MAX22007_SW_CLR_MASK BIT(12)
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#define MAX22007_SOFT_RESET_BITS_MASK (MAX22007_SW_RST_MASK | \
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MAX22007_SW_CLR_MASK)
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#define MAX22007_DAC_DATA_MASK GENMASK(15, 4)
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#define MAX22007_DAC_MAX_RAW GENMASK(11, 0)
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#define MAX22007_CRC8_POLYNOMIAL 0x8C
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#define MAX22007_CRC_EN_MASK BIT(0)
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#define MAX22007_RW_MASK BIT(0)
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#define MAX22007_CRC_OVERHEAD 1
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#define MAX22007_NUM_SUPPLIES 3
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#define MAX22007_REF_MV 2500
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/* Field value preparation macros with masking */
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#define MAX22007_CH_PWR_VAL(ch, val) (((val) & 0x1) << (8 + (ch)))
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#define MAX22007_CH_MODE_VAL(ch, val) (((val) & 0x1) << (12 + (ch)))
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#define MAX22007_DAC_LATCH_MODE_VAL(ch, val) (((val) & 0x1) << (12 + (ch)))
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static u8 max22007_crc8_table[CRC8_TABLE_SIZE];
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static const char * const max22007_supply_names[MAX22007_NUM_SUPPLIES] = {
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"vdd",
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"hvdd",
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"hvss",
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};
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struct max22007_state {
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struct spi_device *spi;
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struct regmap *regmap;
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struct iio_chan_spec *iio_chans;
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u8 tx_buf[4] __aligned(IIO_DMA_MINALIGN);
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u8 rx_buf[4];
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};
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static int max22007_spi_read(void *context, const void *reg, size_t reg_size,
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void *val, size_t val_size)
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{
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struct max22007_state *st = context;
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u8 calculated_crc, received_crc;
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u8 rx_buf[4];
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u8 reg_byte;
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int ret;
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if (reg_size != 1)
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return -EINVAL;
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if (val_size == 0 || val_size > 3)
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return -EINVAL;
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memcpy(®_byte, reg, 1);
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ret = spi_write_then_read(st->spi, ®_byte, 1, rx_buf,
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val_size + MAX22007_CRC_OVERHEAD);
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if (ret) {
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dev_err(&st->spi->dev, "SPI transfer failed: %d\n", ret);
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return ret;
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}
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calculated_crc = crc8(max22007_crc8_table, ®_byte, 1, 0x00);
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calculated_crc = crc8(max22007_crc8_table, rx_buf, 2, calculated_crc);
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received_crc = rx_buf[val_size];
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if (calculated_crc != received_crc) {
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dev_err(&st->spi->dev, "CRC mismatch on read register %02x\n", reg_byte);
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return -EIO;
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}
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memcpy(val, rx_buf, val_size);
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return 0;
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}
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static int max22007_spi_write(void *context, const void *data, size_t count)
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{
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struct max22007_state *st = context;
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struct spi_transfer xfer = {
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.tx_buf = st->tx_buf,
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.rx_buf = st->rx_buf,
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};
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if (count + MAX22007_CRC_OVERHEAD > sizeof(st->tx_buf))
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return -EINVAL;
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memset(st->tx_buf, 0, sizeof(st->tx_buf));
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xfer.len = count + MAX22007_CRC_OVERHEAD;
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memcpy(st->tx_buf, data, count);
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st->tx_buf[count] = crc8(max22007_crc8_table, st->tx_buf,
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sizeof(st->tx_buf) - 1, 0x00);
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return spi_sync_transfer(st->spi, &xfer, 1);
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}
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static bool max22007_reg_readable(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case MAX22007_REV_ID_REG:
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case MAX22007_STAT_INTR_REG:
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case MAX22007_CONFIG_REG:
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case MAX22007_CONTROL_REG:
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case MAX22007_CHANNEL_MODE_REG:
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case MAX22007_SOFT_RESET_REG:
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case MAX22007_GPIO_CTRL_REG:
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case MAX22007_GPIO_DATA_REG:
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case MAX22007_GPI_EDGE_INT_CTRL_REG:
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case MAX22007_GPI_INT_STATUS_REG:
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return true;
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case MAX22007_DAC_CHANNEL_REG(0) ... MAX22007_DAC_CHANNEL_REG(MAX22007_NUM_CHANNELS - 1):
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return true;
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default:
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return false;
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}
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}
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static bool max22007_reg_writable(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case MAX22007_CONFIG_REG:
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case MAX22007_CONTROL_REG:
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case MAX22007_CHANNEL_MODE_REG:
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case MAX22007_SOFT_RESET_REG:
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case MAX22007_GPIO_CTRL_REG:
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case MAX22007_GPIO_DATA_REG:
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case MAX22007_GPI_EDGE_INT_CTRL_REG:
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return true;
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case MAX22007_DAC_CHANNEL_REG(0) ... MAX22007_DAC_CHANNEL_REG(MAX22007_NUM_CHANNELS - 1):
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return true;
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default:
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return false;
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}
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}
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static const struct regmap_bus max22007_regmap_bus = {
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.read = max22007_spi_read,
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.write = max22007_spi_write,
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.read_flag_mask = MAX22007_RW_MASK,
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.reg_format_endian_default = REGMAP_ENDIAN_BIG,
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.val_format_endian_default = REGMAP_ENDIAN_BIG,
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};
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static const struct regmap_config max22007_regmap_config = {
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.reg_bits = 8,
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.val_bits = 16,
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.reg_shift = -1,
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.readable_reg = max22007_reg_readable,
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.writeable_reg = max22007_reg_writable,
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.max_register = 0x0E,
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};
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static int max22007_write_channel_data(struct max22007_state *st,
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unsigned int channel, int data)
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{
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unsigned int reg_val;
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if (data < 0 || data > MAX22007_DAC_MAX_RAW)
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return -EINVAL;
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reg_val = FIELD_PREP(MAX22007_DAC_DATA_MASK, data);
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return regmap_write(st->regmap, MAX22007_DAC_CHANNEL_REG(channel), reg_val);
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}
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static int max22007_read_channel_data(struct max22007_state *st,
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unsigned int channel, int *data)
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{
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unsigned int reg_val;
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int ret;
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ret = regmap_read(st->regmap, MAX22007_DAC_CHANNEL_REG(channel), ®_val);
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if (ret)
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return ret;
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*data = FIELD_GET(MAX22007_DAC_DATA_MASK, reg_val);
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return 0;
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}
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static int max22007_read_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int *val, int *val2, long mask)
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{
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struct max22007_state *st = iio_priv(indio_dev);
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int ret;
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switch (mask) {
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case IIO_CHAN_INFO_RAW:
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ret = max22007_read_channel_data(st, chan->channel, val);
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if (ret)
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return ret;
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return IIO_VAL_INT;
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case IIO_CHAN_INFO_SCALE:
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if (chan->type == IIO_VOLTAGE)
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*val = 5 * MAX22007_REF_MV; /* 5 * Vref in mV */
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else
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*val = 25; /* Vref / (2 * Rsense) = MAX22007_REF_MV / 100 */
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*val2 = 12; /* 12-bit DAC resolution */
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return IIO_VAL_FRACTIONAL_LOG2;
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default:
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return -EINVAL;
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}
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}
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static int max22007_write_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int val, int val2, long mask)
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{
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struct max22007_state *st = iio_priv(indio_dev);
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switch (mask) {
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case IIO_CHAN_INFO_RAW:
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return max22007_write_channel_data(st, chan->channel, val);
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default:
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return -EINVAL;
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}
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}
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static const struct iio_info max22007_info = {
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.read_raw = max22007_read_raw,
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.write_raw = max22007_write_raw,
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};
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static ssize_t max22007_read_dac_powerdown(struct iio_dev *indio_dev,
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uintptr_t private,
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const struct iio_chan_spec *chan,
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char *buf)
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{
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struct max22007_state *st = iio_priv(indio_dev);
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unsigned int reg_val;
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bool powerdown;
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int ret;
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ret = regmap_read(st->regmap, MAX22007_CHANNEL_MODE_REG, ®_val);
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if (ret)
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return ret;
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powerdown = !(reg_val & MAX22007_CH_PWRON_CH_MASK(chan->channel));
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return sysfs_emit(buf, "%d\n", powerdown);
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}
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static ssize_t max22007_write_dac_powerdown(struct iio_dev *indio_dev,
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uintptr_t private,
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const struct iio_chan_spec *chan,
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const char *buf, size_t len)
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{
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struct max22007_state *st = iio_priv(indio_dev);
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bool powerdown;
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int ret;
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ret = kstrtobool(buf, &powerdown);
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if (ret)
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return ret;
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ret = regmap_update_bits(st->regmap, MAX22007_CHANNEL_MODE_REG,
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MAX22007_CH_PWRON_CH_MASK(chan->channel),
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MAX22007_CH_PWR_VAL(chan->channel, powerdown ? 0 : 1));
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if (ret)
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return ret;
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return len;
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}
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static const struct iio_chan_spec_ext_info max22007_ext_info[] = {
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{
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.name = "powerdown",
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.read = max22007_read_dac_powerdown,
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.write = max22007_write_dac_powerdown,
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.shared = IIO_SEPARATE,
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},
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{ }
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};
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static int max22007_parse_channel_cfg(struct max22007_state *st, u8 *num_channels)
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{
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struct device *dev = &st->spi->dev;
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int ret, num_chan;
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int i = 0;
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u32 reg;
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num_chan = device_get_child_node_count(dev);
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if (!num_chan)
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return dev_err_probe(dev, -ENODEV, "no channels configured\n");
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st->iio_chans = devm_kcalloc(dev, num_chan, sizeof(*st->iio_chans), GFP_KERNEL);
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if (!st->iio_chans)
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return -ENOMEM;
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device_for_each_child_node_scoped(dev, child) {
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u32 ch_func;
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enum iio_chan_type chan_type;
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ret = fwnode_property_read_u32(child, "reg", ®);
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if (ret)
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return dev_err_probe(dev, ret,
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"failed to read reg property of %pfwP\n", child);
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if (reg >= MAX22007_NUM_CHANNELS)
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return dev_err_probe(dev, -EINVAL,
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"reg out of range in %pfwP\n", child);
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ret = fwnode_property_read_u32(child, "adi,ch-func", &ch_func);
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if (ret)
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return dev_err_probe(dev, ret,
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"missing adi,ch-func property for %pfwP\n", child);
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switch (ch_func) {
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case CH_FUNC_VOLTAGE_OUTPUT:
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chan_type = IIO_VOLTAGE;
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break;
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case CH_FUNC_CURRENT_OUTPUT:
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chan_type = IIO_CURRENT;
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break;
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default:
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return dev_err_probe(dev, -EINVAL,
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"invalid adi,ch-func %u for %pfwP\n",
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ch_func, child);
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}
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st->iio_chans[i++] = (struct iio_chan_spec) {
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.output = 1,
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.indexed = 1,
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.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
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BIT(IIO_CHAN_INFO_SCALE),
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.ext_info = max22007_ext_info,
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.channel = reg,
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.type = chan_type,
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};
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ret = regmap_update_bits(st->regmap, MAX22007_CHANNEL_MODE_REG,
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MAX22007_CH_MODE_CH_MASK(reg),
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MAX22007_CH_MODE_VAL(reg, ch_func - 1));
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if (ret)
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return ret;
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/* Set DAC to transparent mode (immediate update) */
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ret = regmap_update_bits(st->regmap, MAX22007_CONFIG_REG,
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MAX22007_DAC_LATCH_MODE_MASK(reg),
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MAX22007_DAC_LATCH_MODE_VAL(reg, 1));
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if (ret)
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return ret;
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}
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|
||||
*num_channels = num_chan;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int max22007_probe(struct spi_device *spi)
|
||||
{
|
||||
struct device *dev = &spi->dev;
|
||||
struct gpio_desc *reset_gpio;
|
||||
struct max22007_state *st;
|
||||
struct iio_dev *indio_dev;
|
||||
u8 num_channels;
|
||||
int ret;
|
||||
|
||||
indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
|
||||
if (!indio_dev)
|
||||
return -ENOMEM;
|
||||
|
||||
st = iio_priv(indio_dev);
|
||||
st->spi = spi;
|
||||
|
||||
crc8_populate_lsb(max22007_crc8_table, MAX22007_CRC8_POLYNOMIAL);
|
||||
|
||||
st->regmap = devm_regmap_init(dev, &max22007_regmap_bus, st,
|
||||
&max22007_regmap_config);
|
||||
if (IS_ERR(st->regmap))
|
||||
return dev_err_probe(dev, PTR_ERR(st->regmap),
|
||||
"Failed to initialize regmap\n");
|
||||
|
||||
ret = devm_regulator_bulk_get_enable(dev, MAX22007_NUM_SUPPLIES,
|
||||
max22007_supply_names);
|
||||
if (ret)
|
||||
return dev_err_probe(dev, ret, "Failed to get and enable regulators\n");
|
||||
|
||||
reset_gpio = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_LOW);
|
||||
if (IS_ERR(reset_gpio))
|
||||
return dev_err_probe(dev, PTR_ERR(reset_gpio),
|
||||
"Failed to get reset GPIO\n");
|
||||
|
||||
if (reset_gpio) {
|
||||
gpiod_set_value_cansleep(reset_gpio, 1);
|
||||
usleep_range(1000, 5000);
|
||||
gpiod_set_value_cansleep(reset_gpio, 0);
|
||||
usleep_range(1000, 5000);
|
||||
} else {
|
||||
ret = regmap_write(st->regmap, MAX22007_SOFT_RESET_REG,
|
||||
MAX22007_SOFT_RESET_BITS_MASK);
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = regmap_set_bits(st->regmap, MAX22007_CONFIG_REG,
|
||||
MAX22007_CRC_EN_MASK);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = max22007_parse_channel_cfg(st, &num_channels);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
indio_dev->info = &max22007_info;
|
||||
indio_dev->modes = INDIO_DIRECT_MODE;
|
||||
indio_dev->channels = st->iio_chans;
|
||||
indio_dev->num_channels = num_channels;
|
||||
indio_dev->name = "max22007";
|
||||
|
||||
return devm_iio_device_register(dev, indio_dev);
|
||||
}
|
||||
|
||||
static const struct spi_device_id max22007_id[] = {
|
||||
{ "max22007" },
|
||||
{ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(spi, max22007_id);
|
||||
|
||||
static const struct of_device_id max22007_of_match[] = {
|
||||
{ .compatible = "adi,max22007" },
|
||||
{ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, max22007_of_match);
|
||||
|
||||
static struct spi_driver max22007_driver = {
|
||||
.driver = {
|
||||
.name = "max22007",
|
||||
.of_match_table = max22007_of_match,
|
||||
},
|
||||
.probe = max22007_probe,
|
||||
.id_table = max22007_id,
|
||||
};
|
||||
module_spi_driver(max22007_driver);
|
||||
|
||||
MODULE_AUTHOR("Janani Sunil <janani.sunil@analog.com>");
|
||||
MODULE_DESCRIPTION("Analog Devices MAX22007 DAC");
|
||||
MODULE_LICENSE("GPL");
|
||||
Loading…
Add table
Add a link
Reference in a new issue