ASoC: codecs: Remove unused rt566[58]_sel_asrc_clk_src

rt5665_sel_asrc_clk_src() was added in 2016 by
commit 33ada14a26 ("ASoC: add rt5665 codec driver")

rt5668_sel_asrc_clk_src() was added in 2018 by
commit d59fb28562 ("ASoC: rt5668: add rt5668B codec driver")

Neither have been used.

Remove them.

Signed-off-by: "Dr. David Alan Gilbert" <linux@treblig.org>
Link: https://patch.msgid.link/20250420232733.182802-1-linux@treblig.org
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Dr. David Alan Gilbert 2025-04-21 00:27:33 +01:00 committed by Mark Brown
parent 6070ef6e42
commit f506d45666
No known key found for this signature in database
GPG key ID: 24D68B725D5487D0
4 changed files with 0 additions and 145 deletions

View file

@ -1022,102 +1022,6 @@ static int rt5665_mono_vol_put(struct snd_kcontrol *kcontrol,
return ret;
}
/**
* rt5665_sel_asrc_clk_src - select ASRC clock source for a set of filters
* @component: SoC audio component device.
* @filter_mask: mask of filters.
* @clk_src: clock source
*
* The ASRC function is for asynchronous MCLK and LRCK. Also, since RT5665 can
* only support standard 32fs or 64fs i2s format, ASRC should be enabled to
* support special i2s clock format such as Intel's 100fs(100 * sampling rate).
* ASRC function will track i2s clock and generate a corresponding system clock
* for codec. This function provides an API to select the clock source for a
* set of filters specified by the mask. And the codec driver will turn on ASRC
* for these filters if ASRC is selected as their clock source.
*/
int rt5665_sel_asrc_clk_src(struct snd_soc_component *component,
unsigned int filter_mask, unsigned int clk_src)
{
unsigned int asrc2_mask = 0;
unsigned int asrc2_value = 0;
unsigned int asrc3_mask = 0;
unsigned int asrc3_value = 0;
switch (clk_src) {
case RT5665_CLK_SEL_SYS:
case RT5665_CLK_SEL_I2S1_ASRC:
case RT5665_CLK_SEL_I2S2_ASRC:
case RT5665_CLK_SEL_I2S3_ASRC:
case RT5665_CLK_SEL_SYS2:
case RT5665_CLK_SEL_SYS3:
case RT5665_CLK_SEL_SYS4:
break;
default:
return -EINVAL;
}
if (filter_mask & RT5665_DA_STEREO1_FILTER) {
asrc2_mask |= RT5665_DA_STO1_CLK_SEL_MASK;
asrc2_value = (asrc2_value & ~RT5665_DA_STO1_CLK_SEL_MASK)
| (clk_src << RT5665_DA_STO1_CLK_SEL_SFT);
}
if (filter_mask & RT5665_DA_STEREO2_FILTER) {
asrc2_mask |= RT5665_DA_STO2_CLK_SEL_MASK;
asrc2_value = (asrc2_value & ~RT5665_DA_STO2_CLK_SEL_MASK)
| (clk_src << RT5665_DA_STO2_CLK_SEL_SFT);
}
if (filter_mask & RT5665_DA_MONO_L_FILTER) {
asrc2_mask |= RT5665_DA_MONOL_CLK_SEL_MASK;
asrc2_value = (asrc2_value & ~RT5665_DA_MONOL_CLK_SEL_MASK)
| (clk_src << RT5665_DA_MONOL_CLK_SEL_SFT);
}
if (filter_mask & RT5665_DA_MONO_R_FILTER) {
asrc2_mask |= RT5665_DA_MONOR_CLK_SEL_MASK;
asrc2_value = (asrc2_value & ~RT5665_DA_MONOR_CLK_SEL_MASK)
| (clk_src << RT5665_DA_MONOR_CLK_SEL_SFT);
}
if (filter_mask & RT5665_AD_STEREO1_FILTER) {
asrc3_mask |= RT5665_AD_STO1_CLK_SEL_MASK;
asrc3_value = (asrc2_value & ~RT5665_AD_STO1_CLK_SEL_MASK)
| (clk_src << RT5665_AD_STO1_CLK_SEL_SFT);
}
if (filter_mask & RT5665_AD_STEREO2_FILTER) {
asrc3_mask |= RT5665_AD_STO2_CLK_SEL_MASK;
asrc3_value = (asrc2_value & ~RT5665_AD_STO2_CLK_SEL_MASK)
| (clk_src << RT5665_AD_STO2_CLK_SEL_SFT);
}
if (filter_mask & RT5665_AD_MONO_L_FILTER) {
asrc3_mask |= RT5665_AD_MONOL_CLK_SEL_MASK;
asrc3_value = (asrc3_value & ~RT5665_AD_MONOL_CLK_SEL_MASK)
| (clk_src << RT5665_AD_MONOL_CLK_SEL_SFT);
}
if (filter_mask & RT5665_AD_MONO_R_FILTER) {
asrc3_mask |= RT5665_AD_MONOR_CLK_SEL_MASK;
asrc3_value = (asrc3_value & ~RT5665_AD_MONOR_CLK_SEL_MASK)
| (clk_src << RT5665_AD_MONOR_CLK_SEL_SFT);
}
if (asrc2_mask)
snd_soc_component_update_bits(component, RT5665_ASRC_2,
asrc2_mask, asrc2_value);
if (asrc3_mask)
snd_soc_component_update_bits(component, RT5665_ASRC_3,
asrc3_mask, asrc3_value);
return 0;
}
EXPORT_SYMBOL_GPL(rt5665_sel_asrc_clk_src);
static int rt5665_button_detect(struct snd_soc_component *component)
{
int btn_type, val;

View file

@ -1999,7 +1999,4 @@ enum {
RT5665_CLK_SEL_SYS4,
};
int rt5665_sel_asrc_clk_src(struct snd_soc_component *component,
unsigned int filter_mask, unsigned int clk_src);
#endif /* __RT5665_H__ */

View file

@ -799,49 +799,6 @@ static void rt5668_reset(struct regmap *regmap)
regmap_write(regmap, RT5668_RESET, 0);
regmap_write(regmap, RT5668_I2C_MODE, 1);
}
/**
* rt5668_sel_asrc_clk_src - select ASRC clock source for a set of filters
* @component: SoC audio component device.
* @filter_mask: mask of filters.
* @clk_src: clock source
*
* The ASRC function is for asynchronous MCLK and LRCK. Also, since RT5668 can
* only support standard 32fs or 64fs i2s format, ASRC should be enabled to
* support special i2s clock format such as Intel's 100fs(100 * sampling rate).
* ASRC function will track i2s clock and generate a corresponding system clock
* for codec. This function provides an API to select the clock source for a
* set of filters specified by the mask. And the component driver will turn on
* ASRC for these filters if ASRC is selected as their clock source.
*/
int rt5668_sel_asrc_clk_src(struct snd_soc_component *component,
unsigned int filter_mask, unsigned int clk_src)
{
switch (clk_src) {
case RT5668_CLK_SEL_SYS:
case RT5668_CLK_SEL_I2S1_ASRC:
case RT5668_CLK_SEL_I2S2_ASRC:
break;
default:
return -EINVAL;
}
if (filter_mask & RT5668_DA_STEREO1_FILTER) {
snd_soc_component_update_bits(component, RT5668_PLL_TRACK_2,
RT5668_FILTER_CLK_SEL_MASK,
clk_src << RT5668_FILTER_CLK_SEL_SFT);
}
if (filter_mask & RT5668_AD_STEREO1_FILTER) {
snd_soc_component_update_bits(component, RT5668_PLL_TRACK_3,
RT5668_FILTER_CLK_SEL_MASK,
clk_src << RT5668_FILTER_CLK_SEL_SFT);
}
return 0;
}
EXPORT_SYMBOL_GPL(rt5668_sel_asrc_clk_src);
static int rt5668_button_detect(struct snd_soc_component *component)
{

View file

@ -1309,7 +1309,4 @@ enum {
RT5668_CLK_SEL_I2S2_ASRC,
};
int rt5668_sel_asrc_clk_src(struct snd_soc_component *component,
unsigned int filter_mask, unsigned int clk_src);
#endif /* __RT5668_H__ */