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ASoC: codecs: Remove unused rt566[58]_sel_asrc_clk_src
rt5665_sel_asrc_clk_src() was added in 2016 by commit33ada14a26("ASoC: add rt5665 codec driver") rt5668_sel_asrc_clk_src() was added in 2018 by commitd59fb28562("ASoC: rt5668: add rt5668B codec driver") Neither have been used. Remove them. Signed-off-by: "Dr. David Alan Gilbert" <linux@treblig.org> Link: https://patch.msgid.link/20250420232733.182802-1-linux@treblig.org Signed-off-by: Mark Brown <broonie@kernel.org>
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parent
6070ef6e42
commit
f506d45666
4 changed files with 0 additions and 145 deletions
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@ -1022,102 +1022,6 @@ static int rt5665_mono_vol_put(struct snd_kcontrol *kcontrol,
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return ret;
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}
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/**
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* rt5665_sel_asrc_clk_src - select ASRC clock source for a set of filters
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* @component: SoC audio component device.
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* @filter_mask: mask of filters.
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* @clk_src: clock source
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*
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* The ASRC function is for asynchronous MCLK and LRCK. Also, since RT5665 can
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* only support standard 32fs or 64fs i2s format, ASRC should be enabled to
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* support special i2s clock format such as Intel's 100fs(100 * sampling rate).
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* ASRC function will track i2s clock and generate a corresponding system clock
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* for codec. This function provides an API to select the clock source for a
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* set of filters specified by the mask. And the codec driver will turn on ASRC
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* for these filters if ASRC is selected as their clock source.
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*/
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int rt5665_sel_asrc_clk_src(struct snd_soc_component *component,
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unsigned int filter_mask, unsigned int clk_src)
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{
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unsigned int asrc2_mask = 0;
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unsigned int asrc2_value = 0;
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unsigned int asrc3_mask = 0;
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unsigned int asrc3_value = 0;
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switch (clk_src) {
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case RT5665_CLK_SEL_SYS:
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case RT5665_CLK_SEL_I2S1_ASRC:
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case RT5665_CLK_SEL_I2S2_ASRC:
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case RT5665_CLK_SEL_I2S3_ASRC:
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case RT5665_CLK_SEL_SYS2:
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case RT5665_CLK_SEL_SYS3:
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case RT5665_CLK_SEL_SYS4:
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break;
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default:
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return -EINVAL;
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}
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if (filter_mask & RT5665_DA_STEREO1_FILTER) {
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asrc2_mask |= RT5665_DA_STO1_CLK_SEL_MASK;
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asrc2_value = (asrc2_value & ~RT5665_DA_STO1_CLK_SEL_MASK)
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| (clk_src << RT5665_DA_STO1_CLK_SEL_SFT);
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}
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if (filter_mask & RT5665_DA_STEREO2_FILTER) {
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asrc2_mask |= RT5665_DA_STO2_CLK_SEL_MASK;
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asrc2_value = (asrc2_value & ~RT5665_DA_STO2_CLK_SEL_MASK)
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| (clk_src << RT5665_DA_STO2_CLK_SEL_SFT);
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}
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if (filter_mask & RT5665_DA_MONO_L_FILTER) {
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asrc2_mask |= RT5665_DA_MONOL_CLK_SEL_MASK;
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asrc2_value = (asrc2_value & ~RT5665_DA_MONOL_CLK_SEL_MASK)
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| (clk_src << RT5665_DA_MONOL_CLK_SEL_SFT);
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}
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if (filter_mask & RT5665_DA_MONO_R_FILTER) {
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asrc2_mask |= RT5665_DA_MONOR_CLK_SEL_MASK;
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asrc2_value = (asrc2_value & ~RT5665_DA_MONOR_CLK_SEL_MASK)
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| (clk_src << RT5665_DA_MONOR_CLK_SEL_SFT);
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}
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if (filter_mask & RT5665_AD_STEREO1_FILTER) {
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asrc3_mask |= RT5665_AD_STO1_CLK_SEL_MASK;
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asrc3_value = (asrc2_value & ~RT5665_AD_STO1_CLK_SEL_MASK)
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| (clk_src << RT5665_AD_STO1_CLK_SEL_SFT);
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}
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if (filter_mask & RT5665_AD_STEREO2_FILTER) {
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asrc3_mask |= RT5665_AD_STO2_CLK_SEL_MASK;
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asrc3_value = (asrc2_value & ~RT5665_AD_STO2_CLK_SEL_MASK)
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| (clk_src << RT5665_AD_STO2_CLK_SEL_SFT);
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}
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if (filter_mask & RT5665_AD_MONO_L_FILTER) {
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asrc3_mask |= RT5665_AD_MONOL_CLK_SEL_MASK;
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asrc3_value = (asrc3_value & ~RT5665_AD_MONOL_CLK_SEL_MASK)
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| (clk_src << RT5665_AD_MONOL_CLK_SEL_SFT);
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}
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if (filter_mask & RT5665_AD_MONO_R_FILTER) {
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asrc3_mask |= RT5665_AD_MONOR_CLK_SEL_MASK;
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asrc3_value = (asrc3_value & ~RT5665_AD_MONOR_CLK_SEL_MASK)
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| (clk_src << RT5665_AD_MONOR_CLK_SEL_SFT);
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}
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if (asrc2_mask)
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snd_soc_component_update_bits(component, RT5665_ASRC_2,
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asrc2_mask, asrc2_value);
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if (asrc3_mask)
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snd_soc_component_update_bits(component, RT5665_ASRC_3,
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asrc3_mask, asrc3_value);
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return 0;
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}
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EXPORT_SYMBOL_GPL(rt5665_sel_asrc_clk_src);
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static int rt5665_button_detect(struct snd_soc_component *component)
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{
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int btn_type, val;
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@ -1999,7 +1999,4 @@ enum {
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RT5665_CLK_SEL_SYS4,
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};
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int rt5665_sel_asrc_clk_src(struct snd_soc_component *component,
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unsigned int filter_mask, unsigned int clk_src);
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#endif /* __RT5665_H__ */
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@ -799,49 +799,6 @@ static void rt5668_reset(struct regmap *regmap)
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regmap_write(regmap, RT5668_RESET, 0);
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regmap_write(regmap, RT5668_I2C_MODE, 1);
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}
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/**
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* rt5668_sel_asrc_clk_src - select ASRC clock source for a set of filters
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* @component: SoC audio component device.
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* @filter_mask: mask of filters.
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* @clk_src: clock source
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*
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* The ASRC function is for asynchronous MCLK and LRCK. Also, since RT5668 can
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* only support standard 32fs or 64fs i2s format, ASRC should be enabled to
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* support special i2s clock format such as Intel's 100fs(100 * sampling rate).
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* ASRC function will track i2s clock and generate a corresponding system clock
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* for codec. This function provides an API to select the clock source for a
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* set of filters specified by the mask. And the component driver will turn on
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* ASRC for these filters if ASRC is selected as their clock source.
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*/
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int rt5668_sel_asrc_clk_src(struct snd_soc_component *component,
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unsigned int filter_mask, unsigned int clk_src)
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{
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switch (clk_src) {
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case RT5668_CLK_SEL_SYS:
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case RT5668_CLK_SEL_I2S1_ASRC:
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case RT5668_CLK_SEL_I2S2_ASRC:
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break;
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default:
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return -EINVAL;
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}
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if (filter_mask & RT5668_DA_STEREO1_FILTER) {
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snd_soc_component_update_bits(component, RT5668_PLL_TRACK_2,
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RT5668_FILTER_CLK_SEL_MASK,
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clk_src << RT5668_FILTER_CLK_SEL_SFT);
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}
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if (filter_mask & RT5668_AD_STEREO1_FILTER) {
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snd_soc_component_update_bits(component, RT5668_PLL_TRACK_3,
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RT5668_FILTER_CLK_SEL_MASK,
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clk_src << RT5668_FILTER_CLK_SEL_SFT);
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}
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return 0;
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}
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EXPORT_SYMBOL_GPL(rt5668_sel_asrc_clk_src);
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static int rt5668_button_detect(struct snd_soc_component *component)
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{
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@ -1309,7 +1309,4 @@ enum {
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RT5668_CLK_SEL_I2S2_ASRC,
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};
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int rt5668_sel_asrc_clk_src(struct snd_soc_component *component,
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unsigned int filter_mask, unsigned int clk_src);
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#endif /* __RT5668_H__ */
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