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Linux 6.19-rc7

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Merge tag 'v6.19-rc7' into driver-core-next

We need the driver-core fixes in here as well to build on top of.

Signed-off-by: Danilo Krummrich <dakr@kernel.org>
This commit is contained in:
Danilo Krummrich 2026-01-26 13:23:52 +01:00
commit eb3dad518e
695 changed files with 7520 additions and 3755 deletions
Download patch file Download diff file Expand all files Collapse all files

5
.mailmap
View file

@ -12,6 +12,7 @@
#
Aaron Durbin <adurbin@google.com>
Abel Vesa <abelvesa@kernel.org> <abel.vesa@nxp.com>
Abel Vesa <abelvesa@kernel.org> <abel.vesa@linaro.org>
Abel Vesa <abelvesa@kernel.org> <abelvesa@gmail.com>
Abhijeet Dharmapurikar <quic_adharmap@quicinc.com> <adharmap@codeaurora.org>
Abhinav Kumar <quic_abhinavk@quicinc.com> <abhinavk@codeaurora.org>
@ -207,6 +208,7 @@ Daniel Borkmann <daniel@iogearbox.net> <daniel.borkmann@tik.ee.ethz.ch>
Daniel Borkmann <daniel@iogearbox.net> <dborkmann@redhat.com>
Daniel Borkmann <daniel@iogearbox.net> <dborkman@redhat.com>
Daniel Borkmann <daniel@iogearbox.net> <dxchgb@gmail.com>
Daniel Thompson <danielt@kernel.org> <daniel.thompson@linaro.org>
Danilo Krummrich <dakr@kernel.org> <dakr@redhat.com>
David Brownell <david-b@pacbell.net>
David Collins <quic_collinsd@quicinc.com> <collinsd@codeaurora.org>
@ -794,6 +796,7 @@ Sven Eckelmann <sven@narfation.org> <sven.eckelmann@open-mesh.com>
Sven Eckelmann <sven@narfation.org> <sven.eckelmann@openmesh.com>
Sven Eckelmann <sven@narfation.org> <sven@open-mesh.com>
Sven Peter <sven@kernel.org> <sven@svenpeter.dev>
Szymon Wilczek <swilczek.lx@gmail.com> <szymonwilczek@gmx.com>
Takashi YOSHII <takashi.yoshii.zj@renesas.com>
Tamizh Chelvam Raja <quic_tamizhr@quicinc.com> <tamizhr@codeaurora.org>
Taniya Das <quic_tdas@quicinc.com> <tdas@codeaurora.org>
@ -876,6 +879,8 @@ Wolfram Sang <wsa@kernel.org> <wsa@the-dreams.de>
Yakir Yang <kuankuan.y@gmail.com> <ykk@rock-chips.com>
Yanteng Si <si.yanteng@linux.dev> <siyanteng@loongson.cn>
Ying Huang <huang.ying.caritas@gmail.com> <ying.huang@intel.com>
Yixun Lan <dlan@kernel.org> <dlan@gentoo.org>
Yixun Lan <dlan@kernel.org> <yixun.lan@amlogic.com>
Yosry Ahmed <yosry.ahmed@linux.dev> <yosryahmed@google.com>
Yu-Chun Lin <eleanor.lin@realtek.com> <eleanor15x@gmail.com>
Yusuke Goda <goda.yusuke@renesas.com>

4
CREDITS
View file

@ -2231,6 +2231,10 @@ S: Markham, Ontario
S: L3R 8B2
S: Canada
N: Krzysztof Kozlowski
E: krzk@kernel.org
D: NFC network subsystem and drivers maintainer
N: Christian Krafft
D: PowerPC Cell support

35
Documentation/admin-guide/kernel-parameters.txt
View file

@ -2917,6 +2917,41 @@ Kernel parameters
for Movable pages. "nn[KMGTPE]", "nn%", and "mirror"
are exclusive, so you cannot specify multiple forms.
kfence.burst= [MM,KFENCE] The number of additional successive
allocations to be attempted through KFENCE for each
sample interval.
Format: <unsigned integer>
Default: 0
kfence.check_on_panic=
[MM,KFENCE] Whether to check all KFENCE-managed objects'
canaries on panic.
Format: <bool>
Default: false
kfence.deferrable=
[MM,KFENCE] Whether to use a deferrable timer to trigger
allocations. This avoids forcing CPU wake-ups if the
system is idle, at the risk of a less predictable
sample interval.
Format: <bool>
Default: CONFIG_KFENCE_DEFERRABLE
kfence.sample_interval=
[MM,KFENCE] KFENCE's sample interval in milliseconds.
Format: <unsigned integer>
0 - Disable KFENCE.
>0 - Enabled KFENCE with given sample interval.
Default: CONFIG_KFENCE_SAMPLE_INTERVAL
kfence.skip_covered_thresh=
[MM,KFENCE] If pool utilization reaches this threshold
(pool usage%), KFENCE limits currently covered
allocations of the same source from further filling
up the pool.
Format: <unsigned integer>
Default: 75
kgdbdbgp= [KGDB,HW,EARLY] kgdb over EHCI usb debug port.
Format: <Controller#>[,poll interval]
The controller # is the number of the ehci usb debug

2
Documentation/admin-guide/laptops/alienware-wmi.rst
View file

@ -105,7 +105,7 @@ information.
Manual fan control on the other hand, is not exposed directly by the AWCC
interface. Instead it let's us control a fan `boost` value. This `boost` value
has the following aproximate behavior over the fan pwm:
has the following approximate behavior over the fan pwm:
::

8
Documentation/admin-guide/sysctl/net.rst
View file

@ -303,6 +303,14 @@ netdev_max_backlog
Maximum number of packets, queued on the INPUT side, when the interface
receives packets faster than kernel can process them.
qdisc_max_burst
------------------
Maximum number of packets that can be temporarily stored before
reaching qdisc.
Default: 1000
netdev_rss_key
--------------

4
Documentation/admin-guide/sysctl/vm.rst
View file

@ -494,6 +494,10 @@ memory allocations.
The default value depends on CONFIG_MEM_ALLOC_PROFILING_ENABLED_BY_DEFAULT.
When CONFIG_MEM_ALLOC_PROFILING_DEBUG=y, this control is read-only to avoid
warnings produced by allocations made while profiling is disabled and freed
when it's enabled.
memory_failure_early_kill
=========================

4
Documentation/arch/riscv/uabi.rst
View file

@ -7,7 +7,9 @@ ISA string ordering in /proc/cpuinfo
------------------------------------
The canonical order of ISA extension names in the ISA string is defined in
chapter 27 of the unprivileged specification.
Chapter 27 of the RISC-V Instruction Set Manual Volume I Unprivileged ISA
(Document Version 20191213).
The specification uses vague wording, such as should, when it comes to ordering,
so for our purposes the following rules apply:

4
Documentation/arch/x86/amd_hsmp.rst
View file

@ -14,7 +14,7 @@ set of mailbox registers.
More details on the interface can be found in chapter
"7 Host System Management Port (HSMP)" of the family/model PPR
Eg: https://www.amd.com/content/dam/amd/en/documents/epyc-technical-docs/programmer-references/55898_B1_pub_0_50.zip
Eg: https://docs.amd.com/v/u/en-US/55898_B1_pub_0_50
HSMP interface is supported on EPYC line of server CPUs and MI300A (APU).
@ -185,7 +185,7 @@ what happened. The transaction returns 0 on success.
More details on the interface and message definitions can be found in chapter
"7 Host System Management Port (HSMP)" of the respective family/model PPR
eg: https://www.amd.com/content/dam/amd/en/documents/epyc-technical-docs/programmer-references/55898_B1_pub_0_50.zip
eg: https://docs.amd.com/v/u/en-US/55898_B1_pub_0_50
User space C-APIs are made available by linking against the esmi library,
which is provided by the E-SMS project https://www.amd.com/en/developer/e-sms.html.

2
Documentation/devicetree/bindings/display/mediatek/mediatek,dp.yaml
View file

@ -11,7 +11,7 @@ maintainers:
- Jitao shi <jitao.shi@mediatek.com>
description: |
MediaTek DP and eDP are different hardwares and there are some features
MediaTek DP and eDP are different hardware and there are some features
which are not supported for eDP. For example, audio is not supported for
eDP. Therefore, we need to use two different compatibles to describe them.
In addition, We just need to enable the power domain of DP, so the clock

10
Documentation/devicetree/bindings/i2c/brcm,iproc-i2c.yaml
View file

@ -16,7 +16,8 @@ properties:
- brcm,iproc-nic-i2c
reg:
maxItems: 1
minItems: 1
maxItems: 2
clock-frequency:
enum: [ 100000, 400000 ]
@ -41,8 +42,15 @@ allOf:
contains:
const: brcm,iproc-nic-i2c
then:
properties:
reg:
minItems: 2
required:
- brcm,ape-hsls-addr-mask
else:
properties:
reg:
maxItems: 1
unevaluatedProperties: false

31
Documentation/devicetree/bindings/interconnect/qcom,sa8775p-rpmh.yaml
View file

@ -74,6 +74,37 @@ allOf:
- description: aggre UFS CARD AXI clock
- description: RPMH CC IPA clock
- if:
properties:
compatible:
contains:
enum:
- qcom,sa8775p-config-noc
- qcom,sa8775p-dc-noc
- qcom,sa8775p-gem-noc
- qcom,sa8775p-gpdsp-anoc
- qcom,sa8775p-lpass-ag-noc
- qcom,sa8775p-mmss-noc
- qcom,sa8775p-nspa-noc
- qcom,sa8775p-nspb-noc
- qcom,sa8775p-pcie-anoc
- qcom,sa8775p-system-noc
then:
properties:
clocks: false
- if:
properties:
compatible:
contains:
enum:
- qcom,sa8775p-clk-virt
- qcom,sa8775p-mc-virt
then:
properties:
reg: false
clocks: false
unevaluatedProperties: false
examples:

17
Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-pcie-phy.yaml
View file

@ -56,7 +56,7 @@ properties:
clocks:
minItems: 5
maxItems: 7
maxItems: 6
clock-names:
minItems: 5
@ -67,7 +67,6 @@ properties:
- enum: [rchng, refgen]
- const: pipe
- const: pipediv2
- const: phy_aux
power-domains:
maxItems: 1
@ -180,6 +179,7 @@ allOf:
contains:
enum:
- qcom,glymur-qmp-gen5x4-pcie-phy
- qcom,qcs8300-qmp-gen4x2-pcie-phy
- qcom,sa8775p-qmp-gen4x2-pcie-phy
- qcom,sa8775p-qmp-gen4x4-pcie-phy
- qcom,sc8280xp-qmp-gen3x1-pcie-phy
@ -197,19 +197,6 @@ allOf:
clock-names:
minItems: 6
- if:
properties:
compatible:
contains:
enum:
- qcom,qcs8300-qmp-gen4x2-pcie-phy
then:
properties:
clocks:
minItems: 7
clock-names:
minItems: 7
- if:
properties:
compatible:

4
Documentation/devicetree/bindings/sound/everest,es8316.yaml
View file

@ -49,6 +49,10 @@ properties:
items:
- const: mclk
interrupts:
maxItems: 1
description: Headphone detect interrupt
port:
$ref: audio-graph-port.yaml#
unevaluatedProperties: false

11
Documentation/devicetree/bindings/sound/realtek,rt5640.yaml
View file

@ -47,6 +47,12 @@ properties:
reg:
maxItems: 1
clocks:
maxItems: 1
clock-names:
const: mclk
interrupts:
maxItems: 1
description: The CODEC's interrupt output.
@ -98,6 +104,7 @@ properties:
- 4 # Use GPIO2 for jack-detect
- 5 # Use GPIO3 for jack-detect
- 6 # Use GPIO4 for jack-detect
- 7 # Use HDA header for jack-detect
realtek,jack-detect-not-inverted:
description:
@ -121,6 +128,10 @@ properties:
- 2 # Scale current by 1.0
- 3 # Scale current by 1.5
port:
$ref: audio-graph-port.yaml#
unevaluatedProperties: false
required:
- compatible
- reg

3
Documentation/devicetree/bindings/sound/rockchip-spdif.yaml
View file

@ -70,6 +70,9 @@ properties:
"#sound-dai-cells":
const: 0
port:
$ref: /schemas/graph.yaml#/properties/port
required:
- compatible
- reg

4
Documentation/devicetree/bindings/ufs/ufs-common.yaml
View file

@ -48,8 +48,8 @@ properties:
enum: [1, 2]
default: 2
description:
Number of lanes available per direction. Note that it is assume same
number of lanes is used both directions at once.
Number of lanes available per direction. Note that it is assumed that
the same number of lanes are used in both directions at once.
vdd-hba-supply:
description:

4
Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
View file

@ -406,7 +406,6 @@ allOf:
compatible:
contains:
enum:
- qcom,ipq5018-dwc3
- qcom,ipq6018-dwc3
- qcom,ipq8074-dwc3
- qcom,msm8953-dwc3
@ -428,6 +427,7 @@ allOf:
compatible:
contains:
enum:
- qcom,msm8994-dwc3
- qcom,msm8996-dwc3
- qcom,qcs404-dwc3
- qcom,sdm660-dwc3
@ -451,6 +451,7 @@ allOf:
compatible:
contains:
enum:
- qcom,ipq5018-dwc3
- qcom,ipq5332-dwc3
then:
properties:
@ -488,7 +489,6 @@ allOf:
enum:
- qcom,ipq4019-dwc3
- qcom,ipq8064-dwc3
- qcom,msm8994-dwc3
- qcom,qcs615-dwc3
- qcom,qcs8300-dwc3
- qcom,qdu1000-dwc3

4
Documentation/devicetree/bindings/usb/qcom,snps-dwc3.yaml
View file

@ -420,7 +420,6 @@ allOf:
compatible:
contains:
enum:
- qcom,ipq5018-dwc3
- qcom,ipq6018-dwc3
- qcom,ipq8074-dwc3
- qcom,msm8953-dwc3
@ -443,6 +442,7 @@ allOf:
compatible:
contains:
enum:
- qcom,msm8994-dwc3
- qcom,msm8996-dwc3
- qcom,qcs404-dwc3
- qcom,sdm660-dwc3
@ -467,6 +467,7 @@ allOf:
compatible:
contains:
enum:
- qcom,ipq5018-dwc3
- qcom,ipq5332-dwc3
then:
properties:
@ -509,7 +510,6 @@ allOf:
- qcom,ipq4019-dwc3
- qcom,ipq8064-dwc3
- qcom,kaanapali-dwc3
- qcom,msm8994-dwc3
- qcom,qcs615-dwc3
- qcom,qcs8300-dwc3
- qcom,qdu1000-dwc3

2
Documentation/misc-devices/amd-sbi.rst
View file

@ -15,7 +15,7 @@ and SB Temperature Sensor Interface (SB-TSI)).
More details on the interface can be found in chapter
"5 Advanced Platform Management Link (APML)" of the family/model PPR [1]_.
.. [1] https://www.amd.com/content/dam/amd/en/documents/epyc-technical-docs/programmer-references/55898_B1_pub_0_50.zip
.. [1] https://docs.amd.com/v/u/en-US/55898_B1_pub_0_50
SBRMI device

10
Documentation/mm/allocation-profiling.rst
View file

@ -33,6 +33,16 @@ Boot parameter:
sysctl:
/proc/sys/vm/mem_profiling
1: Enable memory profiling.
0: Disable memory profiling.
The default value depends on CONFIG_MEM_ALLOC_PROFILING_ENABLED_BY_DEFAULT.
When CONFIG_MEM_ALLOC_PROFILING_DEBUG=y, this control is read-only to avoid
warnings produced by allocations made while profiling is disabled and freed
when it's enabled.
Runtime info:
/proc/allocinfo

175
Documentation/netlink/specs/dev-energymodel.yaml Normal file
View file

@ -0,0 +1,175 @@
# SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)
#
# Copyright (c) 2025 Valve Corporation.
#
---
name: dev-energymodel
doc: |
Energy model netlink interface to notify its changes.
protocol: genetlink
uapi-header: linux/dev_energymodel.h
definitions:
-
type: flags
name: perf-state-flags
entries:
-
name: perf-state-inefficient
doc: >-
The performance state is inefficient. There is in this perf-domain,
another performance state with a higher frequency but a lower or
equal power cost.
-
type: flags
name: perf-domain-flags
entries:
-
name: perf-domain-microwatts
doc: >-
The power values are in micro-Watts or some other scale.
-
name: perf-domain-skip-inefficiencies
doc: >-
Skip inefficient states when estimating energy consumption.
-
name: perf-domain-artificial
doc: >-
The power values are artificial and might be created by platform
missing real power information.
attribute-sets:
-
name: perf-domain
doc: >-
Information on a single performance domains.
attributes:
-
name: pad
type: pad
-
name: perf-domain-id
type: u32
doc: >-
A unique ID number for each performance domain.
-
name: flags
type: u64
doc: >-
Bitmask of performance domain flags.
enum: perf-domain-flags
-
name: cpus
type: u64
multi-attr: true
doc: >-
CPUs that belong to this performance domain.
-
name: perf-table
doc: >-
Performance states table.
attributes:
-
name: perf-domain-id
type: u32
doc: >-
A unique ID number for each performance domain.
-
name: perf-state
type: nest
nested-attributes: perf-state
multi-attr: true
-
name: perf-state
doc: >-
Performance state of a performance domain.
attributes:
-
name: pad
type: pad
-
name: performance
type: u64
doc: >-
CPU performance (capacity) at a given frequency.
-
name: frequency
type: u64
doc: >-
The frequency in KHz, for consistency with CPUFreq.
-
name: power
type: u64
doc: >-
The power consumed at this level (by 1 CPU or by a registered
device). It can be a total power: static and dynamic.
-
name: cost
type: u64
doc: >-
The cost coefficient associated with this level, used during energy
calculation. Equal to: power * max_frequency / frequency.
-
name: flags
type: u64
doc: >-
Bitmask of performance state flags.
enum: perf-state-flags
operations:
list:
-
name: get-perf-domains
attribute-set: perf-domain
doc: Get the list of information for all performance domains.
do:
request:
attributes:
- perf-domain-id
reply:
attributes: &perf-domain-attrs
- pad
- perf-domain-id
- flags
- cpus
dump:
reply:
attributes: *perf-domain-attrs
-
name: get-perf-table
attribute-set: perf-table
doc: Get the energy model table of a performance domain.
do:
request:
attributes:
- perf-domain-id
reply:
attributes:
- perf-domain-id
- perf-state
-
name: perf-domain-created
doc: A performance domain is created.
notify: get-perf-table
mcgrp: event
-
name: perf-domain-updated
doc: A performance domain is updated.
notify: get-perf-table
mcgrp: event
-
name: perf-domain-deleted
doc: A performance domain is deleted.
attribute-set: perf-table
event:
attributes:
- perf-domain-id
mcgrp: event
mcast-groups:
list:
-
name: event

113
Documentation/netlink/specs/em.yaml
View file

@ -1,113 +0,0 @@
# SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)
name: em
doc: |
Energy model netlink interface to notify its changes.
protocol: genetlink
uapi-header: linux/energy_model.h
attribute-sets:
-
name: pds
attributes:
-
name: pd
type: nest
nested-attributes: pd
multi-attr: true
-
name: pd
attributes:
-
name: pad
type: pad
-
name: pd-id
type: u32
-
name: flags
type: u64
-
name: cpus
type: string
-
name: pd-table
attributes:
-
name: pd-id
type: u32
-
name: ps
type: nest
nested-attributes: ps
multi-attr: true
-
name: ps
attributes:
-
name: pad
type: pad
-
name: performance
type: u64
-
name: frequency
type: u64
-
name: power
type: u64
-
name: cost
type: u64
-
name: flags
type: u64
operations:
list:
-
name: get-pds
attribute-set: pds
doc: Get the list of information for all performance domains.
do:
reply:
attributes:
- pd
-
name: get-pd-table
attribute-set: pd-table
doc: Get the energy model table of a performance domain.
do:
request:
attributes:
- pd-id
reply:
attributes:
- pd-id
- ps
-
name: pd-created
doc: A performance domain is created.
notify: get-pd-table
mcgrp: event
-
name: pd-updated
doc: A performance domain is updated.
notify: get-pd-table
mcgrp: event
-
name: pd-deleted
doc: A performance domain is deleted.
attribute-set: pd-table
event:
attributes:
- pd-id
mcgrp: event
mcast-groups:
list:
-
name: event

2
Documentation/netlink/specs/fou.yaml
View file

@ -39,6 +39,8 @@ attribute-sets:
-
name: ipproto
type: u8
checks:
min: 1
-
name: type
type: u8

41
Documentation/process/conclave.rst Normal file
View file

@ -0,0 +1,41 @@
.. SPDX-License-Identifier: GPL-2.0
Linux kernel project continuity
===============================
The Linux kernel development project is widely distributed, with over
100 maintainers each working to keep changes moving through their own
repositories. The final step, though, is a centralized one where changes
are pulled into the mainline repository. That is normally done by Linus
Torvalds but, as was demonstrated by the 4.19 release in 2018, there are
others who can do that work when the need arises.
Should the maintainers of that repository become unwilling or unable to
do that work going forward (including facilitating a transition), the
project will need to find one or more replacements without delay. The
process by which that will be done is listed below. $ORGANIZER is the
last Maintainer Summit organizer or the current Linux Foundation (LF)
Technical Advisory Board (TAB) Chair as a backup.
- Within 72 hours, $ORGANIZER will open a discussion with the invitees
of the most recently concluded Maintainers Summit. A meeting of those
invitees and the TAB, either online or in-person, will be set as soon
as possible in a way that maximizes the number of people who can
participate.
- If there has been no Maintainers Summit in the last 15 months, the set of
invitees for this meeting will be determined by the TAB.
- The invitees to this meeting may bring in other maintainers as needed.
- This meeting, chaired by $ORGANIZER, will consider options for the
ongoing management of the top-level kernel repository consistent with
the expectation that it maximizes the long term health of the project
and its community.
- Within two weeks, a representative of this group will communicate to the
broader community, using the ksummit@lists.linux.dev mailing list, what
the next steps will be.
The Linux Foundation, as guided by the TAB, will take the steps
necessary to support and implement this plan.

1
Documentation/process/index.rst
View file

@ -68,6 +68,7 @@ beyond).
stable-kernel-rules
management-style
researcher-guidelines
conclave
Dealing with bugs
-----------------

12
Documentation/process/maintainer-netdev.rst
View file

@ -363,6 +363,18 @@ just do it. As a result, a sequence of smaller series gets merged quicker and
with better review coverage. Re-posting large series also increases the mailing
list traffic.
Limit patches outstanding on mailing list
-----------------------------------------
Avoid having more than 15 patches, across all series, outstanding for
review on the mailing list for a single tree. In other words, a maximum of
15 patches under review on net, and a maximum of 15 patches under review on
net-next.
This limit is intended to focus developer effort on testing patches before
upstream review. Aiding the quality of upstream submissions, and easing the
load on reviewers.
.. _rcs:
Local variable ordering ("reverse xmas tree", "RCS")

2
Documentation/userspace-api/media/v4l/metafmt-arm-mali-c55.rst
View file

@ -44,7 +44,7 @@ member and userspace must populate the type member with a value from
struct v4l2_isp_params_buffer *params =
(struct v4l2_isp_params_buffer *)buffer;
params->version = MALI_C55_PARAM_BUFFER_V1;
params->version = V4L2_ISP_PARAMS_VERSION_V1;
params->data_size = 0;
void *data = (void *)params->data;

28
MAINTAINERS
View file

@ -314,6 +314,7 @@ R: Mauro Carvalho Chehab <mchehab@kernel.org>
R: Shuai Xue <xueshuai@linux.alibaba.com>
L: linux-acpi@vger.kernel.org
F: drivers/acpi/apei/
F: drivers/firmware/efi/cper*
ACPI COMPONENT ARCHITECTURE (ACPICA)
M: "Rafael J. Wysocki" <rafael@kernel.org>
@ -3131,6 +3132,7 @@ F: drivers/*/*ma35*
K: ma35d1
ARM/NUVOTON NPCM ARCHITECTURE
M: Andrew Jeffery <andrew@codeconstruct.com.au>
M: Avi Fishman <avifishman70@gmail.com>
M: Tomer Maimon <tmaimon77@gmail.com>
M: Tali Perry <tali.perry1@gmail.com>
@ -3139,6 +3141,7 @@ R: Nancy Yuen <yuenn@google.com>
R: Benjamin Fair <benjaminfair@google.com>
L: openbmc@lists.ozlabs.org (moderated for non-subscribers)
S: Supported
T: git git://git.kernel.org/pub/scm/linux/kernel/git/bmc/linux.git
F: Documentation/devicetree/bindings/*/*/*npcm*
F: Documentation/devicetree/bindings/*/*npcm*
F: Documentation/devicetree/bindings/rtc/nuvoton,nct3018y.yaml
@ -6423,6 +6426,7 @@ F: include/linux/blk-cgroup.h
CONTROL GROUP - CPUSET
M: Waiman Long <longman@redhat.com>
R: Chen Ridong <chenridong@huaweicloud.com>
L: cgroups@vger.kernel.org
S: Maintained
T: git git://git.kernel.org/pub/scm/linux/kernel/git/tj/cgroup.git
@ -9310,12 +9314,12 @@ M: Lukasz Luba <lukasz.luba@arm.com>
M: "Rafael J. Wysocki" <rafael@kernel.org>
L: linux-pm@vger.kernel.org
S: Maintained
F: kernel/power/energy_model.c
F: include/linux/energy_model.h
F: Documentation/netlink/specs/dev-energymodel.yaml
F: Documentation/power/energy-model.rst
F: Documentation/netlink/specs/em.yaml
F: include/uapi/linux/energy_model.h
F: include/linux/energy_model.h
F: include/uapi/linux/dev_energymodel.h
F: kernel/power/em_netlink*.*
F: kernel/power/energy_model.c
EPAPR HYPERVISOR BYTE CHANNEL DEVICE DRIVER
M: Laurentiu Tudor <laurentiu.tudor@nxp.com>
@ -9523,6 +9527,7 @@ F: arch/arm/boot/compressed/efi-header.S
F: arch/x86/platform/efi/
F: drivers/firmware/efi/
F: include/linux/efi*.h
X: drivers/firmware/efi/cper*
EXTERNAL CONNECTOR SUBSYSTEM (EXTCON)
M: MyungJoo Ham <myungjoo.ham@samsung.com>
@ -13175,6 +13180,7 @@ F: Documentation/devicetree/bindings/interconnect/
F: Documentation/driver-api/interconnect.rst
F: drivers/interconnect/
F: include/dt-bindings/interconnect/
F: include/linux/interconnect-clk.h
F: include/linux/interconnect-provider.h
F: include/linux/interconnect.h
@ -14889,6 +14895,7 @@ LSILOGIC MPT FUSION DRIVERS (FC/SAS/SPI)
M: Sathya Prakash <sathya.prakash@broadcom.com>
M: Sreekanth Reddy <sreekanth.reddy@broadcom.com>
M: Suganath Prabu Subramani <suganath-prabu.subramani@broadcom.com>
M: Ranjan Kumar <ranjan.kumar@broadcom.com>
L: MPT-FusionLinux.pdl@broadcom.com
L: linux-scsi@vger.kernel.org
S: Supported
@ -18432,9 +18439,11 @@ M: Jakub Kicinski <kuba@kernel.org>
M: Sabrina Dubroca <sd@queasysnail.net>
L: netdev@vger.kernel.org
S: Maintained
F: Documentation/networking/tls*
F: include/net/tls.h
F: include/uapi/linux/tls.h
F: net/tls/*
F: net/tls/
F: tools/testing/selftests/net/tls.c
NETWORKING [SOCKETS]
M: Eric Dumazet <edumazet@google.com>
@ -18487,9 +18496,8 @@ F: include/uapi/linux/nexthop.h
F: net/ipv4/nexthop.c
NFC SUBSYSTEM
M: Krzysztof Kozlowski <krzk@kernel.org>
L: netdev@vger.kernel.org
S: Maintained
S: Orphan
F: Documentation/devicetree/bindings/net/nfc/
F: drivers/nfc/
F: include/net/nfc/
@ -21106,6 +21114,10 @@ S: Maintained
F: rust/helpers/pwm.c
F: rust/kernel/pwm.rs
PWM SUBSYSTEM DRIVERS [RUST]
R: Michal Wilczynski <m.wilczynski@samsung.com>
F: drivers/pwm/*.rs
PXA GPIO DRIVER
M: Robert Jarzmik <robert.jarzmik@free.fr>
L: linux-gpio@vger.kernel.org
@ -22544,7 +22556,7 @@ F: drivers/mailbox/riscv-sbi-mpxy-mbox.c
F: include/linux/mailbox/riscv-rpmi-message.h
RISC-V SPACEMIT SoC Support
M: Yixun Lan <dlan@gentoo.org>
M: Yixun Lan <dlan@kernel.org>
L: linux-riscv@lists.infradead.org
L: spacemit@lists.linux.dev
S: Maintained

2
Makefile
View file

@ -2,7 +2,7 @@
VERSION = 6
PATCHLEVEL = 19
SUBLEVEL = 0
EXTRAVERSION = -rc5
EXTRAVERSION = -rc7
NAME = Baby Opossum Posse
# *DOCUMENTATION*

1
arch/arm/boot/dts/microchip/lan966x-pcb8290.dts
View file

@ -54,6 +54,7 @@
&mdio0 {
pinctrl-0 = <&miim_a_pins>;
pinctrl-names = "default";
reset-gpios = <&gpio 53 GPIO_ACTIVE_LOW>;
status = "okay";
ext_phy0: ethernet-phy@7 {

4
arch/arm/boot/dts/microchip/sama7d65.dtsi
View file

@ -527,7 +527,7 @@
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 37>;
#address-cells = <1>;
#size-cells = <1>;
#size-cells = <0>;
dmas = <&dma0 AT91_XDMAC_DT_PERID(12)>,
<&dma0 AT91_XDMAC_DT_PERID(11)>;
dma-names = "tx", "rx";
@ -676,7 +676,7 @@
flx9: flexcom@e2820000 {
compatible = "microchip,sama7d65-flexcom", "atmel,sama5d2-flexcom";
reg = <0xe2820000 0x200>;
ranges = <0x0 0xe281c000 0x800>;
ranges = <0x0 0xe2820000 0x800>;
clocks = <&pmc PMC_TYPE_PERIPHERAL 43>;
#address-cells = <1>;
#size-cells = <1>;

1
arch/arm/mach-npcm/Kconfig
View file

@ -30,7 +30,6 @@ config ARCH_NPCM7XX
select ARM_ERRATA_764369 if SMP
select ARM_ERRATA_720789
select ARM_ERRATA_754322
select ARM_ERRATA_794072
select PL310_ERRATA_588369
select PL310_ERRATA_727915
select MFD_SYSCON

24
arch/arm64/boot/dts/nvidia/tegra210.dtsi
View file

@ -202,19 +202,6 @@
nvidia,outputs = <&dsia &dsib &sor0 &sor1>;
nvidia,head = <0>;
interconnects = <&mc TEGRA210_MC_DISPLAY0A &emc>,
<&mc TEGRA210_MC_DISPLAY0B &emc>,
<&mc TEGRA210_MC_DISPLAY0C &emc>,
<&mc TEGRA210_MC_DISPLAYHC &emc>,
<&mc TEGRA210_MC_DISPLAYD &emc>,
<&mc TEGRA210_MC_DISPLAYT &emc>;
interconnect-names = "wina",
"winb",
"winc",
"cursor",
"wind",
"wint";
};
dc@54240000 {
@ -230,15 +217,6 @@
nvidia,outputs = <&dsia &dsib &sor0 &sor1>;
nvidia,head = <1>;
interconnects = <&mc TEGRA210_MC_DISPLAY0AB &emc>,
<&mc TEGRA210_MC_DISPLAY0BB &emc>,
<&mc TEGRA210_MC_DISPLAY0CB &emc>,
<&mc TEGRA210_MC_DISPLAYHCB &emc>;
interconnect-names = "wina",
"winb",
"winc",
"cursor";
};
dsia: dsi@54300000 {
@ -1052,7 +1030,6 @@
#iommu-cells = <1>;
#reset-cells = <1>;
#interconnect-cells = <1>;
};
emc: external-memory-controller@7001b000 {
@ -1066,7 +1043,6 @@
nvidia,memory-controller = <&mc>;
operating-points-v2 = <&emc_icc_dvfs_opp_table>;
#interconnect-cells = <0>;
#cooling-cells = <2>;
};

16
arch/arm64/boot/dts/qcom/sc8280xp.dtsi
View file

@ -5788,8 +5788,12 @@
clocks = <&rpmhcc RPMH_CXO_CLK>;
clock-names = "xo";
power-domains = <&rpmhpd SC8280XP_NSP>;
power-domain-names = "nsp";
power-domains = <&rpmhpd SC8280XP_NSP>,
<&rpmhpd SC8280XP_CX>,
<&rpmhpd SC8280XP_MXC>;
power-domain-names = "nsp",
"cx",
"mxc";
memory-region = <&pil_nsp0_mem>;
@ -5919,8 +5923,12 @@
clocks = <&rpmhcc RPMH_CXO_CLK>;
clock-names = "xo";
power-domains = <&rpmhpd SC8280XP_NSP>;
power-domain-names = "nsp";
power-domains = <&rpmhpd SC8280XP_NSP>,
<&rpmhpd SC8280XP_CX>,
<&rpmhpd SC8280XP_MXC>;
power-domain-names = "nsp",
"cx",
"mxc";
memory-region = <&pil_nsp1_mem>;

4
arch/arm64/boot/dts/qcom/sdm845-oneplus-enchilada.dts
View file

@ -31,9 +31,9 @@
};
&display_panel {
status = "okay";
compatible = "samsung,sofef00-ams628nw01", "samsung,sofef00";
compatible = "samsung,sofef00";
status = "okay";
};
&bq27441_fg {

2
arch/arm64/boot/dts/qcom/sm8550.dtsi
View file

@ -4133,8 +4133,6 @@
usb_1: usb@a600000 {
compatible = "qcom,sm8550-dwc3", "qcom,snps-dwc3";
reg = <0x0 0x0a600000 0x0 0xfc100>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>,
<&gcc GCC_USB30_PRIM_MASTER_CLK>,

3
arch/arm64/boot/dts/qcom/sm8650.dtsi
View file

@ -5150,9 +5150,6 @@
dma-coherent;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
ports {

4
arch/arm64/boot/dts/qcom/talos.dtsi
View file

@ -1399,10 +1399,10 @@
<&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
<&gcc GCC_UFS_PHY_AHB_CLK>,
<&gcc GCC_UFS_PHY_UNIPRO_CORE_CLK>,
<&gcc GCC_UFS_PHY_ICE_CORE_CLK>,
<&rpmhcc RPMH_CXO_CLK>,
<&gcc GCC_UFS_PHY_TX_SYMBOL_0_CLK>,
<&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>;
<&gcc GCC_UFS_PHY_RX_SYMBOL_0_CLK>,
<&gcc GCC_UFS_PHY_ICE_CORE_CLK>;
clock-names = "core_clk",
"bus_aggr_clk",
"iface_clk",

2
arch/arm64/boot/dts/rockchip/rk3308-sakurapi-rk3308b.dts
View file

@ -199,7 +199,7 @@
compatible = "brcm,bcm43455-fmac", "brcm,bcm4329-fmac";
reg = <1>;
interrupt-parent = <&gpio0>;
interrupts = <RK_PA3 GPIO_ACTIVE_HIGH>;
interrupts = <RK_PA3 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "host-wake";
pinctrl-names = "default";
pinctrl-0 = <&wifi_host_wake>;

3
arch/arm64/boot/dts/rockchip/rk3326-odroid-go3.dts
View file

@ -14,7 +14,8 @@
joystick_mux_controller: mux-controller {
compatible = "gpio-mux";
pinctrl = <&mux_en_pins>;
pinctrl-0 = <&mux_en_pins>;
pinctrl-names = "default";
#mux-control-cells = <0>;
mux-gpios = <&gpio3 RK_PB3 GPIO_ACTIVE_LOW>,

2
arch/arm64/boot/dts/rockchip/rk3399-kobol-helios64.dts
View file

@ -424,9 +424,7 @@
&pcie0 {
ep-gpios = <&gpio2 RK_PD4 GPIO_ACTIVE_HIGH>;
max-link-speed = <2>;
num-lanes = <2>;
pinctrl-names = "default";
status = "okay";
vpcie12v-supply = <&vcc12v_dcin>;

1
arch/arm64/boot/dts/rockchip/rk3399-nanopi-r4s.dtsi
View file

@ -71,7 +71,6 @@
};
&pcie0 {
max-link-speed = <1>;
num-lanes = <1>;
vpcie3v3-supply = <&vcc3v3_sys>;
};

1
arch/arm64/boot/dts/rockchip/rk3399-pinebook-pro.dts
View file

@ -969,7 +969,6 @@
};
&spi1 {
max-freq = <10000000>;
status = "okay";
spiflash: flash@0 {

4
arch/arm64/boot/dts/rockchip/rk3399-pinephone-pro.dts
View file

@ -40,13 +40,13 @@
button-up {
label = "Volume Up";
linux,code = <KEY_VOLUMEUP>;
press-threshold-microvolt = <100000>;
press-threshold-microvolt = <2000>;
};
button-down {
label = "Volume Down";
linux,code = <KEY_VOLUMEDOWN>;
press-threshold-microvolt = <600000>;
press-threshold-microvolt = <300000>;
};
};

2
arch/arm64/boot/dts/rockchip/rk3399-puma.dtsi
View file

@ -483,7 +483,7 @@
pinctrl-names = "default";
pinctrl-0 = <&q7_thermal_pin &bios_disable_override_hog_pin>;
gpios {
gpio-pins {
bios_disable_override_hog_pin: bios-disable-override-hog-pin {
rockchip,pins =
<3 RK_PD5 RK_FUNC_GPIO &pcfg_pull_down>;

4
arch/arm64/boot/dts/rockchip/rk3399-rock-4c-plus.dts
View file

@ -529,11 +529,11 @@
rockchip,pins = <1 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>;
};
vsel1_gpio: vsel1-gpio {
vsel1_gpio: vsel1-gpio-pin {
rockchip,pins = <1 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>;
};
vsel2_gpio: vsel2-gpio {
vsel2_gpio: vsel2-gpio-pin {
rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>;
};
};

3
arch/arm64/boot/dts/rockchip/rk3568-wolfvision-pf5-display-vz.dtso
View file

@ -11,7 +11,6 @@
#include "rk3568-wolfvision-pf5-display.dtsi"
&st7789 {
compatible = "jasonic,jt240mhqs-hwt-ek-e3",
"sitronix,st7789v";
compatible = "jasonic,jt240mhqs-hwt-ek-e3";
rotation = <270>;
};

12
arch/arm64/boot/dts/rockchip/rk3576-nanopi-m5.dts
View file

@ -201,6 +201,7 @@
pinctrl-names = "default";
pinctrl-0 = <&hp_det_l>;
simple-audio-card,bitclock-master = <&masterdai>;
simple-audio-card,format = "i2s";
simple-audio-card,hp-det-gpios = <&gpio2 RK_PD6 GPIO_ACTIVE_LOW>;
simple-audio-card,mclk-fs = <256>;
@ -211,15 +212,16 @@
"Headphones", "HPOR",
"IN1P", "Microphone Jack";
simple-audio-card,widgets =
"Headphone", "Headphone Jack",
"Headphone", "Headphones",
"Microphone", "Microphone Jack";
simple-audio-card,codec {
sound-dai = <&rt5616>;
};
simple-audio-card,cpu {
masterdai: simple-audio-card,cpu {
sound-dai = <&sai2>;
system-clock-frequency = <12288000>;
};
};
};
@ -727,10 +729,12 @@
rt5616: audio-codec@1b {
compatible = "realtek,rt5616";
reg = <0x1b>;
assigned-clocks = <&cru CLK_SAI2_MCLKOUT>;
assigned-clocks = <&cru CLK_SAI2_MCLKOUT_TO_IO>;
assigned-clock-rates = <12288000>;
clocks = <&cru CLK_SAI2_MCLKOUT>;
clocks = <&cru CLK_SAI2_MCLKOUT_TO_IO>;
clock-names = "mclk";
pinctrl-0 = <&sai2m0_mclk>;
pinctrl-names = "default";
#sound-dai-cells = <0>;
};
};

2
arch/arm64/boot/dts/rockchip/rk3576.dtsi
View file

@ -1261,7 +1261,7 @@
gpu: gpu@27800000 {
compatible = "rockchip,rk3576-mali", "arm,mali-bifrost";
reg = <0x0 0x27800000 0x0 0x200000>;
reg = <0x0 0x27800000 0x0 0x20000>;
assigned-clocks = <&scmi_clk SCMI_CLK_GPU>;
assigned-clock-rates = <198000000>;
clocks = <&cru CLK_GPU>;

4
arch/arm64/boot/dts/rockchip/rk3588-base.dtsi
View file

@ -1200,7 +1200,7 @@
status = "disabled";
};
rknn_mmu_1: iommu@fdac9000 {
rknn_mmu_1: iommu@fdaca000 {
compatible = "rockchip,rk3588-iommu", "rockchip,rk3568-iommu";
reg = <0x0 0xfdaca000 0x0 0x100>;
interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH 0>;
@ -1230,7 +1230,7 @@
status = "disabled";
};
rknn_mmu_2: iommu@fdad9000 {
rknn_mmu_2: iommu@fdada000 {
compatible = "rockchip,rk3588-iommu", "rockchip,rk3568-iommu";
reg = <0x0 0xfdada000 0x0 0x100>;
interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH 0>;

2
arch/arm64/include/asm/kvm_asm.h
View file

@ -300,6 +300,8 @@ void kvm_get_kimage_voffset(struct alt_instr *alt,
__le32 *origptr, __le32 *updptr, int nr_inst);
void kvm_compute_final_ctr_el0(struct alt_instr *alt,
__le32 *origptr, __le32 *updptr, int nr_inst);
void kvm_pan_patch_el2_entry(struct alt_instr *alt,
__le32 *origptr, __le32 *updptr, int nr_inst);
void __noreturn __cold nvhe_hyp_panic_handler(u64 esr, u64 spsr, u64 elr_virt,
u64 elr_phys, u64 par, uintptr_t vcpu, u64 far, u64 hpfar);

16
arch/arm64/include/asm/kvm_emulate.h
View file

@ -119,22 +119,6 @@ static inline unsigned long *vcpu_hcr(struct kvm_vcpu *vcpu)
return (unsigned long *)&vcpu->arch.hcr_el2;
}
static inline void vcpu_clear_wfx_traps(struct kvm_vcpu *vcpu)
{
vcpu->arch.hcr_el2 &= ~HCR_TWE;
if (atomic_read(&vcpu->arch.vgic_cpu.vgic_v3.its_vpe.vlpi_count) ||
vcpu->kvm->arch.vgic.nassgireq)
vcpu->arch.hcr_el2 &= ~HCR_TWI;
else
vcpu->arch.hcr_el2 |= HCR_TWI;
}
static inline void vcpu_set_wfx_traps(struct kvm_vcpu *vcpu)
{
vcpu->arch.hcr_el2 |= HCR_TWE;
vcpu->arch.hcr_el2 |= HCR_TWI;
}
static inline unsigned long vcpu_get_vsesr(struct kvm_vcpu *vcpu)
{
return vcpu->arch.vsesr_el2;

16
arch/arm64/include/asm/kvm_pgtable.h
View file

@ -87,7 +87,15 @@ typedef u64 kvm_pte_t;
#define KVM_PTE_LEAF_ATTR_HI_SW GENMASK(58, 55)
#define KVM_PTE_LEAF_ATTR_HI_S1_XN BIT(54)
#define __KVM_PTE_LEAF_ATTR_HI_S1_XN BIT(54)
#define __KVM_PTE_LEAF_ATTR_HI_S1_UXN BIT(54)
#define __KVM_PTE_LEAF_ATTR_HI_S1_PXN BIT(53)
#define KVM_PTE_LEAF_ATTR_HI_S1_XN \
({ cpus_have_final_cap(ARM64_KVM_HVHE) ? \
(__KVM_PTE_LEAF_ATTR_HI_S1_UXN | \
__KVM_PTE_LEAF_ATTR_HI_S1_PXN) : \
__KVM_PTE_LEAF_ATTR_HI_S1_XN; })
#define KVM_PTE_LEAF_ATTR_HI_S2_XN GENMASK(54, 53)
@ -293,8 +301,8 @@ typedef bool (*kvm_pgtable_force_pte_cb_t)(u64 addr, u64 end,
* children.
* @KVM_PGTABLE_WALK_SHARED: Indicates the page-tables may be shared
* with other software walkers.
* @KVM_PGTABLE_WALK_HANDLE_FAULT: Indicates the page-table walk was
* invoked from a fault handler.
* @KVM_PGTABLE_WALK_IGNORE_EAGAIN: Don't terminate the walk early if
* the walker returns -EAGAIN.
* @KVM_PGTABLE_WALK_SKIP_BBM_TLBI: Visit and update table entries
* without Break-before-make's
* TLB invalidation.
@ -307,7 +315,7 @@ enum kvm_pgtable_walk_flags {
KVM_PGTABLE_WALK_TABLE_PRE = BIT(1),
KVM_PGTABLE_WALK_TABLE_POST = BIT(2),
KVM_PGTABLE_WALK_SHARED = BIT(3),
KVM_PGTABLE_WALK_HANDLE_FAULT = BIT(4),
KVM_PGTABLE_WALK_IGNORE_EAGAIN = BIT(4),
KVM_PGTABLE_WALK_SKIP_BBM_TLBI = BIT(5),
KVM_PGTABLE_WALK_SKIP_CMO = BIT(6),
};

3
arch/arm64/include/asm/sysreg.h
View file

@ -91,7 +91,8 @@
*/
#define pstate_field(op1, op2) ((op1) << Op1_shift | (op2) << Op2_shift)
#define PSTATE_Imm_shift CRm_shift
#define SET_PSTATE(x, r) __emit_inst(0xd500401f | PSTATE_ ## r | ((!!x) << PSTATE_Imm_shift))
#define ENCODE_PSTATE(x, r) (0xd500401f | PSTATE_ ## r | ((!!x) << PSTATE_Imm_shift))
#define SET_PSTATE(x, r) __emit_inst(ENCODE_PSTATE(x, r))
#define PSTATE_PAN pstate_field(0, 4)
#define PSTATE_UAO pstate_field(0, 3)

2
arch/arm64/kernel/hibernate.c
View file

@ -402,7 +402,7 @@ int swsusp_arch_suspend(void)
* Memory allocated by get_safe_page() will be dealt with by the hibernate code,
* we don't need to free it here.
*/
int swsusp_arch_resume(void)
int __nocfi swsusp_arch_resume(void)
{
int rc;
void *zero_page;

1
arch/arm64/kernel/image-vars.h
View file

@ -86,6 +86,7 @@ KVM_NVHE_ALIAS(kvm_patch_vector_branch);
KVM_NVHE_ALIAS(kvm_update_va_mask);
KVM_NVHE_ALIAS(kvm_get_kimage_voffset);
KVM_NVHE_ALIAS(kvm_compute_final_ctr_el0);
KVM_NVHE_ALIAS(kvm_pan_patch_el2_entry);
KVM_NVHE_ALIAS(spectre_bhb_patch_loop_iter);
KVM_NVHE_ALIAS(spectre_bhb_patch_loop_mitigation_enable);
KVM_NVHE_ALIAS(spectre_bhb_patch_wa3);

26
arch/arm64/kernel/ptrace.c
View file

@ -968,20 +968,18 @@ static int sve_set_common(struct task_struct *target,
vq = sve_vq_from_vl(task_get_vl(target, type));
/* Enter/exit streaming mode */
if (system_supports_sme()) {
switch (type) {
case ARM64_VEC_SVE:
target->thread.svcr &= ~SVCR_SM_MASK;
set_tsk_thread_flag(target, TIF_SVE);
break;
case ARM64_VEC_SME:
target->thread.svcr |= SVCR_SM_MASK;
set_tsk_thread_flag(target, TIF_SME);
break;
default:
WARN_ON_ONCE(1);
return -EINVAL;
}
switch (type) {
case ARM64_VEC_SVE:
target->thread.svcr &= ~SVCR_SM_MASK;
set_tsk_thread_flag(target, TIF_SVE);
break;
case ARM64_VEC_SME:
target->thread.svcr |= SVCR_SM_MASK;
set_tsk_thread_flag(target, TIF_SME);
break;
default:
WARN_ON_ONCE(1);
return -EINVAL;
}
/* Always zero V regs, FPSR, and FPCR */

26
arch/arm64/kernel/signal.c
View file

@ -449,12 +449,28 @@ static int restore_sve_fpsimd_context(struct user_ctxs *user)
if (user->sve_size < SVE_SIG_CONTEXT_SIZE(vq))
return -EINVAL;
if (sm) {
sme_alloc(current, false);
if (!current->thread.sme_state)
return -ENOMEM;
}
sve_alloc(current, true);
if (!current->thread.sve_state) {
clear_thread_flag(TIF_SVE);
return -ENOMEM;
}
if (sm) {
current->thread.svcr |= SVCR_SM_MASK;
set_thread_flag(TIF_SME);
} else {
current->thread.svcr &= ~SVCR_SM_MASK;
set_thread_flag(TIF_SVE);
}
current->thread.fp_type = FP_STATE_SVE;
err = __copy_from_user(current->thread.sve_state,
(char __user const *)user->sve +
SVE_SIG_REGS_OFFSET,
@ -462,12 +478,6 @@ static int restore_sve_fpsimd_context(struct user_ctxs *user)
if (err)
return -EFAULT;
if (flags & SVE_SIG_FLAG_SM)
current->thread.svcr |= SVCR_SM_MASK;
else
set_thread_flag(TIF_SVE);
current->thread.fp_type = FP_STATE_SVE;
err = read_fpsimd_context(&fpsimd, user);
if (err)
return err;
@ -576,6 +586,10 @@ static int restore_za_context(struct user_ctxs *user)
if (user->za_size < ZA_SIG_CONTEXT_SIZE(vq))
return -EINVAL;
sve_alloc(current, false);
if (!current->thread.sve_state)
return -ENOMEM;
sme_alloc(current, true);
if (!current->thread.sme_state) {
current->thread.svcr &= ~SVCR_ZA_MASK;

1
arch/arm64/kvm/arm.c
View file

@ -569,6 +569,7 @@ static bool kvm_vcpu_should_clear_twi(struct kvm_vcpu *vcpu)
return kvm_wfi_trap_policy == KVM_WFX_NOTRAP;
return single_task_running() &&
vcpu->kvm->arch.vgic.vgic_model == KVM_DEV_TYPE_ARM_VGIC_V3 &&
(atomic_read(&vcpu->arch.vgic_cpu.vgic_v3.its_vpe.vlpi_count) ||
vcpu->kvm->arch.vgic.nassgireq);
}

8
arch/arm64/kvm/at.c
View file

@ -403,6 +403,7 @@ static int walk_s1(struct kvm_vcpu *vcpu, struct s1_walk_info *wi,
struct s1_walk_result *wr, u64 va)
{
u64 va_top, va_bottom, baddr, desc, new_desc, ipa;
struct kvm_s2_trans s2_trans = {};
int level, stride, ret;
level = wi->sl;
@ -420,8 +421,6 @@ static int walk_s1(struct kvm_vcpu *vcpu, struct s1_walk_info *wi,
ipa = baddr | index;
if (wi->s2) {
struct kvm_s2_trans s2_trans = {};
ret = kvm_walk_nested_s2(vcpu, ipa, &s2_trans);
if (ret) {
fail_s1_walk(wr,
@ -515,6 +514,11 @@ static int walk_s1(struct kvm_vcpu *vcpu, struct s1_walk_info *wi,
new_desc |= PTE_AF;
if (new_desc != desc) {
if (wi->s2 && !kvm_s2_trans_writable(&s2_trans)) {
fail_s1_walk(wr, ESR_ELx_FSC_PERM_L(level), true);
return -EPERM;
}
ret = kvm_swap_s1_desc(vcpu, ipa, desc, new_desc, wi);
if (ret)
return ret;

4
arch/arm64/kvm/hyp/entry.S
View file

@ -126,7 +126,9 @@ SYM_INNER_LABEL(__guest_exit, SYM_L_GLOBAL)
add x1, x1, #VCPU_CONTEXT
ALTERNATIVE(nop, SET_PSTATE_PAN(1), ARM64_HAS_PAN, CONFIG_ARM64_PAN)
alternative_cb ARM64_ALWAYS_SYSTEM, kvm_pan_patch_el2_entry
nop
alternative_cb_end
// Store the guest regs x2 and x3
stp x2, x3, [x1, #CPU_XREG_OFFSET(2)]

2
arch/arm64/kvm/hyp/include/hyp/switch.h
View file

@ -854,7 +854,7 @@ static inline bool kvm_hyp_handle_exit(struct kvm_vcpu *vcpu, u64 *exit_code,
return false;
}
static inline void synchronize_vcpu_pstate(struct kvm_vcpu *vcpu, u64 *exit_code)
static inline void synchronize_vcpu_pstate(struct kvm_vcpu *vcpu)
{
/*
* Check for the conditions of Cortex-A510's #2077057. When these occur

3
arch/arm64/kvm/hyp/nvhe/hyp-main.c
View file

@ -180,6 +180,9 @@ static void handle___pkvm_vcpu_load(struct kvm_cpu_context *host_ctxt)
/* Propagate WFx trapping flags */
hyp_vcpu->vcpu.arch.hcr_el2 &= ~(HCR_TWE | HCR_TWI);
hyp_vcpu->vcpu.arch.hcr_el2 |= hcr_el2 & (HCR_TWE | HCR_TWI);
} else {
memcpy(&hyp_vcpu->vcpu.arch.fgt, hyp_vcpu->host_vcpu->arch.fgt,
sizeof(hyp_vcpu->vcpu.arch.fgt));
}
}

1
arch/arm64/kvm/hyp/nvhe/pkvm.c
View file

@ -172,7 +172,6 @@ static int pkvm_vcpu_init_traps(struct pkvm_hyp_vcpu *hyp_vcpu)
/* Trust the host for non-protected vcpu features. */
vcpu->arch.hcrx_el2 = host_vcpu->arch.hcrx_el2;
memcpy(vcpu->arch.fgt, host_vcpu->arch.fgt, sizeof(vcpu->arch.fgt));
return 0;
}

2
arch/arm64/kvm/hyp/nvhe/switch.c
View file

@ -211,7 +211,7 @@ static inline bool fixup_guest_exit(struct kvm_vcpu *vcpu, u64 *exit_code)
{
const exit_handler_fn *handlers = kvm_get_exit_handler_array(vcpu);
synchronize_vcpu_pstate(vcpu, exit_code);
synchronize_vcpu_pstate(vcpu);
/*
* Some guests (e.g., protected VMs) are not be allowed to run in

5
arch/arm64/kvm/hyp/pgtable.c
View file

@ -144,7 +144,7 @@ static bool kvm_pgtable_walk_continue(const struct kvm_pgtable_walker *walker,
* page table walk.
*/
if (r == -EAGAIN)
return !(walker->flags & KVM_PGTABLE_WALK_HANDLE_FAULT);
return walker->flags & KVM_PGTABLE_WALK_IGNORE_EAGAIN;
return !r;
}
@ -1262,7 +1262,8 @@ int kvm_pgtable_stage2_wrprotect(struct kvm_pgtable *pgt, u64 addr, u64 size)
{
return stage2_update_leaf_attrs(pgt, addr, size, 0,
KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W,
NULL, NULL, 0);
NULL, NULL,
KVM_PGTABLE_WALK_IGNORE_EAGAIN);
}
void kvm_pgtable_stage2_mkyoung(struct kvm_pgtable *pgt, u64 addr,

2
arch/arm64/kvm/hyp/vhe/switch.c
View file

@ -536,7 +536,7 @@ static const exit_handler_fn hyp_exit_handlers[] = {
static inline bool fixup_guest_exit(struct kvm_vcpu *vcpu, u64 *exit_code)
{
synchronize_vcpu_pstate(vcpu, exit_code);
synchronize_vcpu_pstate(vcpu);
/*
* If we were in HYP context on entry, adjust the PSTATE view

12
arch/arm64/kvm/mmu.c
View file

@ -497,7 +497,7 @@ static int share_pfn_hyp(u64 pfn)
this->count = 1;
rb_link_node(&this->node, parent, node);
rb_insert_color(&this->node, &hyp_shared_pfns);
ret = kvm_call_hyp_nvhe(__pkvm_host_share_hyp, pfn, 1);
ret = kvm_call_hyp_nvhe(__pkvm_host_share_hyp, pfn);
unlock:
mutex_unlock(&hyp_shared_pfns_lock);
@ -523,7 +523,7 @@ static int unshare_pfn_hyp(u64 pfn)
rb_erase(&this->node, &hyp_shared_pfns);
kfree(this);
ret = kvm_call_hyp_nvhe(__pkvm_host_unshare_hyp, pfn, 1);
ret = kvm_call_hyp_nvhe(__pkvm_host_unshare_hyp, pfn);
unlock:
mutex_unlock(&hyp_shared_pfns_lock);
@ -1563,14 +1563,12 @@ static void adjust_nested_exec_perms(struct kvm *kvm,
*prot &= ~KVM_PGTABLE_PROT_PX;
}
#define KVM_PGTABLE_WALK_MEMABORT_FLAGS (KVM_PGTABLE_WALK_HANDLE_FAULT | KVM_PGTABLE_WALK_SHARED)
static int gmem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,
struct kvm_s2_trans *nested,
struct kvm_memory_slot *memslot, bool is_perm)
{
bool write_fault, exec_fault, writable;
enum kvm_pgtable_walk_flags flags = KVM_PGTABLE_WALK_MEMABORT_FLAGS;
enum kvm_pgtable_walk_flags flags = KVM_PGTABLE_WALK_SHARED;
enum kvm_pgtable_prot prot = KVM_PGTABLE_PROT_R;
struct kvm_pgtable *pgt = vcpu->arch.hw_mmu->pgt;
unsigned long mmu_seq;
@ -1665,7 +1663,7 @@ static int user_mem_abort(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa,
struct kvm_pgtable *pgt;
struct page *page;
vm_flags_t vm_flags;
enum kvm_pgtable_walk_flags flags = KVM_PGTABLE_WALK_MEMABORT_FLAGS;
enum kvm_pgtable_walk_flags flags = KVM_PGTABLE_WALK_SHARED;
if (fault_is_perm)
fault_granule = kvm_vcpu_trap_get_perm_fault_granule(vcpu);
@ -1933,7 +1931,7 @@ out_unlock:
/* Resolve the access fault by making the page young again. */
static void handle_access_fault(struct kvm_vcpu *vcpu, phys_addr_t fault_ipa)
{
enum kvm_pgtable_walk_flags flags = KVM_PGTABLE_WALK_HANDLE_FAULT | KVM_PGTABLE_WALK_SHARED;
enum kvm_pgtable_walk_flags flags = KVM_PGTABLE_WALK_SHARED;
struct kvm_s2_mmu *mmu;
trace_kvm_access_fault(fault_ipa);

5
arch/arm64/kvm/sys_regs.c
View file

@ -4668,7 +4668,10 @@ static void perform_access(struct kvm_vcpu *vcpu,
* that we don't know how to handle. This certainly qualifies
* as a gross bug that should be fixed right away.
*/
BUG_ON(!r->access);
if (!r->access) {
bad_trap(vcpu, params, r, "register access");
return;
}
/* Skip instruction if instructed so */
if (likely(r->access(vcpu, params, r)))

28
arch/arm64/kvm/va_layout.c
View file

@ -296,3 +296,31 @@ void kvm_compute_final_ctr_el0(struct alt_instr *alt,
generate_mov_q(read_sanitised_ftr_reg(SYS_CTR_EL0),
origptr, updptr, nr_inst);
}
void kvm_pan_patch_el2_entry(struct alt_instr *alt,
__le32 *origptr, __le32 *updptr, int nr_inst)
{
/*
* If we're running at EL1 without hVHE, then SCTLR_EL2.SPAN means
* nothing to us (it is RES1), and we don't need to set PSTATE.PAN
* to anything useful.
*/
if (!is_kernel_in_hyp_mode() && !cpus_have_cap(ARM64_KVM_HVHE))
return;
/*
* Leap of faith: at this point, we must be running VHE one way or
* another, and FEAT_PAN is required to be implemented. If KVM
* explodes at runtime because your system does not abide by this
* requirement, call your favourite HW vendor, they have screwed up.
*
* We don't expect hVHE to access any userspace mapping, so always
* set PSTATE.PAN on enty. Same thing if we have PAN enabled on an
* EL2 kernel. Only force it to 0 if we have not configured PAN in
* the kernel (and you know this is really silly).
*/
if (cpus_have_cap(ARM64_KVM_HVHE) || IS_ENABLED(CONFIG_ARM64_PAN))
*updptr = cpu_to_le32(ENCODE_PSTATE(1, PAN));
else
*updptr = cpu_to_le32(ENCODE_PSTATE(0, PAN));
}

3
arch/loongarch/boot/dts/loongson-2k0500.dtsi
View file

@ -131,6 +131,7 @@
reg-names = "main", "isr0";
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
interrupt-parent = <&cpuintc>;
interrupts = <2>;
@ -149,6 +150,7 @@
reg-names = "main", "isr0";
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
interrupt-parent = <&cpuintc>;
interrupts = <4>;
@ -164,6 +166,7 @@
compatible = "loongson,ls2k0500-eiointc";
reg = <0x0 0x1fe11600 0x0 0xea00>;
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <1>;
interrupt-parent = <&cpuintc>;
interrupts = <3>;

31
arch/loongarch/boot/dts/loongson-2k1000.dtsi
View file

@ -46,7 +46,7 @@
};
/* i2c of the dvi eeprom edid */
i2c-gpio-0 {
i2c-0 {
compatible = "i2c-gpio";
scl-gpios = <&gpio0 0 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
sda-gpios = <&gpio0 1 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
@ -57,7 +57,7 @@
};
/* i2c of the eeprom edid */
i2c-gpio-1 {
i2c-1 {
compatible = "i2c-gpio";
scl-gpios = <&gpio0 33 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
sda-gpios = <&gpio0 32 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
@ -114,6 +114,7 @@
<0x0 0x1fe01140 0x0 0x8>;
reg-names = "main", "isr0", "isr1";
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
interrupt-parent = <&cpuintc>;
interrupts = <2>;
@ -131,6 +132,7 @@
<0x0 0x1fe01148 0x0 0x8>;
reg-names = "main", "isr0", "isr1";
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
interrupt-parent = <&cpuintc>;
interrupts = <3>;
@ -437,54 +439,47 @@
gmac0: ethernet@3,0 {
reg = <0x1800 0x0 0x0 0x0 0x0>;
interrupt-parent = <&liointc0>;
interrupts = <12 IRQ_TYPE_LEVEL_HIGH>,
<13 IRQ_TYPE_LEVEL_HIGH>;
interrupts-extended = <&liointc0 12 IRQ_TYPE_LEVEL_HIGH>,
<&liointc0 13 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq", "eth_lpi";
status = "disabled";
};
gmac1: ethernet@3,1 {
reg = <0x1900 0x0 0x0 0x0 0x0>;
interrupt-parent = <&liointc0>;
interrupts = <14 IRQ_TYPE_LEVEL_HIGH>,
<15 IRQ_TYPE_LEVEL_HIGH>;
interrupts-extended = <&liointc0 14 IRQ_TYPE_LEVEL_HIGH>,
<&liointc0 15 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq", "eth_lpi";
status = "disabled";
};
ehci0: usb@4,1 {
reg = <0x2100 0x0 0x0 0x0 0x0>;
interrupt-parent = <&liointc1>;
interrupts = <18 IRQ_TYPE_LEVEL_HIGH>;
interrupts-extended = <&liointc1 18 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
ohci0: usb@4,2 {
reg = <0x2200 0x0 0x0 0x0 0x0>;
interrupt-parent = <&liointc1>;
interrupts = <19 IRQ_TYPE_LEVEL_HIGH>;
interrupts-extended = <&liointc1 19 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
display@6,0 {
reg = <0x3000 0x0 0x0 0x0 0x0>;
interrupt-parent = <&liointc0>;
interrupts = <28 IRQ_TYPE_LEVEL_HIGH>;
interrupts-extended = <&liointc0 28 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
hda@7,0 {
reg = <0x3800 0x0 0x0 0x0 0x0>;
interrupt-parent = <&liointc0>;
interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
interrupts-extended = <&liointc0 4 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
sata: sata@8,0 {
reg = <0x4000 0x0 0x0 0x0 0x0>;
interrupt-parent = <&liointc0>;
interrupts = <19 IRQ_TYPE_LEVEL_HIGH>;
interrupts-extended = <&liointc0 19 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};

35
arch/loongarch/boot/dts/loongson-2k2000.dtsi
View file

@ -126,6 +126,7 @@
reg = <0x0 0x1fe01400 0x0 0x64>;
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
interrupt-parent = <&cpuintc>;
interrupts = <2>;
@ -140,6 +141,7 @@
compatible = "loongson,ls2k2000-eiointc";
reg = <0x0 0x1fe01600 0x0 0xea00>;
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <1>;
interrupt-parent = <&cpuintc>;
interrupts = <3>;
@ -149,6 +151,7 @@
compatible = "loongson,pch-pic-1.0";
reg = <0x0 0x10000000 0x0 0x400>;
interrupt-controller;
#address-cells = <0>;
#interrupt-cells = <2>;
loongson,pic-base-vec = <0>;
interrupt-parent = <&eiointc>;
@ -291,65 +294,57 @@
gmac0: ethernet@3,0 {
reg = <0x1800 0x0 0x0 0x0 0x0>;
interrupts = <12 IRQ_TYPE_LEVEL_HIGH>,
<13 IRQ_TYPE_LEVEL_HIGH>;
interrupts-extended = <&pic 12 IRQ_TYPE_LEVEL_HIGH>,
<&pic 13 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq", "eth_lpi";
interrupt-parent = <&pic>;
status = "disabled";
};
gmac1: ethernet@3,1 {
reg = <0x1900 0x0 0x0 0x0 0x0>;
interrupts = <14 IRQ_TYPE_LEVEL_HIGH>,
<15 IRQ_TYPE_LEVEL_HIGH>;
interrupts-extended = <&pic 14 IRQ_TYPE_LEVEL_HIGH>,
<&pic 15 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq", "eth_lpi";
interrupt-parent = <&pic>;
status = "disabled";
};
gmac2: ethernet@3,2 {
reg = <0x1a00 0x0 0x0 0x0 0x0>;
interrupts = <17 IRQ_TYPE_LEVEL_HIGH>,
<18 IRQ_TYPE_LEVEL_HIGH>;
interrupts-extended = <&pic 17 IRQ_TYPE_LEVEL_HIGH>,
<&pic 18 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq", "eth_lpi";
interrupt-parent = <&pic>;
status = "disabled";
};
xhci0: usb@4,0 {
reg = <0x2000 0x0 0x0 0x0 0x0>;
interrupts = <48 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&pic>;
interrupts-extended = <&pic 48 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
xhci1: usb@19,0 {
reg = <0xc800 0x0 0x0 0x0 0x0>;
interrupts = <22 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&pic>;
interrupts-extended = <&pic 22 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
display@6,1 {
reg = <0x3100 0x0 0x0 0x0 0x0>;
interrupts = <28 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&pic>;
interrupts-extended = <&pic 28 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
i2s@7,0 {
reg = <0x3800 0x0 0x0 0x0 0x0>;
interrupts = <78 IRQ_TYPE_LEVEL_HIGH>,
<79 IRQ_TYPE_LEVEL_HIGH>;
interrupts-extended = <&pic 78 IRQ_TYPE_LEVEL_HIGH>,
<&pic 79 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "tx", "rx";
interrupt-parent = <&pic>;
status = "disabled";
};
sata: sata@8,0 {
reg = <0x4000 0x0 0x0 0x0 0x0>;
interrupts = <16 IRQ_TYPE_LEVEL_HIGH>;
interrupt-parent = <&pic>;
interrupts-extended = <&pic 16 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};

8
arch/loongarch/kernel/head.S
View file

@ -126,14 +126,6 @@ SYM_CODE_START(smpboot_entry)
LONG_LI t1, CSR_STFILL
csrxchg t0, t1, LOONGARCH_CSR_IMPCTL1
#endif
/* Enable PG */
li.w t0, 0xb0 # PLV=0, IE=0, PG=1
csrwr t0, LOONGARCH_CSR_CRMD
li.w t0, 0x04 # PLV=0, PIE=1, PWE=0
csrwr t0, LOONGARCH_CSR_PRMD
li.w t0, 0x00 # FPE=0, SXE=0, ASXE=0, BTE=0
csrwr t0, LOONGARCH_CSR_EUEN
la.pcrel t0, cpuboot_data
ld.d sp, t0, CPU_BOOT_STACK
ld.d tp, t0, CPU_BOOT_TINFO

21
arch/loongarch/kernel/perf_event.c
View file

@ -626,6 +626,18 @@ static const struct loongarch_perf_event *loongarch_pmu_map_cache_event(u64 conf
return pev;
}
static inline bool loongarch_pmu_event_requires_counter(const struct perf_event *event)
{
switch (event->attr.type) {
case PERF_TYPE_HARDWARE:
case PERF_TYPE_HW_CACHE:
case PERF_TYPE_RAW:
return true;
default:
return false;
}
}
static int validate_group(struct perf_event *event)
{
struct cpu_hw_events fake_cpuc;
@ -633,15 +645,18 @@ static int validate_group(struct perf_event *event)
memset(&fake_cpuc, 0, sizeof(fake_cpuc));
if (loongarch_pmu_alloc_counter(&fake_cpuc, &leader->hw) < 0)
if (loongarch_pmu_event_requires_counter(leader) &&
loongarch_pmu_alloc_counter(&fake_cpuc, &leader->hw) < 0)
return -EINVAL;
for_each_sibling_event(sibling, leader) {
if (loongarch_pmu_alloc_counter(&fake_cpuc, &sibling->hw) < 0)
if (loongarch_pmu_event_requires_counter(sibling) &&
loongarch_pmu_alloc_counter(&fake_cpuc, &sibling->hw) < 0)
return -EINVAL;
}
if (loongarch_pmu_alloc_counter(&fake_cpuc, &event->hw) < 0)
if (loongarch_pmu_event_requires_counter(event) &&
loongarch_pmu_alloc_counter(&fake_cpuc, &event->hw) < 0)
return -EINVAL;
return 0;

1
arch/loongarch/kvm/intc/eiointc.c
View file

@ -679,6 +679,7 @@ static void kvm_eiointc_destroy(struct kvm_device *dev)
kvm_io_bus_unregister_dev(kvm, KVM_IOCSR_BUS, &eiointc->device);
kvm_io_bus_unregister_dev(kvm, KVM_IOCSR_BUS, &eiointc->device_vext);
kfree(eiointc);
kfree(dev);
}
static struct kvm_device_ops kvm_eiointc_dev_ops = {

1
arch/loongarch/kvm/intc/ipi.c
View file

@ -459,6 +459,7 @@ static void kvm_ipi_destroy(struct kvm_device *dev)
ipi = kvm->arch.ipi;
kvm_io_bus_unregister_dev(kvm, KVM_IOCSR_BUS, &ipi->device);
kfree(ipi);
kfree(dev);
}
static struct kvm_device_ops kvm_ipi_dev_ops = {

1
arch/loongarch/kvm/intc/pch_pic.c
View file

@ -475,6 +475,7 @@ static void kvm_pch_pic_destroy(struct kvm_device *dev)
/* unregister pch pic device and free it's memory */
kvm_io_bus_unregister_dev(kvm, KVM_MMIO_BUS, &s->device);
kfree(s);
kfree(dev);
}
static struct kvm_device_ops kvm_pch_pic_dev_ops = {

23
arch/mips/mm/init.c
View file

@ -425,6 +425,28 @@ void __init paging_init(void)
static struct kcore_list kcore_kseg0;
#endif
static inline void __init highmem_init(void)
{
#ifdef CONFIG_HIGHMEM
unsigned long tmp;
/*
* If CPU cannot support HIGHMEM discard the memory above highstart_pfn
*/
if (cpu_has_dc_aliases) {
memblock_remove(PFN_PHYS(highstart_pfn), -1);
return;
}
for (tmp = highstart_pfn; tmp < highend_pfn; tmp++) {
struct page *page = pfn_to_page(tmp);
if (!memblock_is_memory(PFN_PHYS(tmp)))
SetPageReserved(page);
}
#endif
}
void __init arch_mm_preinit(void)
{
/*
@ -435,6 +457,7 @@ void __init arch_mm_preinit(void)
maar_init();
setup_zero_pages(); /* Setup zeroed pages. */
highmem_init();
#ifdef CONFIG_64BIT
if ((unsigned long) &_text > (unsigned long) CKSEG0)

15
arch/powerpc/kernel/watchdog.c
View file

@ -26,6 +26,7 @@
#include <linux/delay.h>
#include <linux/processor.h>
#include <linux/smp.h>
#include <linux/sys_info.h>
#include <asm/interrupt.h>
#include <asm/paca.h>
@ -235,7 +236,11 @@ static void watchdog_smp_panic(int cpu)
pr_emerg("CPU %d TB:%lld, last SMP heartbeat TB:%lld (%lldms ago)\n",
cpu, tb, last_reset, tb_to_ns(tb - last_reset) / 1000000);
if (!sysctl_hardlockup_all_cpu_backtrace) {
if (sysctl_hardlockup_all_cpu_backtrace ||
(hardlockup_si_mask & SYS_INFO_ALL_BT)) {
trigger_allbutcpu_cpu_backtrace(cpu);
cpumask_clear(&wd_smp_cpus_ipi);
} else {
/*
* Try to trigger the stuck CPUs, unless we are going to
* get a backtrace on all of them anyway.
@ -244,11 +249,9 @@ static void watchdog_smp_panic(int cpu)
smp_send_nmi_ipi(c, wd_lockup_ipi, 1000000);
__cpumask_clear_cpu(c, &wd_smp_cpus_ipi);
}
} else {
trigger_allbutcpu_cpu_backtrace(cpu);
cpumask_clear(&wd_smp_cpus_ipi);
}
sys_info(hardlockup_si_mask & ~SYS_INFO_ALL_BT);
if (hardlockup_panic)
nmi_panic(NULL, "Hard LOCKUP");
@ -415,9 +418,11 @@ DEFINE_INTERRUPT_HANDLER_NMI(soft_nmi_interrupt)
xchg(&__wd_nmi_output, 1); // see wd_lockup_ipi
if (sysctl_hardlockup_all_cpu_backtrace)
if (sysctl_hardlockup_all_cpu_backtrace ||
(hardlockup_si_mask & SYS_INFO_ALL_BT))
trigger_allbutcpu_cpu_backtrace(cpu);
sys_info(hardlockup_si_mask & ~SYS_INFO_ALL_BT);
if (hardlockup_panic)
nmi_panic(regs, "Hard LOCKUP");

1
arch/riscv/Kconfig.errata
View file

@ -84,6 +84,7 @@ config ERRATA_STARFIVE_JH7100
select DMA_GLOBAL_POOL
select RISCV_DMA_NONCOHERENT
select RISCV_NONSTANDARD_CACHE_OPS
select CACHEMAINT_FOR_DMA
select SIFIVE_CCACHE
default n
help

14
arch/riscv/include/asm/uaccess.h
View file

@ -97,13 +97,23 @@ static inline unsigned long __untagged_addr_remote(struct mm_struct *mm, unsigne
*/
#ifdef CONFIG_CC_HAS_ASM_GOTO_OUTPUT
/*
* Use a temporary variable for the output of the asm goto to avoid a
* triggering an LLVM assertion due to sign extending the output when
* it is used in later function calls:
* https://github.com/llvm/llvm-project/issues/143795
*/
#define __get_user_asm(insn, x, ptr, label) \
do { \
u64 __tmp; \
asm_goto_output( \
"1:\n" \
" " insn " %0, %1\n" \
_ASM_EXTABLE_UACCESS_ERR(1b, %l2, %0) \
: "=&r" (x) \
: "m" (*(ptr)) : : label)
: "=&r" (__tmp) \
: "m" (*(ptr)) : : label); \
(x) = (__typeof__(x))(unsigned long)__tmp; \
} while (0)
#else /* !CONFIG_CC_HAS_ASM_GOTO_OUTPUT */
#define __get_user_asm(insn, x, ptr, label) \
do { \

3
arch/riscv/kernel/suspend.c
View file

@ -51,10 +51,11 @@ void suspend_restore_csrs(struct suspend_context *context)
#ifdef CONFIG_MMU
if (riscv_has_extension_unlikely(RISCV_ISA_EXT_SSTC)) {
csr_write(CSR_STIMECMP, context->stimecmp);
#if __riscv_xlen < 64
csr_write(CSR_STIMECMP, ULONG_MAX);
csr_write(CSR_STIMECMPH, context->stimecmph);
#endif
csr_write(CSR_STIMECMP, context->stimecmp);
}
csr_write(CSR_SATP, context->satp);

6
arch/riscv/kvm/vcpu_timer.c
View file

@ -72,8 +72,9 @@ static int kvm_riscv_vcpu_timer_cancel(struct kvm_vcpu_timer *t)
static int kvm_riscv_vcpu_update_vstimecmp(struct kvm_vcpu *vcpu, u64 ncycles)
{
#if defined(CONFIG_32BIT)
ncsr_write(CSR_VSTIMECMP, ncycles & 0xFFFFFFFF);
ncsr_write(CSR_VSTIMECMP, ULONG_MAX);
ncsr_write(CSR_VSTIMECMPH, ncycles >> 32);
ncsr_write(CSR_VSTIMECMP, (u32)ncycles);
#else
ncsr_write(CSR_VSTIMECMP, ncycles);
#endif
@ -307,8 +308,9 @@ void kvm_riscv_vcpu_timer_restore(struct kvm_vcpu *vcpu)
return;
#if defined(CONFIG_32BIT)
ncsr_write(CSR_VSTIMECMP, (u32)t->next_cycles);
ncsr_write(CSR_VSTIMECMP, ULONG_MAX);
ncsr_write(CSR_VSTIMECMPH, (u32)(t->next_cycles >> 32));
ncsr_write(CSR_VSTIMECMP, (u32)(t->next_cycles));
#else
ncsr_write(CSR_VSTIMECMP, t->next_cycles);
#endif

6
arch/riscv/net/bpf_jit_comp64.c
View file

@ -1133,10 +1133,6 @@ static int __arch_prepare_bpf_trampoline(struct bpf_tramp_image *im,
store_args(nr_arg_slots, args_off, ctx);
/* skip to actual body of traced function */
if (flags & BPF_TRAMP_F_ORIG_STACK)
orig_call += RV_FENTRY_NINSNS * 4;
if (flags & BPF_TRAMP_F_CALL_ORIG) {
emit_imm(RV_REG_A0, ctx->insns ? (const s64)im : RV_MAX_COUNT_IMM, ctx);
ret = emit_call((const u64)__bpf_tramp_enter, true, ctx);
@ -1171,6 +1167,8 @@ static int __arch_prepare_bpf_trampoline(struct bpf_tramp_image *im,
}
if (flags & BPF_TRAMP_F_CALL_ORIG) {
/* skip to actual body of traced function */
orig_call += RV_FENTRY_NINSNS * 4;
restore_args(min_t(int, nr_arg_slots, RV_MAX_REG_ARGS), args_off, ctx);
restore_stack_args(nr_arg_slots - RV_MAX_REG_ARGS, args_off, stk_arg_off, ctx);
ret = emit_call((const u64)orig_call, true, ctx);

17
arch/s390/boot/vmlinux.lds.S
View file

@ -137,6 +137,15 @@ SECTIONS
}
_end = .;
/* Sections to be discarded */
/DISCARD/ : {
COMMON_DISCARDS
*(.eh_frame)
*(*__ksymtab*)
*(___kcrctab*)
*(.modinfo)
}
DWARF_DEBUG
ELF_DETAILS
@ -161,12 +170,4 @@ SECTIONS
*(.rela.*) *(.rela_*)
}
ASSERT(SIZEOF(.rela.dyn) == 0, "Unexpected run-time relocations (.rela) detected!")
/* Sections to be discarded */
/DISCARD/ : {
COMMON_DISCARDS
*(.eh_frame)
*(*__ksymtab*)
*(___kcrctab*)
}
}

2
arch/s390/kernel/vdso/Makefile
View file

@ -28,7 +28,7 @@ KBUILD_CFLAGS_VDSO := $(filter-out -mno-pic-data-is-text-relative,$(KBUILD_CFLAG
KBUILD_CFLAGS_VDSO := $(filter-out -munaligned-symbols,$(KBUILD_CFLAGS_VDSO))
KBUILD_CFLAGS_VDSO := $(filter-out -fno-asynchronous-unwind-tables,$(KBUILD_CFLAGS_VDSO))
KBUILD_CFLAGS_VDSO += -fPIC -fno-common -fno-builtin -fasynchronous-unwind-tables
KBUILD_CFLAGS_VDSO += -fno-stack-protector
KBUILD_CFLAGS_VDSO += -fno-stack-protector $(DISABLE_KSTACK_ERASE)
ldflags-y := -shared -soname=linux-vdso.so.1 \
--hash-style=both --build-id=sha1 -T

13
arch/x86/events/perf_event.h
View file

@ -1574,13 +1574,22 @@ static inline bool intel_pmu_has_bts_period(struct perf_event *event, u64 period
struct hw_perf_event *hwc = &event->hw;
unsigned int hw_event, bts_event;
if (event->attr.freq)
/*
* Only use BTS for fixed rate period==1 events.
*/
if (event->attr.freq || period != 1)
return false;
/*
* BTS doesn't virtualize.
*/
if (event->attr.exclude_host)
return false;
hw_event = hwc->config & INTEL_ARCH_EVENT_MASK;
bts_event = x86_pmu.event_map(PERF_COUNT_HW_BRANCH_INSTRUCTIONS);
return hw_event == bts_event && period == 1;
return hw_event == bts_event;
}
static inline bool intel_pmu_has_bts(struct perf_event *event)

29
arch/x86/include/asm/kfence.h
View file

@ -42,10 +42,34 @@ static inline bool kfence_protect_page(unsigned long addr, bool protect)
{
unsigned int level;
pte_t *pte = lookup_address(addr, &level);
pteval_t val;
if (WARN_ON(!pte || level != PG_LEVEL_4K))
return false;
val = pte_val(*pte);
/*
* protect requires making the page not-present. If the PTE is
* already in the right state, there's nothing to do.
*/
if (protect != !!(val & _PAGE_PRESENT))
return true;
/*
* Otherwise, invert the entire PTE. This avoids writing out an
* L1TF-vulnerable PTE (not present, without the high address bits
* set).
*/
set_pte(pte, __pte(~val));
/*
* If the page was protected (non-present) and we're making it
* present, there is no need to flush the TLB at all.
*/
if (!protect)
return true;
/*
* We need to avoid IPIs, as we may get KFENCE allocations or faults
* with interrupts disabled. Therefore, the below is best-effort, and
@ -53,11 +77,6 @@ static inline bool kfence_protect_page(unsigned long addr, bool protect)
* lazy fault handling takes care of faults after the page is PRESENT.
*/
if (protect)
set_pte(pte, __pte(pte_val(*pte) & ~_PAGE_PRESENT));
else
set_pte(pte, __pte(pte_val(*pte) | _PAGE_PRESENT));
/*
* Flush this CPU's TLB, assuming whoever did the allocation/free is
* likely to continue running on this CPU.

21
arch/x86/kernel/cpu/resctrl/core.c
View file

@ -825,7 +825,8 @@ static __init bool get_mem_config(void)
if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL)
return __get_mem_config_intel(&hw_res->r_resctrl);
else if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
else if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD ||
boot_cpu_data.x86_vendor == X86_VENDOR_HYGON)
return __rdt_get_mem_config_amd(&hw_res->r_resctrl);
return false;
@ -987,7 +988,8 @@ static __init void rdt_init_res_defs(void)
{
if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL)
rdt_init_res_defs_intel();
else if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
else if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD ||
boot_cpu_data.x86_vendor == X86_VENDOR_HYGON)
rdt_init_res_defs_amd();
}
@ -1019,8 +1021,19 @@ void resctrl_cpu_detect(struct cpuinfo_x86 *c)
c->x86_cache_occ_scale = ebx;
c->x86_cache_mbm_width_offset = eax & 0xff;
if (c->x86_vendor == X86_VENDOR_AMD && !c->x86_cache_mbm_width_offset)
c->x86_cache_mbm_width_offset = MBM_CNTR_WIDTH_OFFSET_AMD;
if (!c->x86_cache_mbm_width_offset) {
switch (c->x86_vendor) {
case X86_VENDOR_AMD:
c->x86_cache_mbm_width_offset = MBM_CNTR_WIDTH_OFFSET_AMD;
break;
case X86_VENDOR_HYGON:
c->x86_cache_mbm_width_offset = MBM_CNTR_WIDTH_OFFSET_HYGON;
break;
default:
/* Leave c->x86_cache_mbm_width_offset as 0 */
break;
}
}
}
}

3
arch/x86/kernel/cpu/resctrl/internal.h
View file

@ -14,6 +14,9 @@
#define MBM_CNTR_WIDTH_OFFSET_AMD 20
/* Hygon MBM counter width as an offset from MBM_CNTR_WIDTH_BASE */
#define MBM_CNTR_WIDTH_OFFSET_HYGON 8
#define RMID_VAL_ERROR BIT_ULL(63)
#define RMID_VAL_UNAVAIL BIT_ULL(62)

32
arch/x86/kernel/fpu/core.c
View file

@ -319,10 +319,29 @@ EXPORT_SYMBOL_FOR_KVM(fpu_enable_guest_xfd_features);
#ifdef CONFIG_X86_64
void fpu_update_guest_xfd(struct fpu_guest *guest_fpu, u64 xfd)
{
struct fpstate *fpstate = guest_fpu->fpstate;
fpregs_lock();
guest_fpu->fpstate->xfd = xfd;
if (guest_fpu->fpstate->in_use)
xfd_update_state(guest_fpu->fpstate);
/*
* KVM's guest ABI is that setting XFD[i]=1 *can* immediately revert the
* save state to its initial configuration. Likewise, KVM_GET_XSAVE does
* the same as XSAVE and returns XSTATE_BV[i]=0 whenever XFD[i]=1.
*
* If the guest's FPU state is in hardware, just update XFD: the XSAVE
* in fpu_swap_kvm_fpstate will clear XSTATE_BV[i] whenever XFD[i]=1.
*
* If however the guest's FPU state is NOT resident in hardware, clear
* disabled components in XSTATE_BV now, or a subsequent XRSTOR will
* attempt to load disabled components and generate #NM _in the host_.
*/
if (xfd && test_thread_flag(TIF_NEED_FPU_LOAD))
fpstate->regs.xsave.header.xfeatures &= ~xfd;
fpstate->xfd = xfd;
if (fpstate->in_use)
xfd_update_state(fpstate);
fpregs_unlock();
}
EXPORT_SYMBOL_FOR_KVM(fpu_update_guest_xfd);
@ -430,6 +449,13 @@ int fpu_copy_uabi_to_guest_fpstate(struct fpu_guest *gfpu, const void *buf,
if (ustate->xsave.header.xfeatures & ~xcr0)
return -EINVAL;
/*
* Disabled features must be in their initial state, otherwise XRSTOR
* causes an exception.
*/
if (WARN_ON_ONCE(ustate->xsave.header.xfeatures & kstate->xfd))
return -EINVAL;
/*
* Nullify @vpkru to preserve its current value if PKRU's bit isn't set
* in the header. KVM's odd ABI is to leave PKRU untouched in this

19
arch/x86/kernel/kvm.c
View file

@ -89,6 +89,7 @@ struct kvm_task_sleep_node {
struct swait_queue_head wq;
u32 token;
int cpu;
bool dummy;
};
static struct kvm_task_sleep_head {
@ -120,15 +121,26 @@ static bool kvm_async_pf_queue_task(u32 token, struct kvm_task_sleep_node *n)
raw_spin_lock(&b->lock);
e = _find_apf_task(b, token);
if (e) {
/* dummy entry exist -> wake up was delivered ahead of PF */
hlist_del(&e->link);
struct kvm_task_sleep_node *dummy = NULL;
/*
* The entry can either be a 'dummy' entry (which is put on the
* list when wake-up happens ahead of APF handling completion)
* or a token from another task which should not be touched.
*/
if (e->dummy) {
hlist_del(&e->link);
dummy = e;
}
raw_spin_unlock(&b->lock);
kfree(e);
kfree(dummy);
return false;
}
n->token = token;
n->cpu = smp_processor_id();
n->dummy = false;
init_swait_queue_head(&n->wq);
hlist_add_head(&n->link, &b->list);
raw_spin_unlock(&b->lock);
@ -231,6 +243,7 @@ again:
}
dummy->token = token;
dummy->cpu = smp_processor_id();
dummy->dummy = true;
init_swait_queue_head(&dummy->wq);
hlist_add_head(&dummy->link, &b->list);
dummy = NULL;

9
arch/x86/kvm/x86.c
View file

@ -5807,9 +5807,18 @@ static int kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
struct kvm_xsave *guest_xsave)
{
union fpregs_state *xstate = (union fpregs_state *)guest_xsave->region;
if (fpstate_is_confidential(&vcpu->arch.guest_fpu))
return vcpu->kvm->arch.has_protected_state ? -EINVAL : 0;
/*
* For backwards compatibility, do not expect disabled features to be in
* their initial state. XSTATE_BV[i] must still be cleared whenever
* XFD[i]=1, or XRSTOR would cause a #NM.
*/
xstate->xsave.header.xfeatures &= ~vcpu->arch.guest_fpu.fpstate->xfd;
return fpu_copy_uabi_to_guest_fpstate(&vcpu->arch.guest_fpu,
guest_xsave->region,
kvm_caps.supported_xcr0,

15
arch/x86/mm/fault.c
View file

@ -821,8 +821,6 @@ __bad_area_nosemaphore(struct pt_regs *regs, unsigned long error_code,
force_sig_pkuerr((void __user *)address, pkey);
else
force_sig_fault(SIGSEGV, si_code, (void __user *)address);
local_irq_disable();
}
static noinline void
@ -1474,15 +1472,12 @@ handle_page_fault(struct pt_regs *regs, unsigned long error_code,
do_kern_addr_fault(regs, error_code, address);
} else {
do_user_addr_fault(regs, error_code, address);
/*
* User address page fault handling might have reenabled
* interrupts. Fixing up all potential exit points of
* do_user_addr_fault() and its leaf functions is just not
* doable w/o creating an unholy mess or turning the code
* upside down.
*/
local_irq_disable();
}
/*
* page fault handling might have reenabled interrupts,
* make sure to disable them again.
*/
local_irq_disable();
}
DEFINE_IDTENTRY_RAW_ERRORCODE(exc_page_fault)

10
arch/x86/mm/kaslr.c
View file

@ -115,12 +115,12 @@ void __init kernel_randomize_memory(void)
/*
* Adapt physical memory region size based on available memory,
* except when CONFIG_PCI_P2PDMA is enabled. P2PDMA exposes the
* device BAR space assuming the direct map space is large enough
* for creating a ZONE_DEVICE mapping in the direct map corresponding
* to the physical BAR address.
* except when CONFIG_ZONE_DEVICE is enabled. ZONE_DEVICE wants to map
* any physical address into the direct-map. KASLR wants to reliably
* steal some physical address bits. Those design choices are in direct
* conflict.
*/
if (!IS_ENABLED(CONFIG_PCI_P2PDMA) && (memory_tb < kaslr_regions[0].size_tb))
if (!IS_ENABLED(CONFIG_ZONE_DEVICE) && (memory_tb < kaslr_regions[0].size_tb))
kaslr_regions[0].size_tb = memory_tb;
/*

2
block/bio-integrity-auto.c
View file

@ -140,7 +140,7 @@ bool bio_integrity_prep(struct bio *bio)
return true;
set_flags = false;
gfp |= __GFP_ZERO;
} else if (bi->csum_type == BLK_INTEGRITY_CSUM_NONE)
} else if (bi->metadata_size > bi->pi_tuple_size)
gfp |= __GFP_ZERO;
break;
default:

2
block/blk-mq.c
View file

@ -1480,7 +1480,7 @@ EXPORT_SYMBOL_GPL(blk_rq_is_poll);
static void blk_rq_poll_completion(struct request *rq, struct completion *wait)
{
do {
blk_hctx_poll(rq->q, rq->mq_hctx, NULL, 0);
blk_hctx_poll(rq->q, rq->mq_hctx, NULL, BLK_POLL_ONESHOT);
cond_resched();
} while (!completion_done(wait));
}

1
block/blk-zoned.c
View file

@ -1957,6 +1957,7 @@ static int disk_update_zone_resources(struct gendisk *disk,
disk->nr_zones = args->nr_zones;
if (args->nr_conv_zones >= disk->nr_zones) {
queue_limits_cancel_update(q);
pr_warn("%s: Invalid number of conventional zones %u / %u\n",
disk->disk_name, args->nr_conv_zones, disk->nr_zones);
ret = -ENODEV;

6
crypto/authencesn.c
View file

@ -169,6 +169,9 @@ static int crypto_authenc_esn_encrypt(struct aead_request *req)
struct scatterlist *src, *dst;
int err;
if (assoclen < 8)
return -EINVAL;
sg_init_table(areq_ctx->src, 2);
src = scatterwalk_ffwd(areq_ctx->src, req->src, assoclen);
dst = src;
@ -256,6 +259,9 @@ static int crypto_authenc_esn_decrypt(struct aead_request *req)
u32 tmp[2];
int err;
if (assoclen < 8)
return -EINVAL;
cryptlen -= authsize;
if (req->src != dst)

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