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KVM: arm64: Add sanitisation to SCTLR_EL2
Sanitise SCTLR_EL2 the usual way. The most important aspect of this is that we benefit from SCTLR_EL2.SPAN being RES1 when HCR_EL2.E2H==0. Reviewed-by: Fuad Tabba <tabba@google.com> Tested-by: Fuad Tabba <tabba@google.com> Link: https://patch.msgid.link/20260202184329.2724080-20-maz@kernel.org Signed-off-by: Marc Zyngier <maz@kernel.org>
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3 changed files with 87 additions and 1 deletions
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@ -495,7 +495,6 @@ enum vcpu_sysreg {
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DBGVCR32_EL2, /* Debug Vector Catch Register */
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/* EL2 registers */
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SCTLR_EL2, /* System Control Register (EL2) */
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ACTLR_EL2, /* Auxiliary Control Register (EL2) */
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CPTR_EL2, /* Architectural Feature Trap Register (EL2) */
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HACR_EL2, /* Hypervisor Auxiliary Control Register */
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@ -526,6 +525,7 @@ enum vcpu_sysreg {
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/* Anything from this can be RES0/RES1 sanitised */
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MARKER(__SANITISED_REG_START__),
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SCTLR_EL2, /* System Control Register (EL2) */
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TCR2_EL2, /* Extended Translation Control Register (EL2) */
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SCTLR2_EL2, /* System Control Register 2 (EL2) */
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MDCR_EL2, /* Monitor Debug Configuration Register (EL2) */
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@ -1123,6 +1123,84 @@ static const struct reg_bits_to_feat_map sctlr_el1_feat_map[] = {
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static const DECLARE_FEAT_MAP(sctlr_el1_desc, SCTLR_EL1,
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sctlr_el1_feat_map, FEAT_AA64EL1);
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static const struct reg_bits_to_feat_map sctlr_el2_feat_map[] = {
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NEEDS_FEAT_FLAG(SCTLR_EL2_CP15BEN,
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RES1_WHEN_E2H0 | REQUIRES_E2H1,
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FEAT_AA32EL0),
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NEEDS_FEAT_FLAG(SCTLR_EL2_ITD |
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SCTLR_EL2_SED,
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RES1_WHEN_E2H1 | REQUIRES_E2H1,
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FEAT_AA32EL0),
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NEEDS_FEAT_FLAG(SCTLR_EL2_BT0, REQUIRES_E2H1, FEAT_BTI),
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NEEDS_FEAT(SCTLR_EL2_BT, FEAT_BTI),
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NEEDS_FEAT_FLAG(SCTLR_EL2_CMOW, REQUIRES_E2H1, FEAT_CMOW),
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NEEDS_FEAT_FLAG(SCTLR_EL2_TSCXT,
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RES1_WHEN_E2H1 | REQUIRES_E2H1,
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feat_csv2_2_csv2_1p2),
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NEEDS_FEAT_FLAG(SCTLR_EL2_EIS |
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SCTLR_EL2_EOS,
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AS_RES1, FEAT_ExS),
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NEEDS_FEAT(SCTLR_EL2_EnFPM, FEAT_FPMR),
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NEEDS_FEAT(SCTLR_EL2_IESB, FEAT_IESB),
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NEEDS_FEAT_FLAG(SCTLR_EL2_EnALS, REQUIRES_E2H1, FEAT_LS64),
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NEEDS_FEAT_FLAG(SCTLR_EL2_EnAS0, REQUIRES_E2H1, FEAT_LS64_ACCDATA),
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NEEDS_FEAT_FLAG(SCTLR_EL2_EnASR, REQUIRES_E2H1, FEAT_LS64_V),
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NEEDS_FEAT(SCTLR_EL2_nAA, FEAT_LSE2),
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NEEDS_FEAT_FLAG(SCTLR_EL2_LSMAOE |
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SCTLR_EL2_nTLSMD,
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AS_RES1 | REQUIRES_E2H1, FEAT_LSMAOC),
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NEEDS_FEAT(SCTLR_EL2_EE, FEAT_MixedEnd),
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NEEDS_FEAT_FLAG(SCTLR_EL2_E0E, REQUIRES_E2H1, feat_mixedendel0),
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NEEDS_FEAT_FLAG(SCTLR_EL2_MSCEn, REQUIRES_E2H1, FEAT_MOPS),
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NEEDS_FEAT_FLAG(SCTLR_EL2_ATA0 |
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SCTLR_EL2_TCF0,
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REQUIRES_E2H1, FEAT_MTE2),
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NEEDS_FEAT(SCTLR_EL2_ATA |
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SCTLR_EL2_TCF,
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FEAT_MTE2),
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NEEDS_FEAT(SCTLR_EL2_ITFSB, feat_mte_async),
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NEEDS_FEAT_FLAG(SCTLR_EL2_TCSO0, REQUIRES_E2H1, FEAT_MTE_STORE_ONLY),
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NEEDS_FEAT(SCTLR_EL2_TCSO,
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FEAT_MTE_STORE_ONLY),
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NEEDS_FEAT(SCTLR_EL2_NMI |
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SCTLR_EL2_SPINTMASK,
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FEAT_NMI),
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NEEDS_FEAT_FLAG(SCTLR_EL2_SPAN, AS_RES1 | REQUIRES_E2H1, FEAT_PAN),
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NEEDS_FEAT_FLAG(SCTLR_EL2_EPAN, REQUIRES_E2H1, FEAT_PAN3),
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NEEDS_FEAT(SCTLR_EL2_EnDA |
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SCTLR_EL2_EnDB |
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SCTLR_EL2_EnIA |
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SCTLR_EL2_EnIB,
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feat_pauth),
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NEEDS_FEAT_FLAG(SCTLR_EL2_EnTP2, REQUIRES_E2H1, FEAT_SME),
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NEEDS_FEAT(SCTLR_EL2_EnRCTX, FEAT_SPECRES),
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NEEDS_FEAT(SCTLR_EL2_DSSBS, FEAT_SSBS),
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NEEDS_FEAT_FLAG(SCTLR_EL2_TIDCP, REQUIRES_E2H1, FEAT_TIDCP1),
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NEEDS_FEAT_FLAG(SCTLR_EL2_TWEDEL |
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SCTLR_EL2_TWEDEn,
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REQUIRES_E2H1, FEAT_TWED),
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NEEDS_FEAT_FLAG(SCTLR_EL2_nTWE |
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SCTLR_EL2_nTWI,
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AS_RES1 | REQUIRES_E2H1, FEAT_AA64EL2),
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NEEDS_FEAT_FLAG(SCTLR_EL2_UCI |
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SCTLR_EL2_UCT |
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SCTLR_EL2_DZE |
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SCTLR_EL2_SA0,
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REQUIRES_E2H1, FEAT_AA64EL2),
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NEEDS_FEAT(SCTLR_EL2_WXN |
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SCTLR_EL2_I |
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SCTLR_EL2_SA |
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SCTLR_EL2_C |
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SCTLR_EL2_A |
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SCTLR_EL2_M,
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FEAT_AA64EL2),
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FORCE_RES0(SCTLR_EL2_RES0),
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FORCE_RES1(SCTLR_EL2_RES1),
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};
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static const DECLARE_FEAT_MAP(sctlr_el2_desc, SCTLR_EL2,
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sctlr_el2_feat_map, FEAT_AA64EL2);
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static const struct reg_bits_to_feat_map mdcr_el2_feat_map[] = {
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NEEDS_FEAT(MDCR_EL2_EBWE, FEAT_Debugv8p9),
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NEEDS_FEAT(MDCR_EL2_TDOSA, FEAT_DoubleLock),
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@ -1247,6 +1325,7 @@ void __init check_feature_map(void)
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check_reg_desc(&sctlr2_desc);
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check_reg_desc(&tcr2_el2_desc);
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check_reg_desc(&sctlr_el1_desc);
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check_reg_desc(&sctlr_el2_desc);
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check_reg_desc(&mdcr_el2_desc);
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check_reg_desc(&vtcr_el2_desc);
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}
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@ -1443,6 +1522,9 @@ struct resx get_reg_fixed_bits(struct kvm *kvm, enum vcpu_sysreg reg)
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case SCTLR_EL1:
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resx = compute_reg_resx_bits(kvm, &sctlr_el1_desc, 0, 0);
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break;
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case SCTLR_EL2:
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resx = compute_reg_resx_bits(kvm, &sctlr_el2_desc, 0, 0);
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break;
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case MDCR_EL2:
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resx = compute_reg_resx_bits(kvm, &mdcr_el2_desc, 0, 0);
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break;
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@ -1766,6 +1766,10 @@ int kvm_init_nv_sysregs(struct kvm_vcpu *vcpu)
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resx = get_reg_fixed_bits(kvm, SCTLR_EL1);
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set_sysreg_masks(kvm, SCTLR_EL1, resx);
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/* SCTLR_EL2 */
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resx = get_reg_fixed_bits(kvm, SCTLR_EL2);
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set_sysreg_masks(kvm, SCTLR_EL2, resx);
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/* SCTLR2_ELx */
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resx = get_reg_fixed_bits(kvm, SCTLR2_EL1);
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set_sysreg_masks(kvm, SCTLR2_EL1, resx);
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