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dmaengine updates for v7.0

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Core:
   - Add Frank Li as susbstem reviewer to help with reviews
 
  New Support:
   - Mediatek support for Dimensity 6300 and 9200 controller
   - Qualcomm Kaanapali and Glymur GPI DMA engine support
   - Synopsis DW AXI Agilex5 support
   - Renesas RZ/V2N SoC support
   - Atmel microchip lan9691-dma support
   - Tegra ADMA tegra264 support
 
  Updates:
   - sg_nents_for_dma() helper use in subsystem
   - pm_runtime_mark_last_busy() redundant call update for subsystem
   - Residue support for xilinx AXIDMA driver
   - Intel Max SGL Size Support and capabilities for DSA3.0
   - AXI dma larger than 32bits address support
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Merge tag 'dmaengine-7.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine

Pull dmaengine updates from Vinod Koul:
 "Core:
   - Add Frank Li as susbstem reviewer to help with reviews

  New Support:
   - Mediatek support for Dimensity 6300 and 9200 controller
   - Qualcomm Kaanapali and Glymur GPI DMA engine
   - Synopsis DW AXI Agilex5
   - Renesas RZ/V2N SoC
   - Atmel microchip lan9691-dma
   - Tegra ADMA tegra264

  Updates:
   - sg_nents_for_dma() helper use in subsystem
   - pm_runtime_mark_last_busy() redundant call update for subsystem
   - Residue support for xilinx AXIDMA driver
   - Intel Max SGL Size Support and capabilities for DSA3.0
   - AXI dma larger than 32bits address support"

* tag 'dmaengine-7.0-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine: (64 commits)
  dmaengine: add Frank Li as reviewer
  dt-bindings: dma: qcom,gpi: Update max interrupts lines to 16
  dmaengine: fsl-edma: don't explicitly disable clocks in .remove()
  dmaengine: xilinx: xdma: use sg_nents_for_dma() helper
  dmaengine: sh: use sg_nents_for_dma() helper
  dmaengine: sa11x0: use sg_nents_for_dma() helper
  dmaengine: qcom: bam_dma: use sg_nents_for_dma() helper
  dmaengine: qcom: adm: use sg_nents_for_dma() helper
  dmaengine: pxa-dma: use sg_nents_for_dma() helper
  dmaengine: lgm: use sg_nents_for_dma() helper
  dmaengine: k3dma: use sg_nents_for_dma() helper
  dmaengine: dw-axi-dmac: use sg_nents_for_dma() helper
  dmaengine: bcm2835-dma: use sg_nents_for_dma() helper
  dmaengine: axi-dmac: use sg_nents_for_dma() helper
  dmaengine: altera-msgdma: use sg_nents_for_dma() helper
  scatterlist: introduce sg_nents_for_dma() helper
  dmaengine: idxd: Add Max SGL Size Support for DSA3.0
  dmaengine: idxd: Expose DSA3.0 capabilities through sysfs
  dmaengine: sh: rz-dmac: Make channel irq local
  dmaengine: pl08x: Fix comment stating the difference between PL080 and PL081
  ...
This commit is contained in:
Linus Torvalds 2026-02-17 11:47:17 -08:00
commit e81dd54f62
49 changed files with 704 additions and 455 deletions
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15
Documentation/ABI/stable/sysfs-driver-dma-idxd
View file

@ -136,6 +136,21 @@ Description: The last executed device administrative command's status/error.
Also last configuration error overloaded.
Writing to it will clear the status.
What: /sys/bus/dsa/devices/dsa<m>/dsacaps
Date: April 5, 2026
KernelVersion: 6.20.0
Contact: dmaengine@vger.kernel.org
Description: The DSA3 specification introduces three new capability
registers: dsacap[0-2]. User components (e.g., configuration
libraries and workload applications) require this information
to properly utilize the DSA3 features.
This includes SGL capability support, Enabling hardware-specific
optimizations, Configuring memory, etc.
The output format is '<dsacap2>,<dsacap1>,<dsacap0>' where each
DSA cap value is a 64 bit hex value.
This attribute should only be visible on DSA devices of version
3 or later.
What: /sys/bus/dsa/devices/dsa<m>/iaa_cap
Date: Sept 14, 2022
KernelVersion: 6.0.0

2
Documentation/devicetree/bindings/dma/arm-pl08x.yaml
View file

@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/dma/arm-pl08x.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: ARM PrimeCells PL080 and PL081 and derivatives DMA controller
title: ARM PrimeCell PL080 and PL081 and derivatives DMA controller
maintainers:
- Vinod Koul <vkoul@kernel.org>

4
Documentation/devicetree/bindings/dma/atmel,sama5d4-dma.yaml
View file

@ -33,7 +33,9 @@ properties:
- microchip,sam9x7-dma
- const: atmel,sama5d4-dma
- items:
- const: microchip,sama7d65-dma
- enum:
- microchip,lan9691-dma
- microchip,sama7d65-dma
- const: microchip,sama7g5-dma
"#dma-cells":

20
Documentation/devicetree/bindings/dma/mediatek,uart-dma.yaml
View file

@ -7,6 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: MediaTek UART APDMA controller
maintainers:
- AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
- Long Cheng <long.cheng@mediatek.com>
description: |
@ -23,11 +24,29 @@ properties:
- enum:
- mediatek,mt2712-uart-dma
- mediatek,mt6795-uart-dma
- mediatek,mt8173-uart-dma
- mediatek,mt8183-uart-dma
- mediatek,mt8365-uart-dma
- mediatek,mt8516-uart-dma
- const: mediatek,mt6577-uart-dma
- items:
- enum:
- mediatek,mt7988-uart-dma
- mediatek,mt8186-uart-dma
- mediatek,mt8188-uart-dma
- mediatek,mt8192-uart-dma
- mediatek,mt8195-uart-dma
- const: mediatek,mt6835-uart-dma
- items:
- enum:
- mediatek,mt6991-uart-dma
- mediatek,mt8196-uart-dma
- const: mediatek,mt6985-uart-dma
- enum:
- mediatek,mt6577-uart-dma
- mediatek,mt6795-uart-dma
- mediatek,mt6835-uart-dma
- mediatek,mt6985-uart-dma
reg:
minItems: 1
@ -58,6 +77,7 @@ properties:
mediatek,dma-33bits:
type: boolean
deprecated: true
description: Enable 33-bits UART APDMA support
required:

4
Documentation/devicetree/bindings/dma/qcom,gpi.yaml
View file

@ -24,6 +24,8 @@ properties:
- qcom,sm6350-gpi-dma
- items:
- enum:
- qcom,glymur-gpi-dma
- qcom,kaanapali-gpi-dma
- qcom,milos-gpi-dma
- qcom,qcm2290-gpi-dma
- qcom,qcs8300-gpi-dma
@ -58,7 +60,7 @@ properties:
description:
Interrupt lines for each GPI instance
minItems: 1
maxItems: 13
maxItems: 16
"#dma-cells":
const: 3

1
Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml
View file

@ -24,6 +24,7 @@ properties:
- items:
- enum:
- renesas,r9a09g047-dmac # RZ/G3E
- renesas,r9a09g056-dmac # RZ/V2N
- const: renesas,r9a09g057-dmac
- const: renesas,r9a09g057-dmac # RZ/V2H(P)

14
Documentation/devicetree/bindings/dma/snps,dw-axi-dmac.yaml
View file

@ -17,11 +17,15 @@ allOf:
properties:
compatible:
enum:
- snps,axi-dma-1.01a
- intel,kmb-axi-dma
- starfive,jh7110-axi-dma
- starfive,jh8100-axi-dma
oneOf:
- enum:
- snps,axi-dma-1.01a
- intel,kmb-axi-dma
- starfive,jh7110-axi-dma
- starfive,jh8100-axi-dma
- items:
- const: altr,agilex5-axi-dma
- const: snps,axi-dma-1.01a
reg:
minItems: 1

5
Documentation/driver-api/dmaengine/provider.rst
View file

@ -411,7 +411,7 @@ supported.
- This structure can be initialized using the function
``dma_async_tx_descriptor_init``.
- You'll also need to set two fields in this structure:
- You'll also need to set following fields in this structure:
- flags:
TODO: Can it be modified by the driver itself, or
@ -421,6 +421,9 @@ supported.
that is supposed to push the current transaction descriptor to a
pending queue, waiting for issue_pending to be called.
- phys: Physical address of the descriptor which is used later by
the dma engine to read the descriptor and initiate transfer.
- In this structure the function pointer callback_result can be
initialized in order for the submitter to be notified that a
transaction has completed. In the earlier code the function pointer