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drm/amdgpu: Add secure display v2 command
Add secure display v2 command to support multiple ROI instances per display. v2: fix typo and coding style issue Signed-off-by: Wayne Lin <Wayne.Lin@amd.com> Signed-off-by: Jinzhou Su <jinzhou.su@amd.com> Reviewed-by: Lang Yu <lang.yu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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2 changed files with 24 additions and 3 deletions
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@ -2264,7 +2264,8 @@ int psp_securedisplay_invoke(struct psp_context *psp, uint32_t ta_cmd_id)
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return -EINVAL;
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if (ta_cmd_id != TA_SECUREDISPLAY_COMMAND__QUERY_TA &&
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ta_cmd_id != TA_SECUREDISPLAY_COMMAND__SEND_ROI_CRC)
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ta_cmd_id != TA_SECUREDISPLAY_COMMAND__SEND_ROI_CRC &&
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ta_cmd_id != TA_SECUREDISPLAY_COMMAND__SEND_ROI_CRC_V2)
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return -EINVAL;
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ret = psp_ta_invoke(psp, ta_cmd_id, &psp->securedisplay_context.context);
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@ -31,10 +31,12 @@
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* Secure Display Command ID
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*/
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enum ta_securedisplay_command {
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/* Query whether TA is responding used only for validation purpose */
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/* Query whether TA is responding. It is used only for validation purpose */
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TA_SECUREDISPLAY_COMMAND__QUERY_TA = 1,
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/* Send region of Interest and CRC value to I2C */
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TA_SECUREDISPLAY_COMMAND__SEND_ROI_CRC = 2,
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/* V2 to send multiple regions of Interest and CRC value to I2C */
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TA_SECUREDISPLAY_COMMAND__SEND_ROI_CRC_V2 = 3,
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/* Maximum Command ID */
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TA_SECUREDISPLAY_COMMAND__MAX_ID = 0x7FFFFFFF,
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};
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@ -83,6 +85,8 @@ enum ta_securedisplay_ta_query_cmd_ret {
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enum ta_securedisplay_buffer_size {
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/* 15 bytes = 8 byte (ROI) + 6 byte(CRC) + 1 byte(phy_id) */
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TA_SECUREDISPLAY_I2C_BUFFER_SIZE = 15,
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/* 16 bytes = 8 byte (ROI) + 6 byte(CRC) + 1 byte(phy_id) + 1 byte(roi_idx) */
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TA_SECUREDISPLAY_V2_I2C_BUFFER_SIZE = 16,
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};
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/** Input/output structures for Secure Display commands */
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@ -95,7 +99,15 @@ enum ta_securedisplay_buffer_size {
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* Physical ID to determine which DIO scratch register should be used to get ROI
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*/
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struct ta_securedisplay_send_roi_crc_input {
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uint32_t phy_id; /* Physical ID */
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/* Physical ID */
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uint32_t phy_id;
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};
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struct ta_securedisplay_send_roi_crc_v2_input {
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/* Physical ID */
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uint32_t phy_id;
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/* Region of interest index */
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uint8_t roi_idx;
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};
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/** @union ta_securedisplay_cmd_input
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@ -104,6 +116,8 @@ struct ta_securedisplay_send_roi_crc_input {
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union ta_securedisplay_cmd_input {
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/* send ROI and CRC input buffer format */
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struct ta_securedisplay_send_roi_crc_input send_roi_crc;
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/* send ROI and CRC input buffer format, v2 adds a ROI index */
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struct ta_securedisplay_send_roi_crc_v2_input send_roi_crc_v2;
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uint32_t reserved[4];
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};
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@ -128,6 +142,10 @@ struct ta_securedisplay_send_roi_crc_output {
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uint8_t reserved;
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};
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struct ta_securedisplay_send_roi_crc_v2_output {
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uint8_t i2c_buf[TA_SECUREDISPLAY_V2_I2C_BUFFER_SIZE]; /* I2C buffer */
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};
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/** @union ta_securedisplay_cmd_output
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* Output buffer
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*/
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@ -136,6 +154,8 @@ union ta_securedisplay_cmd_output {
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struct ta_securedisplay_query_ta_output query_ta;
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/* Send ROI CRC output buffer format used only for validation purpose */
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struct ta_securedisplay_send_roi_crc_output send_roi_crc;
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/* Send ROI CRC output buffer format used only for validation purpose */
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struct ta_securedisplay_send_roi_crc_v2_output send_roi_crc_v2;
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uint32_t reserved[4];
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};
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