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ASoC: codecs: Add uda1342 codec driver
The UDA1342 is an NXP audio codec, support 2x Stereo audio ADC (4x PGA mic inputs), stereo audio DAC, with basic audio processing. Signed-off-by: Binbin Zhou <zhoubinbin@loongson.cn> Link: https://patch.msgid.link/927e46b48ca84865a216ce08e7c53df59c2a8c0b.1728459624.git.zhoubinbin@loongson.cn Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Binbin Zhou
Mark Brown
parent
de56743159
commit
de0fb25e37
4 changed files with 435 additions and 0 deletions
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@ -283,6 +283,7 @@ config SND_SOC_ALL_CODECS
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imply SND_SOC_TWL4030
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imply SND_SOC_TWL6040
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imply SND_SOC_UDA1334
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imply SND_SOC_UDA1342
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imply SND_SOC_UDA1380
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imply SND_SOC_WCD9335
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imply SND_SOC_WCD934X
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@ -2131,6 +2132,13 @@ config SND_SOC_UDA1334
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and has basic features such as de-emphasis (at 44.1 kHz sampling
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rate) and mute.
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config SND_SOC_UDA1342
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tristate "NXP UDA1342 CODEC"
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depends on I2C
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help
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The UDA1342 is an NXP audio codec, support 2x Stereo audio ADC (4x PGA
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mic inputs), stereo audio DAC, with basic audio processing.
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config SND_SOC_UDA1380
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tristate
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depends on I2C
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@ -325,6 +325,7 @@ snd-soc-ts3a227e-y := ts3a227e.o
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snd-soc-twl4030-y := twl4030.o
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snd-soc-twl6040-y := twl6040.o
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snd-soc-uda1334-y := uda1334.o
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snd-soc-uda1342-y := uda1342.o
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snd-soc-uda1380-y := uda1380.o
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snd-soc-wcd-classh-y := wcd-clsh-v2.o
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snd-soc-wcd-mbhc-y := wcd-mbhc-v2.o
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@ -735,6 +736,7 @@ obj-$(CONFIG_SND_SOC_TS3A227E) += snd-soc-ts3a227e.o
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obj-$(CONFIG_SND_SOC_TWL4030) += snd-soc-twl4030.o
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obj-$(CONFIG_SND_SOC_TWL6040) += snd-soc-twl6040.o
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obj-$(CONFIG_SND_SOC_UDA1334) += snd-soc-uda1334.o
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obj-$(CONFIG_SND_SOC_UDA1342) += snd-soc-uda1342.o
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obj-$(CONFIG_SND_SOC_UDA1380) += snd-soc-uda1380.o
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obj-$(CONFIG_SND_SOC_WCD_CLASSH) += snd-soc-wcd-classh.o
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obj-$(CONFIG_SND_SOC_WCD_MBHC) += snd-soc-wcd-mbhc.o
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347
sound/soc/codecs/uda1342.c
Normal file
347
sound/soc/codecs/uda1342.c
Normal file
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@ -0,0 +1,347 @@
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// SPDX-License-Identifier: GPL-2.0-only
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//
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// uda1342.c -- UDA1342 ALSA SoC Codec driver
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// Based on the WM87xx drivers by Liam Girdwood and Richard Purdie
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//
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// Copyright 2007 Dension Audio Systems Ltd.
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// Copyright 2024 Loongson Technology Co.,Ltd.
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//
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// Modifications by Christian Pellegrin <chripell@evolware.org>
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// Further cleanup and restructuring by:
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// Binbin Zhou <zhoubinbin@loongson.cn>
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#include <linux/module.h>
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#include <linux/i2c.h>
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#include <sound/core.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <linux/pm_runtime.h>
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#include <sound/soc.h>
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#include <sound/tlv.h>
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#include "uda1342.h"
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#define UDA134X_FORMATS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_LE | \
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SNDRV_PCM_FMTBIT_S18_3LE | SNDRV_PCM_FMTBIT_S20_3LE)
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struct uda1342_priv {
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int sysclk;
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int dai_fmt;
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struct snd_pcm_substream *provider_substream;
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struct snd_pcm_substream *consumer_substream;
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struct regmap *regmap;
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struct i2c_client *i2c;
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};
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static const struct reg_default uda1342_reg_defaults[] = {
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{ 0x00, 0x1042 },
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{ 0x01, 0x0000 },
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{ 0x10, 0x0088 },
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{ 0x11, 0x0000 },
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{ 0x12, 0x0000 },
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{ 0x20, 0x0080 },
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{ 0x21, 0x0080 },
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};
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static int uda1342_mute(struct snd_soc_dai *dai, int mute, int direction)
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{
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struct snd_soc_component *component = dai->component;
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struct uda1342_priv *uda1342 = snd_soc_component_get_drvdata(component);
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unsigned int mask;
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unsigned int val = 0;
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/* Master mute */
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mask = BIT(5);
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if (mute)
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val = mask;
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return regmap_update_bits(uda1342->regmap, 0x10, mask, val);
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}
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static int uda1342_startup(struct snd_pcm_substream *substream,
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struct snd_soc_dai *dai)
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{
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struct snd_soc_component *component = dai->component;
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struct uda1342_priv *uda1342 = snd_soc_component_get_drvdata(component);
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struct snd_pcm_runtime *provider_runtime;
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if (uda1342->provider_substream) {
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provider_runtime = uda1342->provider_substream->runtime;
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snd_pcm_hw_constraint_single(substream->runtime,
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SNDRV_PCM_HW_PARAM_RATE, provider_runtime->rate);
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snd_pcm_hw_constraint_single(substream->runtime,
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SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
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provider_runtime->sample_bits);
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uda1342->consumer_substream = substream;
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} else {
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uda1342->provider_substream = substream;
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}
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return 0;
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}
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static void uda1342_shutdown(struct snd_pcm_substream *substream,
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struct snd_soc_dai *dai)
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{
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struct snd_soc_component *component = dai->component;
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struct uda1342_priv *uda1342 = snd_soc_component_get_drvdata(component);
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if (uda1342->provider_substream == substream)
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uda1342->provider_substream = uda1342->consumer_substream;
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uda1342->consumer_substream = NULL;
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}
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static int uda1342_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
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{
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struct snd_soc_component *component = dai->component;
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struct uda1342_priv *uda1342 = snd_soc_component_get_drvdata(component);
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struct device *dev = &uda1342->i2c->dev;
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unsigned int hw_params = 0;
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if (substream == uda1342->consumer_substream)
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return 0;
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/* set SYSCLK / fs ratio */
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switch (uda1342->sysclk / params_rate(params)) {
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case 512:
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break;
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case 384:
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hw_params |= BIT(4);
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break;
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case 256:
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hw_params |= BIT(5);
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break;
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default:
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dev_err(dev, "unsupported frequency\n");
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return -EINVAL;
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}
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/* set DAI format and word length */
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switch (uda1342->dai_fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
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case SND_SOC_DAIFMT_I2S:
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break;
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case SND_SOC_DAIFMT_RIGHT_J:
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switch (params_width(params)) {
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case 16:
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hw_params |= BIT(1);
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break;
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case 18:
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hw_params |= BIT(2);
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break;
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case 20:
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hw_params |= BIT(2) | BIT(1);
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break;
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default:
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dev_err(dev, "unsupported format (right)\n");
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return -EINVAL;
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}
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break;
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case SND_SOC_DAIFMT_LEFT_J:
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hw_params |= BIT(3);
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break;
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default:
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dev_err(dev, "unsupported format\n");
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return -EINVAL;
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}
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return regmap_update_bits(uda1342->regmap, 0x0,
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STATUS0_DAIFMT_MASK | STATUS0_SYSCLK_MASK, hw_params);
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}
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static int uda1342_set_dai_sysclk(struct snd_soc_dai *codec_dai,
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int clk_id, unsigned int freq, int dir)
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{
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struct snd_soc_component *component = codec_dai->component;
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struct uda1342_priv *uda1342 = snd_soc_component_get_drvdata(component);
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struct device *dev = &uda1342->i2c->dev;
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/*
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* Anything between 256fs*8Khz and 512fs*48Khz should be acceptable
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* because the codec is slave. Of course limitations of the clock
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* master (the IIS controller) apply.
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* We'll error out on set_hw_params if it's not OK
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*/
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if ((freq >= (256 * 8000)) && (freq <= (512 * 48000))) {
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uda1342->sysclk = freq;
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return 0;
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}
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dev_err(dev, "unsupported sysclk\n");
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return -EINVAL;
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}
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static int uda1342_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
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{
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struct snd_soc_component *component = codec_dai->component;
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struct uda1342_priv *uda1342 = snd_soc_component_get_drvdata(component);
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/* codec supports only full consumer mode */
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if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) != SND_SOC_DAIFMT_BC_FC) {
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dev_err(&uda1342->i2c->dev, "unsupported consumer mode.\n");
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return -EINVAL;
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}
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/* We can't setup DAI format here as it depends on the word bit num */
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/* so let's just store the value for later */
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uda1342->dai_fmt = fmt;
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return 0;
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}
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static const struct snd_kcontrol_new uda1342_snd_controls[] = {
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SOC_SINGLE("Master Playback Volume", 0x11, 0, 0x3F, 1),
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SOC_SINGLE("Analog1 Volume", 0x12, 0, 0x1F, 1),
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};
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/* Common DAPM widgets */
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static const struct snd_soc_dapm_widget uda1342_dapm_widgets[] = {
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SND_SOC_DAPM_INPUT("VINL1"),
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SND_SOC_DAPM_INPUT("VINR1"),
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SND_SOC_DAPM_INPUT("VINL2"),
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SND_SOC_DAPM_INPUT("VINR2"),
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SND_SOC_DAPM_DAC("DAC", "Playback", 0, 1, 0),
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SND_SOC_DAPM_ADC("ADC", "Capture", 0, 9, 0),
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SND_SOC_DAPM_OUTPUT("VOUTL"),
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SND_SOC_DAPM_OUTPUT("VOUTR"),
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};
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static const struct snd_soc_dapm_route uda1342_dapm_routes[] = {
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{ "ADC", NULL, "VINL1" },
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{ "ADC", NULL, "VINR1" },
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{ "ADC", NULL, "VINL2" },
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{ "ADC", NULL, "VINR2" },
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{ "VOUTL", NULL, "DAC" },
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{ "VOUTR", NULL, "DAC" },
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};
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static const struct snd_soc_dai_ops uda1342_dai_ops = {
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.startup = uda1342_startup,
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.shutdown = uda1342_shutdown,
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.hw_params = uda1342_hw_params,
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.mute_stream = uda1342_mute,
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.set_sysclk = uda1342_set_dai_sysclk,
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.set_fmt = uda1342_set_dai_fmt,
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};
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static struct snd_soc_dai_driver uda1342_dai = {
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.name = "uda1342-hifi",
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/* playback capabilities */
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.playback = {
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.stream_name = "Playback",
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.channels_min = 1,
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.channels_max = 2,
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.rates = SNDRV_PCM_RATE_8000_48000,
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.formats = UDA134X_FORMATS,
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},
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/* capture capabilities */
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.capture = {
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.stream_name = "Capture",
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.channels_min = 1,
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.channels_max = 2,
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.rates = SNDRV_PCM_RATE_8000_48000,
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.formats = UDA134X_FORMATS,
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},
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/* pcm operations */
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.ops = &uda1342_dai_ops,
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};
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static const struct snd_soc_component_driver soc_component_dev_uda1342 = {
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.controls = uda1342_snd_controls,
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.num_controls = ARRAY_SIZE(uda1342_snd_controls),
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.dapm_widgets = uda1342_dapm_widgets,
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.num_dapm_widgets = ARRAY_SIZE(uda1342_dapm_widgets),
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.dapm_routes = uda1342_dapm_routes,
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.num_dapm_routes = ARRAY_SIZE(uda1342_dapm_routes),
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.suspend_bias_off = 1,
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.idle_bias_on = 1,
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.use_pmdown_time = 1,
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.endianness = 1,
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};
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static const struct regmap_config uda1342_regmap = {
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.reg_bits = 8,
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.val_bits = 16,
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.max_register = 0x21,
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.reg_defaults = uda1342_reg_defaults,
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.num_reg_defaults = ARRAY_SIZE(uda1342_reg_defaults),
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.cache_type = REGCACHE_MAPLE,
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};
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static int uda1342_i2c_probe(struct i2c_client *i2c)
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{
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struct uda1342_priv *uda1342;
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uda1342 = devm_kzalloc(&i2c->dev, sizeof(*uda1342), GFP_KERNEL);
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if (!uda1342)
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return -ENOMEM;
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uda1342->regmap = devm_regmap_init_i2c(i2c, &uda1342_regmap);
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if (IS_ERR(uda1342->regmap))
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return PTR_ERR(uda1342->regmap);
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i2c_set_clientdata(i2c, uda1342);
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uda1342->i2c = i2c;
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return devm_snd_soc_register_component(&i2c->dev,
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&soc_component_dev_uda1342,
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&uda1342_dai, 1);
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}
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static int uda1342_suspend(struct device *dev)
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{
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struct uda1342_priv *uda1342 = dev_get_drvdata(dev);
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regcache_cache_only(uda1342->regmap, true);
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return 0;
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}
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static int uda1342_resume(struct device *dev)
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{
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struct uda1342_priv *uda1342 = dev_get_drvdata(dev);
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regcache_mark_dirty(uda1342->regmap);
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regcache_sync(uda1342->regmap);
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return 0;
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}
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static DEFINE_RUNTIME_DEV_PM_OPS(uda1342_pm_ops,
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uda1342_suspend, uda1342_resume, NULL);
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static const struct i2c_device_id uda1342_i2c_id[] = {
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{ "uda1342", 0 },
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{ }
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};
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MODULE_DEVICE_TABLE(i2c, uda1342_i2c_id);
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static const struct of_device_id uda1342_of_match[] = {
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{ .compatible = "nxp,uda1342" },
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{ }
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};
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MODULE_DEVICE_TABLE(of, uda1342_of_match);
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static struct i2c_driver uda1342_i2c_driver = {
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.driver = {
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.name = "uda1342",
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.of_match_table = uda1342_of_match,
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.pm = pm_sleep_ptr(&uda1342_pm_ops),
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},
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.probe = uda1342_i2c_probe,
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.id_table = uda1342_i2c_id,
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};
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module_i2c_driver(uda1342_i2c_driver);
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MODULE_DESCRIPTION("UDA1342 ALSA soc codec driver");
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MODULE_AUTHOR("Zoltan Devai, Christian Pellegrin <chripell@evolware.org>");
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MODULE_AUTHOR("Binbin Zhou <zhoubinbin@loongson.cn>");
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MODULE_LICENSE("GPL");
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78
sound/soc/codecs/uda1342.h
Normal file
78
sound/soc/codecs/uda1342.h
Normal file
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@ -0,0 +1,78 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Audio support for NXP UDA1342
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*
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* Copyright (c) 2005 Giorgio Padrin <giorgio@mandarinlogiq.org>
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* Copyright (c) 2024 Binbin Zhou <zhoubinbin@loongson.cn>
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*/
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#ifndef _UDA1342_H
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#define _UDA1342_H
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#define UDA1342_CLK 0x00
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#define UDA1342_IFACE 0x01
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#define UDA1342_PM 0x02
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#define UDA1342_AMIX 0x03
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#define UDA1342_HP 0x04
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#define UDA1342_MVOL 0x11
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#define UDA1342_MIXVOL 0x12
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#define UDA1342_MODE 0x12
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#define UDA1342_DEEMP 0x13
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#define UDA1342_MIXER 0x14
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#define UDA1342_INTSTAT 0x18
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#define UDA1342_DEC 0x20
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#define UDA1342_PGA 0x21
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#define UDA1342_ADC 0x22
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#define UDA1342_AGC 0x23
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#define UDA1342_DECSTAT 0x28
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#define UDA1342_RESET 0x7f
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/* Register flags */
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#define R00_EN_ADC 0x0800
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#define R00_EN_DEC 0x0400
|
||||
#define R00_EN_DAC 0x0200
|
||||
#define R00_EN_INT 0x0100
|
||||
#define R00_DAC_CLK 0x0010
|
||||
#define R01_SFORI_I2S 0x0000
|
||||
#define R01_SFORI_LSB16 0x0100
|
||||
#define R01_SFORI_LSB18 0x0200
|
||||
#define R01_SFORI_LSB20 0x0300
|
||||
#define R01_SFORI_MSB 0x0500
|
||||
#define R01_SFORI_MASK 0x0700
|
||||
#define R01_SFORO_I2S 0x0000
|
||||
#define R01_SFORO_LSB16 0x0001
|
||||
#define R01_SFORO_LSB18 0x0002
|
||||
#define R01_SFORO_LSB20 0x0003
|
||||
#define R01_SFORO_LSB24 0x0004
|
||||
#define R01_SFORO_MSB 0x0005
|
||||
#define R01_SFORO_MASK 0x0007
|
||||
#define R01_SEL_SOURCE 0x0040
|
||||
#define R01_SIM 0x0010
|
||||
#define R02_PON_PLL 0x8000
|
||||
#define R02_PON_HP 0x2000
|
||||
#define R02_PON_DAC 0x0400
|
||||
#define R02_PON_BIAS 0x0100
|
||||
#define R02_EN_AVC 0x0080
|
||||
#define R02_PON_AVC 0x0040
|
||||
#define R02_PON_LNA 0x0010
|
||||
#define R02_PON_PGAL 0x0008
|
||||
#define R02_PON_ADCL 0x0004
|
||||
#define R02_PON_PGAR 0x0002
|
||||
#define R02_PON_ADCR 0x0001
|
||||
#define R13_MTM 0x4000
|
||||
#define R14_SILENCE 0x0080
|
||||
#define R14_SDET_ON 0x0040
|
||||
#define R21_MT_ADC 0x8000
|
||||
#define R22_SEL_LNA 0x0008
|
||||
#define R22_SEL_MIC 0x0004
|
||||
#define R22_SKIP_DCFIL 0x0002
|
||||
#define R23_AGC_EN 0x0001
|
||||
|
||||
#define UDA1342_DAI_DUPLEX 0 /* playback and capture on single DAI */
|
||||
#define UDA1342_DAI_PLAYBACK 1 /* playback DAI */
|
||||
#define UDA1342_DAI_CAPTURE 2 /* capture DAI */
|
||||
|
||||
#define STATUS0_DAIFMT_MASK (~(7 << 1))
|
||||
#define STATUS0_SYSCLK_MASK (~(3 << 4))
|
||||
|
||||
#endif /* _UDA1342_H */
|
||||
Loading…
Add table
Add a link
Reference in a new issue