serial: sh-sci: Rename port SCI_PORT_RSCI->RSCI_PORT_SCIF16

Rename port SCI_PORT_RSCI->RSCI_PORT_SCIF16 to differentiate it from
RZ/G3E port that has 32-stage FIFO.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Tested-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://patch.msgid.link/20251129164325.209213-12-biju.das.jz@bp.renesas.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Biju Das 2025-11-29 16:43:07 +00:00 committed by Greg Kroah-Hartman
parent 7d8b226bf9
commit d53f4aa9ed
3 changed files with 6 additions and 6 deletions

View file

@ -462,7 +462,7 @@ static const struct sci_port_ops rsci_port_ops = {
};
struct sci_of_data of_sci_rsci_data = {
.type = SCI_PORT_RSCI,
.type = RSCI_PORT_SCIF16,
.ops = &rsci_port_ops,
.uart_ops = &rsci_uart_ops,
.params = &rsci_port_params,

View file

@ -7,7 +7,7 @@
/* Private port IDs */
enum SCI_PORT_TYPE {
SCI_PORT_RSCI = BIT(7) | 0,
RSCI_PORT_SCIF16 = BIT(7) | 0,
};
enum SCI_CLKS {

View file

@ -1184,7 +1184,7 @@ static int sci_handle_errors(struct uart_port *port)
static bool sci_is_rsci_type(u8 type)
{
return (type == SCI_PORT_RSCI);
return (type == RSCI_PORT_SCIF16);
}
static int sci_handle_fifo_overrun(struct uart_port *port)
@ -3178,7 +3178,7 @@ static int sci_init_clocks(struct sci_port *sci_port, struct device *dev)
if (sci_port->type == PORT_HSCIF) {
clk_names[SCI_SCK] = "hsck";
} else if (sci_port->type == SCI_PORT_RSCI) {
} else if (sci_port->type == RSCI_PORT_SCIF16) {
clk_names[SCI_FCK] = "operation";
clk_names[SCI_BRG_INT] = "bus";
}
@ -3190,7 +3190,7 @@ static int sci_init_clocks(struct sci_port *sci_port, struct device *dev)
if (IS_ERR(clk))
return PTR_ERR(clk);
if (!clk && sci_port->type == SCI_PORT_RSCI &&
if (!clk && sci_port->type == RSCI_PORT_SCIF16 &&
(i == SCI_FCK || i == SCI_BRG_INT))
return dev_err_probe(dev, -ENODEV, "failed to get %s\n", name);
@ -3328,7 +3328,7 @@ static int sci_init_single(struct platform_device *dev,
else
sci_port->rx_trigger = 8;
break;
case SCI_PORT_RSCI:
case RSCI_PORT_SCIF16:
sci_port->rx_trigger = 16;
break;
default: