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reset: th1520: add resets for display pipeline

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The VO subsystem of TH1520 contains a few resets for the display
pipeline -- display, MIPI DSI and HDMI controllers.

Add support for them to the reset-th1520 driver.

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Link: https://lore.kernel.org/r/20250813081716.2181843-3-uwu@icenowy.me
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
This commit is contained in:
Icenowy Zheng 2025-08-13 16:17:16 +08:00 • committed by Philipp Zabel
parent f443d7c9ed
commit d342031a52
1 changed files with 39 additions and 1 deletions
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40
drivers/reset/reset-th1520.c
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@ -14,10 +14,20 @@
/* register offset in VOSYS_REGMAP */
#define TH1520_GPU_RST_CFG 0x0
#define TH1520_GPU_RST_CFG_MASK GENMASK(1, 0)
#define TH1520_DPU_RST_CFG 0x4
#define TH1520_DSI0_RST_CFG 0x8
#define TH1520_DSI1_RST_CFG 0xc
#define TH1520_HDMI_RST_CFG 0x14
/* register values */
#define TH1520_GPU_SW_GPU_RST BIT(0)
#define TH1520_GPU_SW_CLKGEN_RST BIT(1)
#define TH1520_DPU_SW_DPU_HRST BIT(0)
#define TH1520_DPU_SW_DPU_ARST BIT(1)
#define TH1520_DPU_SW_DPU_CRST BIT(2)
#define TH1520_DSI_SW_DSI_PRST BIT(0)
#define TH1520_HDMI_SW_MAIN_RST BIT(0)
#define TH1520_HDMI_SW_PRST BIT(1)
struct th1520_reset_priv {
struct reset_controller_dev rcdev;
@ -37,7 +47,35 @@ static const struct th1520_reset_map th1520_resets[] = {
[TH1520_RESET_ID_GPU_CLKGEN] = {
.bit = TH1520_GPU_SW_CLKGEN_RST,
.reg = TH1520_GPU_RST_CFG,
}
},
[TH1520_RESET_ID_DPU_AHB] = {
.bit = TH1520_DPU_SW_DPU_HRST,
.reg = TH1520_DPU_RST_CFG,
},
[TH1520_RESET_ID_DPU_AXI] = {
.bit = TH1520_DPU_SW_DPU_ARST,
.reg = TH1520_DPU_RST_CFG,
},
[TH1520_RESET_ID_DPU_CORE] = {
.bit = TH1520_DPU_SW_DPU_CRST,
.reg = TH1520_DPU_RST_CFG,
},
[TH1520_RESET_ID_DSI0_APB] = {
.bit = TH1520_DSI_SW_DSI_PRST,
.reg = TH1520_DSI0_RST_CFG,
},
[TH1520_RESET_ID_DSI1_APB] = {
.bit = TH1520_DSI_SW_DSI_PRST,
.reg = TH1520_DSI1_RST_CFG,
},
[TH1520_RESET_ID_HDMI] = {
.bit = TH1520_HDMI_SW_MAIN_RST,
.reg = TH1520_HDMI_RST_CFG,
},
[TH1520_RESET_ID_HDMI_APB] = {
.bit = TH1520_HDMI_SW_PRST,
.reg = TH1520_HDMI_RST_CFG,
},
};
static inline struct th1520_reset_priv *