dt-bindings: net: renesas,rzv2h-gbeth: Document Renesas RZ/G3L RMII{tx,rx} clocks

As per the RZ/G3L Hardware manual, CPG_CLKON_ETH register bits{12,13} are
to control the RMII{tx, rx} clocks. Document the rmii{tx.rx} clocks for
RZ/G3L SoC.

Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://patch.msgid.link/20260203104541.264759-1-biju.das.jz@bp.renesas.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Biju Das 2026-02-03 10:45:38 +00:00 committed by Jakub Kicinski
parent d713ed0f10
commit d2adcbdae5

View file

@ -58,6 +58,8 @@ properties:
- description: TX clock phase-shifted by 180 degrees
- description: RX clock phase-shifted by 180 degrees
- description: RMII clock
- description: RMII TX clock
- description: RMII RX clock
minItems: 7
@ -77,6 +79,8 @@ properties:
- const: tx-180
- const: rx-180
- const: rmii
- const: rmii_tx
- const: rmii_rx
minItems: 7
@ -170,10 +174,10 @@ allOf:
then:
properties:
clocks:
minItems: 8
minItems: 10
clock-names:
minItems: 8
minItems: 10
interrupts:
minItems: 15