dt-bindings: spi: dspi: Add S32G support

Document S32G compatible strings. 's32g2' and 's32g3' use the same
driver so 's32g2' must follow 's32g3'. The SPI controller supports
target mode when the "spi-slave" flag is used so add an example.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Ciprian Marian Costea <ciprianmarian.costea@nxp.com>
Signed-off-by: Larisa Grigore <larisa.grigore@nxp.com>
Signed-off-by: James Clark <james.clark@linaro.org>
Link: https://patch.msgid.link/20250522-james-nxp-spi-v2-12-bea884630cfb@linaro.org
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Ciprian Marian Costea 2025-05-22 15:51:41 +01:00 committed by Mark Brown
parent 0cb9ca1187
commit be47ecfecf
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@ -23,6 +23,7 @@ properties:
- fsl,ls2080a-dspi
- fsl,ls2085a-dspi
- fsl,lx2160a-dspi
- nxp,s32g2-dspi
- items:
- enum:
- fsl,ls1012a-dspi
@ -37,6 +38,9 @@ properties:
- items:
- const: fsl,lx2160a-dspi
- const: fsl,ls2085a-dspi
- items:
- const: nxp,s32g3-dspi
- const: nxp,s32g2-dspi
reg:
maxItems: 1
@ -114,3 +118,17 @@ examples:
spi-cs-hold-delay-ns = <50>;
};
};
# S32G3 in target mode
- |
spi@401d4000 {
compatible = "nxp,s32g3-dspi", "nxp,s32g2-dspi";
reg = <0x401d4000 0x1000>;
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks 26>;
clock-names = "dspi";
spi-num-chipselects = <8>;
bus-num = <0>;
dmas = <&edma0 0 7>, <&edma0 0 8>;
dma-names = "tx", "rx";
spi-slave;
};