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pinctrl: renesas: rzt2h: Move GPIO enable/disable into separate function

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GPIO is enabled or disabled in multiple places, simplify code by moving
this logic into a separate function.

Signed-off-by: Cosmin Tanislav <cosmin-gabriel.tanislav.xa@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://patch.msgid.link/20251205150234.2958140-2-cosmin-gabriel.tanislav.xa@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Cosmin Tanislav 2025-12-05 17:02:27 +02:00 • committed by Geert Uytterhoeven
parent 8f0b4cce44
commit ba4a92372b
1 changed files with 16 additions and 8 deletions
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24
drivers/pinctrl/renesas/pinctrl-rzt2h.c
View file

@ -119,6 +119,19 @@ static int rzt2h_validate_pin(struct rzt2h_pinctrl *pctrl, unsigned int offset)
return (pincfg & BIT(pin)) ? 0 : -EINVAL;
}
static void rzt2h_pinctrl_set_gpio_en(struct rzt2h_pinctrl *pctrl,
u8 port, u8 pin, bool en)
{
u8 reg = rzt2h_pinctrl_readb(pctrl, port, PMC(port));
if (en)
reg &= ~BIT(pin);
else
reg |= BIT(pin);
rzt2h_pinctrl_writeb(pctrl, port, reg, PMC(port));
}
static void rzt2h_pinctrl_set_pfc_mode(struct rzt2h_pinctrl *pctrl,
u8 port, u8 pin, u8 func)
{
@ -133,8 +146,7 @@ static void rzt2h_pinctrl_set_pfc_mode(struct rzt2h_pinctrl *pctrl,
rzt2h_pinctrl_writew(pctrl, port, reg16, PM(port));
/* Temporarily switch to GPIO mode with PMC register */
reg16 = rzt2h_pinctrl_readb(pctrl, port, PMC(port));
rzt2h_pinctrl_writeb(pctrl, port, reg16 & ~BIT(pin), PMC(port));
rzt2h_pinctrl_set_gpio_en(pctrl, port, pin, true);
/* Select Pin function mode with PFC register */
reg64 = rzt2h_pinctrl_readq(pctrl, port, PFC(port));
@ -142,8 +154,7 @@ static void rzt2h_pinctrl_set_pfc_mode(struct rzt2h_pinctrl *pctrl,
rzt2h_pinctrl_writeq(pctrl, port, reg64 | ((u64)func << (pin * 8)), PFC(port));
/* Switch to Peripheral pin function with PMC register */
reg16 = rzt2h_pinctrl_readb(pctrl, port, PMC(port));
rzt2h_pinctrl_writeb(pctrl, port, reg16 | BIT(pin), PMC(port));
rzt2h_pinctrl_set_gpio_en(pctrl, port, pin, false);
}
static int rzt2h_pinctrl_set_mux(struct pinctrl_dev *pctldev,
@ -447,7 +458,6 @@ static int rzt2h_gpio_request(struct gpio_chip *chip, unsigned int offset)
u8 port = RZT2H_PIN_ID_TO_PORT(offset);
u8 bit = RZT2H_PIN_ID_TO_PIN(offset);
int ret;
u8 reg;
ret = rzt2h_validate_pin(pctrl, offset);
if (ret)
@ -460,9 +470,7 @@ static int rzt2h_gpio_request(struct gpio_chip *chip, unsigned int offset)
guard(spinlock_irqsave)(&pctrl->lock);
/* Select GPIO mode in PMC Register */
reg = rzt2h_pinctrl_readb(pctrl, port, PMC(port));
reg &= ~BIT(bit);
rzt2h_pinctrl_writeb(pctrl, port, reg, PMC(port));
rzt2h_pinctrl_set_gpio_en(pctrl, port, bit, true);
return 0;
}