mirror of
https://github.com/torvalds/linux.git
synced 2026-03-08 01:04:41 +01:00
ARC: Always use SWAPE instructions for __arch_swab32()
Since commit 67a697e7576 ("ARC: retire ARC750 support") all supported
CPUs have the 'swape' instruction.
Always use the implementation of __arch_swabe() which uses 'swape'.
ARCH_USE_BUILTIN_BSWAP can not be used as that results on libcalls on
-mcpu=arc700.
As as side-effect, remove a leak of an internal kconfig symbol through
the UAPI headers.
Suggested-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/lkml/0ae2688a-5a22-405b-adaf-9b5ad712b245@app.fastmail.com/
Suggested-by: Vineet Gupta <vgupta@kernel.org>
Link: https://lore.kernel.org/lkml/a033a402-e3c5-4982-9fff-b6a4c55817ae@kernel.org/
Signed-off-by: Thomas Weißschuh <thomas.weissschuh@linutronix.de>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
parent
eed444d025
commit
b4171fd0b0
4 changed files with 1 additions and 71 deletions
|
|
@ -121,7 +121,6 @@ choice
|
|||
config ARC_CPU_770
|
||||
bool "ARC770"
|
||||
depends on ISA_ARCOMPACT
|
||||
select ARC_HAS_SWAPE
|
||||
help
|
||||
Support for ARC770 core introduced with Rel 4.10 (Summer 2011)
|
||||
This core has a bunch of cool new features:
|
||||
|
|
@ -340,10 +339,6 @@ config ARC_HAS_LLSC
|
|||
default y
|
||||
depends on !ARC_CANT_LLSC
|
||||
|
||||
config ARC_HAS_SWAPE
|
||||
bool "Insn: SWAPE (endian-swap)"
|
||||
default y
|
||||
|
||||
if ISA_ARCV2
|
||||
|
||||
config ARC_USE_UNALIGNED_MEM_ACCESS
|
||||
|
|
|
|||
|
|
@ -9,7 +9,7 @@ ifeq ($(CROSS_COMPILE),)
|
|||
CROSS_COMPILE := $(call cc-cross-prefix, arc-linux- arceb-linux- arc-linux-gnu-)
|
||||
endif
|
||||
|
||||
cflags-y += -fno-common -pipe -fno-builtin -mmedium-calls -D__linux__
|
||||
cflags-y += -fno-common -pipe -fno-builtin -mmedium-calls -mswape -D__linux__
|
||||
|
||||
tune-mcpu-def-$(CONFIG_ISA_ARCOMPACT) := -mcpu=arc700
|
||||
tune-mcpu-def-$(CONFIG_ISA_ARCV2) := -mcpu=hs38
|
||||
|
|
@ -41,7 +41,6 @@ endif
|
|||
cflags-y += -fsection-anchors
|
||||
|
||||
cflags-$(CONFIG_ARC_HAS_LLSC) += -mlock
|
||||
cflags-$(CONFIG_ARC_HAS_SWAPE) += -mswape
|
||||
|
||||
ifdef CONFIG_ISA_ARCV2
|
||||
|
||||
|
|
|
|||
|
|
@ -19,9 +19,6 @@
|
|||
|
||||
#include <linux/types.h>
|
||||
|
||||
/* Native single cycle endian swap insn */
|
||||
#ifdef CONFIG_ARC_HAS_SWAPE
|
||||
|
||||
#define __arch_swab32(x) \
|
||||
({ \
|
||||
unsigned int tmp = x; \
|
||||
|
|
@ -32,66 +29,6 @@
|
|||
tmp; \
|
||||
})
|
||||
|
||||
#else
|
||||
|
||||
/* Several ways of Endian-Swap Emulation for ARC
|
||||
* 0: kernel generic
|
||||
* 1: ARC optimised "C"
|
||||
* 2: ARC Custom instruction
|
||||
*/
|
||||
#define ARC_BSWAP_TYPE 1
|
||||
|
||||
#if (ARC_BSWAP_TYPE == 1) /******* Software only ********/
|
||||
|
||||
/* The kernel default implementation of htonl is
|
||||
* return x<<24 | x>>24 |
|
||||
* (x & (__u32)0x0000ff00UL)<<8 | (x & (__u32)0x00ff0000UL)>>8;
|
||||
*
|
||||
* This generates 9 instructions on ARC (excluding the ld/st)
|
||||
*
|
||||
* 8051fd8c: ld r3,[r7,20] ; Mem op : Get the value to be swapped
|
||||
* 8051fd98: asl r5,r3,24 ; get 3rd Byte
|
||||
* 8051fd9c: lsr r2,r3,24 ; get 0th Byte
|
||||
* 8051fda0: and r4,r3,0xff00
|
||||
* 8051fda8: asl r4,r4,8 ; get 1st Byte
|
||||
* 8051fdac: and r3,r3,0x00ff0000
|
||||
* 8051fdb4: or r2,r2,r5 ; combine 0th and 3rd Bytes
|
||||
* 8051fdb8: lsr r3,r3,8 ; 2nd Byte at correct place in Dst Reg
|
||||
* 8051fdbc: or r2,r2,r4 ; combine 0,3 Bytes with 1st Byte
|
||||
* 8051fdc0: or r2,r2,r3 ; combine 0,3,1 Bytes with 2nd Byte
|
||||
* 8051fdc4: st r2,[r1,20] ; Mem op : save result back to mem
|
||||
*
|
||||
* Joern suggested a better "C" algorithm which is great since
|
||||
* (1) It is portable to any architecture
|
||||
* (2) At the same time it takes advantage of ARC ISA (rotate intrns)
|
||||
*/
|
||||
|
||||
#define __arch_swab32(x) \
|
||||
({ unsigned long __in = (x), __tmp; \
|
||||
__tmp = __in << 8 | __in >> 24; /* ror tmp,in,24 */ \
|
||||
__in = __in << 24 | __in >> 8; /* ror in,in,8 */ \
|
||||
__tmp ^= __in; \
|
||||
__tmp &= 0xff00ff; \
|
||||
__tmp ^ __in; \
|
||||
})
|
||||
|
||||
#elif (ARC_BSWAP_TYPE == 2) /* Custom single cycle bswap instruction */
|
||||
|
||||
#define __arch_swab32(x) \
|
||||
({ \
|
||||
unsigned int tmp = x; \
|
||||
__asm__( \
|
||||
" .extInstruction bswap, 7, 0x00, SUFFIX_NONE, SYNTAX_2OP \n"\
|
||||
" bswap %0, %1 \n"\
|
||||
: "=r" (tmp) \
|
||||
: "r" (tmp)); \
|
||||
tmp; \
|
||||
})
|
||||
|
||||
#endif /* ARC_BSWAP_TYPE=zzz */
|
||||
|
||||
#endif /* CONFIG_ARC_HAS_SWAPE */
|
||||
|
||||
#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
|
||||
#define __SWAB_64_THRU_32__
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -70,7 +70,6 @@ configs=$(sed -e '
|
|||
#
|
||||
# The format is <file-name>:<CONFIG-option> in each line.
|
||||
config_leak_ignores="
|
||||
arch/arc/include/uapi/asm/swab.h:CONFIG_ARC_HAS_SWAPE
|
||||
arch/arm/include/uapi/asm/ptrace.h:CONFIG_CPU_ENDIAN_BE8
|
||||
arch/nios2/include/uapi/asm/swab.h:CONFIG_NIOS2_CI_SWAB_NO
|
||||
arch/nios2/include/uapi/asm/swab.h:CONFIG_NIOS2_CI_SWAB_SUPPORT
|
||||
|
|
|
|||
Loading…
Add table
Add a link
Reference in a new issue