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riscv: mm: Add support for Svinval extension
The Svinval extension splits SFENCE.VMA instruction into finer-grained invalidation and ordering operations and is mandatory for RVA23S64 profile. When Svinval is enabled the local_flush_tlb_range_threshold_asid function should use the following sequence to optimize the tlb flushes instead of a simple sfence.vma: sfence.w.inval svinval.vma . . svinval.vma sfence.inval.ir The maximum number of consecutive svinval.vma instructions that can be executed in local_flush_tlb_range_threshold_asid function is limited to 64. This is required to avoid soft lockups and the approach is similar to that used in arm64. Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Alexandre Ghiti <alexghiti@rivosinc.com> Link: https://lore.kernel.org/r/20240702102637.9074-1-mchitale@ventanamicro.com Signed-off-by: Alexandre Ghiti <alexghiti@rivosinc.com> Signed-off-by: Palmer Dabbelt <palmer@dabbelt.com>
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1 changed files with 31 additions and 0 deletions
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@ -7,6 +7,27 @@
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#include <linux/mmu_notifier.h>
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#include <asm/sbi.h>
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#include <asm/mmu_context.h>
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#include <asm/cpufeature.h>
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#define has_svinval() riscv_has_extension_unlikely(RISCV_ISA_EXT_SVINVAL)
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static inline void local_sfence_inval_ir(void)
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{
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asm volatile(SFENCE_INVAL_IR() ::: "memory");
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}
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static inline void local_sfence_w_inval(void)
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{
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asm volatile(SFENCE_W_INVAL() ::: "memory");
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}
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static inline void local_sinval_vma(unsigned long vma, unsigned long asid)
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{
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if (asid != FLUSH_TLB_NO_ASID)
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asm volatile(SINVAL_VMA(%0, %1) : : "r" (vma), "r" (asid) : "memory");
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else
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asm volatile(SINVAL_VMA(%0, zero) : : "r" (vma) : "memory");
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}
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/*
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* Flush entire TLB if number of entries to be flushed is greater
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@ -27,6 +48,16 @@ static void local_flush_tlb_range_threshold_asid(unsigned long start,
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return;
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}
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if (has_svinval()) {
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local_sfence_w_inval();
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for (i = 0; i < nr_ptes_in_range; ++i) {
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local_sinval_vma(start, asid);
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start += stride;
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}
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local_sfence_inval_ir();
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return;
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}
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for (i = 0; i < nr_ptes_in_range; ++i) {
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local_flush_tlb_page_asid(start, asid);
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start += stride;
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