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PCI: imx6: Use DWC common suspend resume method
Call common DWC suspend/resume function. Use DWC common iATU method to
send out PME_TURN_OFF message.
In old DWC implementations, PCIE_ATU_INHIBIT_PAYLOAD in iATU Ctrl2 register
is reserved, so the generic DWC implementation of sending the PME_Turn_Off
message using a dummy MMIO write cannot be used. Use the previous method to
kick off PME_TURN_OFF message for these platforms.
The System Reset Control (SRC) interface is used to toggle 'turnoff_reset'
to send PME_TURN_OFF and since the DWC implementation is used, it is not
needed now.
Replace the imx_pcie_stop_link() and imx_pcie_host_exit() by
dw_pcie_suspend_noirq() in imx_pcie_suspend_noirq().
Since dw_pcie_suspend_noirq() already does these, see below call stack:
dw_pcie_suspend_noirq()
dw_pcie_stop_link()
imx_pcie_stop_link()
pci->pp.ops->deinit()
imx_pcie_host_exit()
Replace the imx_pcie_host_init(), dw_pcie_setup_rc() and
imx_pcie_start_link() by dw_pcie_resume_noirq() in imx_pcie_resume_noirq().
Since dw_pcie_resume_noirq() already does these, see below call stack:
dw_pcie_resume_noirq()
pci->pp.ops->init()
imx_pcie_host_init()
dw_pcie_setup_rc()
dw_pcie_start_link()
imx_pcie_start_link(;
Link: https://lore.kernel.org/r/20241126075702.4099164-9-hongxing.zhu@nxp.com
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
This commit is contained in:
Frank Li
Bjorn Helgaas
parent
ec57335b81
commit
a528d1a725
1 changed files with 35 additions and 61 deletions
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@ -33,6 +33,7 @@
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#include <linux/pm_domain.h>
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#include <linux/pm_runtime.h>
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#include "../../pci.h"
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#include "pcie-designware.h"
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#define IMX8MQ_GPR_PCIE_REF_USE_PAD BIT(9)
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@ -111,19 +112,18 @@ struct imx_pcie_drvdata {
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int (*init_phy)(struct imx_pcie *pcie);
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int (*enable_ref_clk)(struct imx_pcie *pcie, bool enable);
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int (*core_reset)(struct imx_pcie *pcie, bool assert);
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const struct dw_pcie_host_ops *ops;
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};
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struct imx_pcie {
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struct dw_pcie *pci;
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struct gpio_desc *reset_gpiod;
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bool link_is_up;
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struct clk_bulk_data clks[IMX_PCIE_MAX_CLKS];
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struct regmap *iomuxc_gpr;
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u16 msi_ctrl;
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u32 controller_id;
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struct reset_control *pciephy_reset;
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struct reset_control *apps_reset;
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struct reset_control *turnoff_reset;
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u32 tx_deemph_gen1;
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u32 tx_deemph_gen2_3p5db;
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u32 tx_deemph_gen2_6db;
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@ -908,13 +908,11 @@ static int imx_pcie_start_link(struct dw_pcie *pci)
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dev_info(dev, "Link: Only Gen1 is enabled\n");
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}
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imx_pcie->link_is_up = true;
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tmp = dw_pcie_readw_dbi(pci, offset + PCI_EXP_LNKSTA);
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dev_info(dev, "Link up, Gen%i\n", tmp & PCI_EXP_LNKSTA_CLS);
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return 0;
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err_reset_phy:
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imx_pcie->link_is_up = false;
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dev_dbg(dev, "PHY DEBUG_R0=0x%08x DEBUG_R1=0x%08x\n",
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dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG0),
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dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG1));
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@ -1033,9 +1031,31 @@ static u64 imx_pcie_cpu_addr_fixup(struct dw_pcie *pcie, u64 cpu_addr)
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return cpu_addr - entry->offset;
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}
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/*
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* In old DWC implementations, PCIE_ATU_INHIBIT_PAYLOAD in iATU Ctrl2
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* register is reserved, so the generic DWC implementation of sending the
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* PME_Turn_Off message using a dummy MMIO write cannot be used.
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*/
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static void imx_pcie_pme_turn_off(struct dw_pcie_rp *pp)
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{
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struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
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struct imx_pcie *imx_pcie = to_imx_pcie(pci);
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regmap_set_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR12, IMX6SX_GPR12_PCIE_PM_TURN_OFF);
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regmap_clear_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR12, IMX6SX_GPR12_PCIE_PM_TURN_OFF);
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usleep_range(PCIE_PME_TO_L2_TIMEOUT_US/10, PCIE_PME_TO_L2_TIMEOUT_US);
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}
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static const struct dw_pcie_host_ops imx_pcie_host_ops = {
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.init = imx_pcie_host_init,
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.deinit = imx_pcie_host_exit,
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.pme_turn_off = imx_pcie_pme_turn_off,
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};
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static const struct dw_pcie_host_ops imx_pcie_host_dw_pme_ops = {
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.init = imx_pcie_host_init,
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.deinit = imx_pcie_host_exit,
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};
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static const struct dw_pcie_ops dw_pcie_ops = {
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@ -1176,43 +1196,6 @@ static int imx_add_pcie_ep(struct imx_pcie *imx_pcie,
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return 0;
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}
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static void imx_pcie_pm_turnoff(struct imx_pcie *imx_pcie)
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{
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struct device *dev = imx_pcie->pci->dev;
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/* Some variants have a turnoff reset in DT */
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if (imx_pcie->turnoff_reset) {
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reset_control_assert(imx_pcie->turnoff_reset);
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reset_control_deassert(imx_pcie->turnoff_reset);
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goto pm_turnoff_sleep;
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}
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/* Others poke directly at IOMUXC registers */
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switch (imx_pcie->drvdata->variant) {
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case IMX6SX:
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case IMX6QP:
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regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR12,
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IMX6SX_GPR12_PCIE_PM_TURN_OFF,
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IMX6SX_GPR12_PCIE_PM_TURN_OFF);
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regmap_update_bits(imx_pcie->iomuxc_gpr, IOMUXC_GPR12,
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IMX6SX_GPR12_PCIE_PM_TURN_OFF, 0);
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break;
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default:
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dev_err(dev, "PME_Turn_Off not implemented\n");
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return;
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}
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/*
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* Components with an upstream port must respond to
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* PME_Turn_Off with PME_TO_Ack but we can't check.
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*
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* The standard recommends a 1-10ms timeout after which to
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* proceed anyway as if acks were received.
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*/
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pm_turnoff_sleep:
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usleep_range(1000, 10000);
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}
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static void imx_pcie_msi_save_restore(struct imx_pcie *imx_pcie, bool save)
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{
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u8 offset;
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@ -1236,7 +1219,6 @@ static void imx_pcie_msi_save_restore(struct imx_pcie *imx_pcie, bool save)
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static int imx_pcie_suspend_noirq(struct device *dev)
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{
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struct imx_pcie *imx_pcie = dev_get_drvdata(dev);
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struct dw_pcie_rp *pp = &imx_pcie->pci->pp;
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if (!(imx_pcie->drvdata->flags & IMX_PCIE_FLAG_SUPPORTS_SUSPEND))
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return 0;
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@ -1251,9 +1233,7 @@ static int imx_pcie_suspend_noirq(struct device *dev)
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imx_pcie_assert_core_reset(imx_pcie);
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imx_pcie->drvdata->enable_ref_clk(imx_pcie, false);
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} else {
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imx_pcie_pm_turnoff(imx_pcie);
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imx_pcie_stop_link(imx_pcie->pci);
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imx_pcie_host_exit(pp);
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return dw_pcie_suspend_noirq(imx_pcie->pci);
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}
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return 0;
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@ -1263,7 +1243,6 @@ static int imx_pcie_resume_noirq(struct device *dev)
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{
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int ret;
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struct imx_pcie *imx_pcie = dev_get_drvdata(dev);
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struct dw_pcie_rp *pp = &imx_pcie->pci->pp;
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if (!(imx_pcie->drvdata->flags & IMX_PCIE_FLAG_SUPPORTS_SUSPEND))
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return 0;
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@ -1283,17 +1262,12 @@ static int imx_pcie_resume_noirq(struct device *dev)
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ret = dw_pcie_setup_rc(&imx_pcie->pci->pp);
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if (ret)
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return ret;
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imx_pcie_msi_save_restore(imx_pcie, false);
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} else {
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ret = imx_pcie_host_init(pp);
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ret = dw_pcie_resume_noirq(imx_pcie->pci);
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if (ret)
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return ret;
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imx_pcie_msi_save_restore(imx_pcie, false);
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dw_pcie_setup_rc(pp);
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if (imx_pcie->link_is_up)
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imx_pcie_start_link(imx_pcie->pci);
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}
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imx_pcie_msi_save_restore(imx_pcie, false);
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return 0;
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}
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@ -1325,11 +1299,15 @@ static int imx_pcie_probe(struct platform_device *pdev)
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pci->dev = dev;
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pci->ops = &dw_pcie_ops;
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pci->pp.ops = &imx_pcie_host_ops;
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imx_pcie->pci = pci;
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imx_pcie->drvdata = of_device_get_match_data(dev);
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if (imx_pcie->drvdata->ops)
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pci->pp.ops = imx_pcie->drvdata->ops;
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else
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pci->pp.ops = &imx_pcie_host_dw_pme_ops;
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/* Find the PHY if one is defined, only imx7d uses it */
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np = of_parse_phandle(node, "fsl,imx7d-pcie-phy", 0);
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if (np) {
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@ -1399,13 +1377,6 @@ static int imx_pcie_probe(struct platform_device *pdev)
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break;
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}
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/* Grab turnoff reset */
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imx_pcie->turnoff_reset = devm_reset_control_get_optional_exclusive(dev, "turnoff");
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if (IS_ERR(imx_pcie->turnoff_reset)) {
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dev_err(dev, "Failed to get TURNOFF reset control\n");
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return PTR_ERR(imx_pcie->turnoff_reset);
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}
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if (imx_pcie->drvdata->gpr) {
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/* Grab GPR config register range */
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imx_pcie->iomuxc_gpr =
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@ -1484,6 +1455,7 @@ static int imx_pcie_probe(struct platform_device *pdev)
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if (ret < 0)
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return ret;
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} else {
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pci->pp.use_atu_msg = true;
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ret = dw_pcie_host_init(&pci->pp);
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if (ret < 0)
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return ret;
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@ -1548,6 +1520,7 @@ static const struct imx_pcie_drvdata drvdata[] = {
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.init_phy = imx6sx_pcie_init_phy,
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.enable_ref_clk = imx6sx_pcie_enable_ref_clk,
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.core_reset = imx6sx_pcie_core_reset,
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.ops = &imx_pcie_host_ops,
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},
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[IMX6QP] = {
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.variant = IMX6QP,
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@ -1565,6 +1538,7 @@ static const struct imx_pcie_drvdata drvdata[] = {
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.init_phy = imx_pcie_init_phy,
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.enable_ref_clk = imx6q_pcie_enable_ref_clk,
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.core_reset = imx6qp_pcie_core_reset,
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.ops = &imx_pcie_host_ops,
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},
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[IMX7D] = {
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.variant = IMX7D,
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