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dt-bindings: interrupt-controller: Convert al,alpine-msix to DT schema
Convert the Amazaon Alpine MSIX controller binding to schema format. Drop the interrupt-controller property as the MSIX controller doesn't provide interrupts. The interrupt-parent property is required in this case for custom MSI mapping properties. Link: https://lore.kernel.org/r/20250505144543.1286351-1-robh@kernel.org Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
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2 changed files with 49 additions and 25 deletions
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Alpine MSIX controller
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See arm,gic-v3.txt for SPI and MSI definitions.
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Required properties:
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- compatible: should be "al,alpine-msix"
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- reg: physical base address and size of the registers
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- interrupt-controller: identifies the node as an interrupt controller
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- msi-controller: identifies the node as an PCI Message Signaled Interrupt
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controller
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- al,msi-base-spi: SPI base of the MSI frame
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- al,msi-num-spis: number of SPIs assigned to the MSI frame, relative to SPI0
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Example:
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msix: msix {
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compatible = "al,alpine-msix";
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reg = <0x0 0xfbe00000 0x0 0x100000>;
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interrupt-parent = <&gic>;
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interrupt-controller;
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msi-controller;
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al,msi-base-spi = <160>;
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al,msi-num-spis = <160>;
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};
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/interrupt-controller/al,alpine-msix.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Alpine MSIX controller
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maintainers:
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- Antoine Tenart <atenart@kernel.org>
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properties:
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compatible:
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const: al,alpine-msix
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reg:
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maxItems: 1
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interrupt-parent: true
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msi-controller: true
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al,msi-base-spi:
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description: SPI base of the MSI frame
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$ref: /schemas/types.yaml#/definitions/uint32
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al,msi-num-spis:
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description: number of SPIs assigned to the MSI frame, relative to SPI0
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$ref: /schemas/types.yaml#/definitions/uint32
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required:
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- compatible
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- reg
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- msi-controller
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- al,msi-base-spi
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- al,msi-num-spis
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additionalProperties: false
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examples:
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- |
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msi-controller@fbe00000 {
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compatible = "al,alpine-msix";
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reg = <0xfbe00000 0x100000>;
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interrupt-parent = <&gic>;
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msi-controller;
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al,msi-base-spi = <160>;
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al,msi-num-spis = <160>;
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};
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