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irqchip/riscv-aplic: Preserve APLIC states across suspend/resume
The APLIC states might be reset when the platform enters a low power state, but the register states are not being preserved and restored, which prevents interrupt delivery after the platform resumes. Solve this by adding a syscore ops and a power management notifier to preserve and restore the APLIC states on suspend and resume. [ tglx: Folded the build fix provided by Geert ] Signed-off-by: Nick Hu <nick.hu@sifive.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Yong-Xuan Wang <yongxuan.wang@sifive.com> Reviewed-by: Cyan Yang <cyan.yang@sifive.com> Reviewed-by: Nutty Liu <liujingqi@lanxincomputing.com> Reviewed-by: Anup Patel <anup@brainfault.org> Link: https://patch.msgid.link/20251202-preserve-aplic-imsic-v3-2-1844fbf1fe92@sifive.com
This commit is contained in:
Nick Hu
Thomas Gleixner
parent
f48b4bd091
commit
95a8ddde36
3 changed files with 198 additions and 1 deletions
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@ -8,6 +8,7 @@
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#include <linux/bitfield.h>
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#include <linux/bitops.h>
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#include <linux/cpu.h>
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#include <linux/cpumask.h>
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#include <linux/interrupt.h>
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#include <linux/irqchip.h>
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#include <linux/irqchip/chained_irq.h>
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@ -171,6 +172,15 @@ static void aplic_idc_set_delivery(struct aplic_idc *idc, bool en)
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writel(de, idc->regs + APLIC_IDC_IDELIVERY);
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}
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void aplic_direct_restore_states(struct aplic_priv *priv)
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{
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struct aplic_direct *direct = container_of(priv, struct aplic_direct, priv);
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int cpu;
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for_each_cpu(cpu, &direct->lmask)
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aplic_idc_set_delivery(per_cpu_ptr(&aplic_idcs, cpu), true);
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}
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static int aplic_direct_dying_cpu(unsigned int cpu)
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{
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if (aplic_direct_parent_irq)
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@ -12,10 +12,169 @@
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#include <linux/of.h>
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#include <linux/of_irq.h>
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#include <linux/platform_device.h>
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#include <linux/pm_domain.h>
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#include <linux/pm_runtime.h>
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#include <linux/printk.h>
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#include <linux/syscore_ops.h>
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#include "irq-riscv-aplic-main.h"
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static LIST_HEAD(aplics);
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static void aplic_restore_states(struct aplic_priv *priv)
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{
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struct aplic_saved_regs *saved_regs = &priv->saved_hw_regs;
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struct aplic_src_ctrl *srcs;
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void __iomem *regs;
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u32 nr_irqs, i;
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regs = priv->regs;
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writel(saved_regs->domaincfg, regs + APLIC_DOMAINCFG);
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#ifdef CONFIG_RISCV_M_MODE
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writel(saved_regs->msiaddr, regs + APLIC_xMSICFGADDR);
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writel(saved_regs->msiaddrh, regs + APLIC_xMSICFGADDRH);
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#endif
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/*
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* The sourcecfg[i] has to be restored prior to the target[i], interrupt-pending and
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* interrupt-enable bits. The AIA specification states that "Whenever interrupt source i is
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* inactive in an interrupt domain, the corresponding interrupt-pending and interrupt-enable
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* bits within the domain are read-only zeros, and register target[i] is also read-only
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* zero."
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*/
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nr_irqs = priv->nr_irqs;
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for (i = 0; i < nr_irqs; i++) {
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srcs = &priv->saved_hw_regs.srcs[i];
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writel(srcs->sourcecfg, regs + APLIC_SOURCECFG_BASE + i * sizeof(u32));
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writel(srcs->target, regs + APLIC_TARGET_BASE + i * sizeof(u32));
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}
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for (i = 0; i <= nr_irqs; i += 32) {
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srcs = &priv->saved_hw_regs.srcs[i];
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writel(-1U, regs + APLIC_CLRIE_BASE + (i / 32) * sizeof(u32));
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writel(srcs->ie, regs + APLIC_SETIE_BASE + (i / 32) * sizeof(u32));
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/* Re-trigger the interrupts if it forwards interrupts to target harts by MSIs */
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if (!priv->nr_idcs)
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writel(readl(regs + APLIC_CLRIP_BASE + (i / 32) * sizeof(u32)),
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regs + APLIC_SETIP_BASE + (i / 32) * sizeof(u32));
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}
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if (priv->nr_idcs)
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aplic_direct_restore_states(priv);
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}
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static void aplic_save_states(struct aplic_priv *priv)
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{
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struct aplic_src_ctrl *srcs;
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void __iomem *regs;
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u32 i, nr_irqs;
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regs = priv->regs;
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nr_irqs = priv->nr_irqs;
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/* The valid interrupt source IDs range from 1 to N, where N is priv->nr_irqs */
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for (i = 0; i < nr_irqs; i++) {
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srcs = &priv->saved_hw_regs.srcs[i];
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srcs->target = readl(regs + APLIC_TARGET_BASE + i * sizeof(u32));
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if (i % 32)
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continue;
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srcs->ie = readl(regs + APLIC_SETIE_BASE + (i / 32) * sizeof(u32));
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}
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/* Save the nr_irqs bit if needed */
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if (!(nr_irqs % 32)) {
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srcs = &priv->saved_hw_regs.srcs[nr_irqs];
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srcs->ie = readl(regs + APLIC_SETIE_BASE + (nr_irqs / 32) * sizeof(u32));
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}
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}
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static int aplic_syscore_suspend(void *data)
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{
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struct aplic_priv *priv;
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list_for_each_entry(priv, &aplics, head)
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aplic_save_states(priv);
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return 0;
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}
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static void aplic_syscore_resume(void *data)
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{
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struct aplic_priv *priv;
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list_for_each_entry(priv, &aplics, head)
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aplic_restore_states(priv);
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}
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static struct syscore_ops aplic_syscore_ops = {
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.suspend = aplic_syscore_suspend,
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.resume = aplic_syscore_resume,
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};
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static struct syscore aplic_syscore = {
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.ops = &aplic_syscore_ops,
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};
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static int aplic_pm_notifier(struct notifier_block *nb, unsigned long action, void *data)
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{
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struct aplic_priv *priv = container_of(nb, struct aplic_priv, genpd_nb);
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switch (action) {
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case GENPD_NOTIFY_PRE_OFF:
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aplic_save_states(priv);
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break;
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case GENPD_NOTIFY_ON:
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aplic_restore_states(priv);
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break;
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default:
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break;
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}
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return 0;
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}
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static void aplic_pm_remove(void *data)
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{
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struct aplic_priv *priv = data;
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struct device *dev = priv->dev;
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list_del(&priv->head);
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if (dev->pm_domain)
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dev_pm_genpd_remove_notifier(dev);
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}
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static int aplic_pm_add(struct device *dev, struct aplic_priv *priv)
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{
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struct aplic_src_ctrl *srcs;
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int ret;
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srcs = devm_kzalloc(dev, (priv->nr_irqs + 1) * sizeof(*srcs), GFP_KERNEL);
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if (!srcs)
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return -ENOMEM;
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priv->saved_hw_regs.srcs = srcs;
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list_add(&priv->head, &aplics);
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if (dev->pm_domain) {
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priv->genpd_nb.notifier_call = aplic_pm_notifier;
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ret = dev_pm_genpd_add_notifier(dev, &priv->genpd_nb);
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if (ret)
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goto remove_head;
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ret = devm_pm_runtime_enable(dev);
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if (ret)
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goto remove_notifier;
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}
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return devm_add_action_or_reset(dev, aplic_pm_remove, priv);
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remove_notifier:
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dev_pm_genpd_remove_notifier(dev);
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remove_head:
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list_del(&priv->head);
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return ret;
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}
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void aplic_irq_unmask(struct irq_data *d)
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{
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struct aplic_priv *priv = irq_data_get_irq_chip_data(d);
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@ -60,6 +219,8 @@ int aplic_irq_set_type(struct irq_data *d, unsigned int type)
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sourcecfg += (d->hwirq - 1) * sizeof(u32);
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writel(val, sourcecfg);
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priv->saved_hw_regs.srcs[d->hwirq - 1].sourcecfg = val;
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return 0;
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}
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@ -82,6 +243,7 @@ int aplic_irqdomain_translate(struct irq_fwspec *fwspec, u32 gsi_base,
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void aplic_init_hw_global(struct aplic_priv *priv, bool msi_mode)
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{
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struct aplic_saved_regs *saved_regs = &priv->saved_hw_regs;
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u32 val;
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#ifdef CONFIG_RISCV_M_MODE
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u32 valh;
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@ -95,6 +257,8 @@ void aplic_init_hw_global(struct aplic_priv *priv, bool msi_mode)
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valh |= FIELD_PREP(APLIC_xMSICFGADDRH_HHXS, priv->msicfg.hhxs);
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writel(val, priv->regs + APLIC_xMSICFGADDR);
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writel(valh, priv->regs + APLIC_xMSICFGADDRH);
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saved_regs->msiaddr = val;
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saved_regs->msiaddrh = valh;
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}
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#endif
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@ -106,6 +270,8 @@ void aplic_init_hw_global(struct aplic_priv *priv, bool msi_mode)
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writel(val, priv->regs + APLIC_DOMAINCFG);
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if (readl(priv->regs + APLIC_DOMAINCFG) != val)
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dev_warn(priv->dev, "unable to write 0x%x in domaincfg\n", val);
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saved_regs->domaincfg = val;
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}
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static void aplic_init_hw_irqs(struct aplic_priv *priv)
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@ -176,7 +342,7 @@ int aplic_setup_priv(struct aplic_priv *priv, struct device *dev, void __iomem *
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/* Setup initial state APLIC interrupts */
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aplic_init_hw_irqs(priv);
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return 0;
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return aplic_pm_add(dev, priv);
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}
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static int aplic_probe(struct platform_device *pdev)
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@ -209,6 +375,8 @@ static int aplic_probe(struct platform_device *pdev)
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if (rc)
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dev_err_probe(dev, rc, "failed to setup APLIC in %s mode\n",
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msi_mode ? "MSI" : "direct");
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else
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register_syscore(&aplic_syscore);
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#ifdef CONFIG_ACPI
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if (!acpi_disabled)
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@ -23,7 +23,25 @@ struct aplic_msicfg {
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u32 lhxw;
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};
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struct aplic_src_ctrl {
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u32 sourcecfg;
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u32 target;
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u32 ie;
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};
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struct aplic_saved_regs {
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u32 domaincfg;
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#ifdef CONFIG_RISCV_M_MODE
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u32 msiaddr;
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u32 msiaddrh;
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#endif
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struct aplic_src_ctrl *srcs;
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};
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struct aplic_priv {
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struct list_head head;
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struct notifier_block genpd_nb;
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struct aplic_saved_regs saved_hw_regs;
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struct device *dev;
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u32 gsi_base;
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u32 nr_irqs;
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@ -40,6 +58,7 @@ int aplic_irqdomain_translate(struct irq_fwspec *fwspec, u32 gsi_base,
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unsigned long *hwirq, unsigned int *type);
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void aplic_init_hw_global(struct aplic_priv *priv, bool msi_mode);
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int aplic_setup_priv(struct aplic_priv *priv, struct device *dev, void __iomem *regs);
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void aplic_direct_restore_states(struct aplic_priv *priv);
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int aplic_direct_setup(struct device *dev, void __iomem *regs);
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#ifdef CONFIG_RISCV_APLIC_MSI
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int aplic_msi_setup(struct device *dev, void __iomem *regs);
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