ASoC: tegra: set reg_default_cb callback

Set reg_default_cb so REGCACHE_FLAT can supply zero defaults without
large reg_defaults tables, simplifying cache initialization for
zero-reset registers.

Signed-off-by: Sheetal <sheetal@nvidia.com>
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Link: https://patch.msgid.link/20260123095346.1258556-4-sheetal@nvidia.com
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Sheetal 2026-01-23 15:23:45 +05:30 committed by Mark Brown
parent 0ba6286a71
commit 9409d18bf7
No known key found for this signature in database
GPG key ID: 24D68B725D5487D0
14 changed files with 22 additions and 0 deletions

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@ -950,6 +950,7 @@ static const struct regmap_config tegra186_asrc_regmap_config = {
.volatile_reg = tegra186_asrc_volatile_reg,
.reg_defaults = tegra186_asrc_reg_defaults,
.num_reg_defaults = ARRAY_SIZE(tegra186_asrc_reg_defaults),
.reg_default_cb = regmap_default_zero_cb,
.cache_type = REGCACHE_FLAT,
};

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@ -467,6 +467,7 @@ static const struct regmap_config tegra186_dspk_regmap = {
.volatile_reg = tegra186_dspk_volatile_reg,
.reg_defaults = tegra186_dspk_reg_defaults,
.num_reg_defaults = ARRAY_SIZE(tegra186_dspk_reg_defaults),
.reg_default_cb = regmap_default_zero_cb,
.cache_type = REGCACHE_FLAT,
};

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@ -241,6 +241,7 @@ static const struct regmap_config tegra210_admaif_regmap_config = {
.volatile_reg = tegra_admaif_volatile_reg,
.reg_defaults = tegra210_admaif_reg_defaults,
.num_reg_defaults = TEGRA210_ADMAIF_CHANNEL_COUNT * 6 + 1,
.reg_default_cb = regmap_default_zero_cb,
.cache_type = REGCACHE_FLAT,
};
@ -254,6 +255,7 @@ static const struct regmap_config tegra186_admaif_regmap_config = {
.volatile_reg = tegra_admaif_volatile_reg,
.reg_defaults = tegra186_admaif_reg_defaults,
.num_reg_defaults = TEGRA186_ADMAIF_CHANNEL_COUNT * 6 + 1,
.reg_default_cb = regmap_default_zero_cb,
.cache_type = REGCACHE_FLAT,
};
@ -267,6 +269,7 @@ static const struct regmap_config tegra264_admaif_regmap_config = {
.volatile_reg = tegra_admaif_volatile_reg,
.reg_defaults = tegra264_admaif_reg_defaults,
.num_reg_defaults = TEGRA264_ADMAIF_CHANNEL_COUNT * 6 + 1,
.reg_default_cb = regmap_default_zero_cb,
.cache_type = REGCACHE_FLAT,
};

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@ -625,6 +625,7 @@ static const struct regmap_config tegra210_adx_regmap_config = {
.volatile_reg = tegra210_adx_volatile_reg,
.reg_defaults = tegra210_adx_reg_defaults,
.num_reg_defaults = ARRAY_SIZE(tegra210_adx_reg_defaults),
.reg_default_cb = regmap_default_zero_cb,
.cache_type = REGCACHE_FLAT,
};
@ -638,6 +639,7 @@ static const struct regmap_config tegra264_adx_regmap_config = {
.volatile_reg = tegra264_adx_volatile_reg,
.reg_defaults = tegra264_adx_reg_defaults,
.num_reg_defaults = ARRAY_SIZE(tegra264_adx_reg_defaults),
.reg_default_cb = regmap_default_zero_cb,
.cache_type = REGCACHE_FLAT,
};

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@ -2133,6 +2133,7 @@ static const struct regmap_config tegra210_ahub_regmap_config = {
.reg_stride = 4,
.writeable_reg = tegra210_ahub_wr_reg,
.max_register = TEGRA210_MAX_REGISTER_ADDR,
.reg_default_cb = regmap_default_zero_cb,
.cache_type = REGCACHE_FLAT,
};
@ -2142,6 +2143,7 @@ static const struct regmap_config tegra186_ahub_regmap_config = {
.reg_stride = 4,
.writeable_reg = tegra186_ahub_wr_reg,
.max_register = TEGRA186_MAX_REGISTER_ADDR,
.reg_default_cb = regmap_default_zero_cb,
.cache_type = REGCACHE_FLAT,
};
@ -2151,6 +2153,7 @@ static const struct regmap_config tegra264_ahub_regmap_config = {
.reg_stride = 4,
.writeable_reg = tegra264_ahub_wr_reg,
.max_register = TEGRA264_MAX_REGISTER_ADDR,
.reg_default_cb = regmap_default_zero_cb,
.cache_type = REGCACHE_FLAT,
};

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@ -654,6 +654,7 @@ static const struct regmap_config tegra210_amx_regmap_config = {
.volatile_reg = tegra210_amx_volatile_reg,
.reg_defaults = tegra210_amx_reg_defaults,
.num_reg_defaults = ARRAY_SIZE(tegra210_amx_reg_defaults),
.reg_default_cb = regmap_default_zero_cb,
.cache_type = REGCACHE_FLAT,
};
@ -667,6 +668,7 @@ static const struct regmap_config tegra194_amx_regmap_config = {
.volatile_reg = tegra210_amx_volatile_reg,
.reg_defaults = tegra210_amx_reg_defaults,
.num_reg_defaults = ARRAY_SIZE(tegra210_amx_reg_defaults),
.reg_default_cb = regmap_default_zero_cb,
.cache_type = REGCACHE_FLAT,
};
@ -680,6 +682,7 @@ static const struct regmap_config tegra264_amx_regmap_config = {
.volatile_reg = tegra264_amx_volatile_reg,
.reg_defaults = tegra264_amx_reg_defaults,
.num_reg_defaults = ARRAY_SIZE(tegra264_amx_reg_defaults),
.reg_default_cb = regmap_default_zero_cb,
.cache_type = REGCACHE_FLAT,
};

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@ -483,6 +483,7 @@ static const struct regmap_config tegra210_dmic_regmap_config = {
.volatile_reg = tegra210_dmic_volatile_reg,
.reg_defaults = tegra210_dmic_reg_defaults,
.num_reg_defaults = ARRAY_SIZE(tegra210_dmic_reg_defaults),
.reg_default_cb = regmap_default_zero_cb,
.cache_type = REGCACHE_FLAT,
};

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@ -997,6 +997,7 @@ static const struct regmap_config tegra210_regmap_conf = {
.volatile_reg = tegra210_i2s_volatile_reg,
.reg_defaults = tegra210_i2s_reg_defaults,
.num_reg_defaults = ARRAY_SIZE(tegra210_i2s_reg_defaults),
.reg_default_cb = regmap_default_zero_cb,
.cache_type = REGCACHE_FLAT,
};
@ -1044,6 +1045,7 @@ static const struct regmap_config tegra264_regmap_conf = {
.volatile_reg = tegra264_i2s_volatile_reg,
.reg_defaults = tegra264_i2s_reg_defaults,
.num_reg_defaults = ARRAY_SIZE(tegra264_i2s_reg_defaults),
.reg_default_cb = regmap_default_zero_cb,
.cache_type = REGCACHE_FLAT,
};

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@ -763,6 +763,7 @@ static const struct regmap_config tegra210_mbdrc_regmap_cfg = {
.precious_reg = tegra210_mbdrc_precious_reg,
.reg_defaults = tegra210_mbdrc_reg_defaults,
.num_reg_defaults = ARRAY_SIZE(tegra210_mbdrc_reg_defaults),
.reg_default_cb = regmap_default_zero_cb,
.cache_type = REGCACHE_FLAT,
};

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@ -608,6 +608,7 @@ static const struct regmap_config tegra210_mixer_regmap_config = {
.precious_reg = tegra210_mixer_precious_reg,
.reg_defaults = tegra210_mixer_reg_defaults,
.num_reg_defaults = ARRAY_SIZE(tegra210_mixer_reg_defaults),
.reg_default_cb = regmap_default_zero_cb,
.cache_type = REGCACHE_FLAT,
};

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@ -699,6 +699,7 @@ static const struct regmap_config tegra210_mvc_regmap_config = {
.volatile_reg = tegra210_mvc_volatile_reg,
.reg_defaults = tegra210_mvc_reg_defaults,
.num_reg_defaults = ARRAY_SIZE(tegra210_mvc_reg_defaults),
.reg_default_cb = regmap_default_zero_cb,
.cache_type = REGCACHE_FLAT,
};

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@ -297,6 +297,7 @@ static const struct regmap_config tegra210_ope_regmap_config = {
.volatile_reg = tegra210_ope_volatile_reg,
.reg_defaults = tegra210_ope_reg_defaults,
.num_reg_defaults = ARRAY_SIZE(tegra210_ope_reg_defaults),
.reg_default_cb = regmap_default_zero_cb,
.cache_type = REGCACHE_FLAT,
};

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@ -306,6 +306,7 @@ static const struct regmap_config tegra210_peq_regmap_config = {
.precious_reg = tegra210_peq_precious_reg,
.reg_defaults = tegra210_peq_reg_defaults,
.num_reg_defaults = ARRAY_SIZE(tegra210_peq_reg_defaults),
.reg_default_cb = regmap_default_zero_cb,
.cache_type = REGCACHE_FLAT,
};

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@ -3569,6 +3569,7 @@ static const struct regmap_config tegra210_sfc_regmap_config = {
.precious_reg = tegra210_sfc_precious_reg,
.reg_defaults = tegra210_sfc_reg_defaults,
.num_reg_defaults = ARRAY_SIZE(tegra210_sfc_reg_defaults),
.reg_default_cb = regmap_default_zero_cb,
.cache_type = REGCACHE_FLAT,
};