Merge branch '1GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/net-queue

Tony Nguyen says:

====================
Intel Wired LAN Driver Updates 2025-04-02 (igc, e1000e, ixgbe, idpf)

For igc:
Joe Damato removes unmapping of XSK queues from NAPI instance.

Zdenek Bouska swaps condition checks/call to prevent AF_XDP Tx drops
with low budget value.

For e1000e:
Vitaly adjusts Kumeran interface configuration to prevent MDI errors.

For ixgbe:
Piotr clears PHY high values on media type detection to ensure stale
values are not used.

For idpf:
Emil adjusts shutdown calls to prevent NULL pointer dereference.

* '1GbE' of git://git.kernel.org/pub/scm/linux/kernel/git/tnguy/net-queue:
  idpf: fix adapter NULL pointer dereference on reboot
  ixgbe: fix media type detection for E610 device
  e1000e: change k1 configuration on MTP and later platforms
  igc: Fix TX drops in XDP ZC
  igc: Fix XSK queue NAPI ID mapping
====================

Link: https://patch.msgid.link/20250402173900.1957261-1-anthony.l.nguyen@intel.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Jakub Kicinski 2025-04-03 15:56:49 -07:00
commit 915873752c
8 changed files with 93 additions and 14 deletions

View file

@ -803,4 +803,7 @@
/* SerDes Control */
#define E1000_GEN_POLL_TIMEOUT 640
#define E1000_FEXTNVM12_PHYPD_CTRL_MASK 0x00C00000
#define E1000_FEXTNVM12_PHYPD_CTRL_P1 0x00800000
#endif /* _E1000_DEFINES_H_ */

View file

@ -285,6 +285,45 @@ static void e1000_toggle_lanphypc_pch_lpt(struct e1000_hw *hw)
}
}
/**
* e1000_reconfigure_k1_exit_timeout - reconfigure K1 exit timeout to
* align to MTP and later platform requirements.
* @hw: pointer to the HW structure
*
* Context: PHY semaphore must be held by caller.
* Return: 0 on success, negative on failure
*/
static s32 e1000_reconfigure_k1_exit_timeout(struct e1000_hw *hw)
{
u16 phy_timeout;
u32 fextnvm12;
s32 ret_val;
if (hw->mac.type < e1000_pch_mtp)
return 0;
/* Change Kumeran K1 power down state from P0s to P1 */
fextnvm12 = er32(FEXTNVM12);
fextnvm12 &= ~E1000_FEXTNVM12_PHYPD_CTRL_MASK;
fextnvm12 |= E1000_FEXTNVM12_PHYPD_CTRL_P1;
ew32(FEXTNVM12, fextnvm12);
/* Wait for the interface the settle */
usleep_range(1000, 1100);
/* Change K1 exit timeout */
ret_val = e1e_rphy_locked(hw, I217_PHY_TIMEOUTS_REG,
&phy_timeout);
if (ret_val)
return ret_val;
phy_timeout &= ~I217_PHY_TIMEOUTS_K1_EXIT_TO_MASK;
phy_timeout |= 0xF00;
return e1e_wphy_locked(hw, I217_PHY_TIMEOUTS_REG,
phy_timeout);
}
/**
* e1000_init_phy_workarounds_pchlan - PHY initialization workarounds
* @hw: pointer to the HW structure
@ -327,15 +366,22 @@ static s32 e1000_init_phy_workarounds_pchlan(struct e1000_hw *hw)
* LANPHYPC Value bit to force the interconnect to PCIe mode.
*/
switch (hw->mac.type) {
case e1000_pch_mtp:
case e1000_pch_lnp:
case e1000_pch_ptp:
case e1000_pch_nvp:
/* At this point the PHY might be inaccessible so don't
* propagate the failure
*/
if (e1000_reconfigure_k1_exit_timeout(hw))
e_dbg("Failed to reconfigure K1 exit timeout\n");
fallthrough;
case e1000_pch_lpt:
case e1000_pch_spt:
case e1000_pch_cnp:
case e1000_pch_tgp:
case e1000_pch_adp:
case e1000_pch_mtp:
case e1000_pch_lnp:
case e1000_pch_ptp:
case e1000_pch_nvp:
if (e1000_phy_is_accessible_pchlan(hw))
break;
@ -419,8 +465,20 @@ static s32 e1000_init_phy_workarounds_pchlan(struct e1000_hw *hw)
* the PHY is in.
*/
ret_val = hw->phy.ops.check_reset_block(hw);
if (ret_val)
if (ret_val) {
e_err("ME blocked access to PHY after reset\n");
goto out;
}
if (hw->mac.type >= e1000_pch_mtp) {
ret_val = hw->phy.ops.acquire(hw);
if (ret_val) {
e_err("Failed to reconfigure K1 exit timeout\n");
goto out;
}
ret_val = e1000_reconfigure_k1_exit_timeout(hw);
hw->phy.ops.release(hw);
}
}
out:
@ -4888,6 +4946,18 @@ static s32 e1000_init_hw_ich8lan(struct e1000_hw *hw)
u16 i;
e1000_initialize_hw_bits_ich8lan(hw);
if (hw->mac.type >= e1000_pch_mtp) {
ret_val = hw->phy.ops.acquire(hw);
if (ret_val)
return ret_val;
ret_val = e1000_reconfigure_k1_exit_timeout(hw);
hw->phy.ops.release(hw);
if (ret_val) {
e_dbg("Error failed to reconfigure K1 exit timeout\n");
return ret_val;
}
}
/* Initialize identification LED */
ret_val = mac->ops.id_led_init(hw);

View file

@ -219,6 +219,10 @@
#define I217_PLL_CLOCK_GATE_REG PHY_REG(772, 28)
#define I217_PLL_CLOCK_GATE_MASK 0x07FF
/* PHY Timeouts */
#define I217_PHY_TIMEOUTS_REG PHY_REG(770, 21)
#define I217_PHY_TIMEOUTS_K1_EXIT_TO_MASK 0x0FC0
#define SW_FLAG_TIMEOUT 1000 /* SW Semaphore flag timeout in ms */
/* Inband Control */

View file

@ -87,7 +87,11 @@ destroy_wqs:
*/
static void idpf_shutdown(struct pci_dev *pdev)
{
idpf_remove(pdev);
struct idpf_adapter *adapter = pci_get_drvdata(pdev);
cancel_delayed_work_sync(&adapter->vc_event_task);
idpf_vc_core_deinit(adapter);
idpf_deinit_dflt_mbx(adapter);
if (system_state == SYSTEM_POWER_OFF)
pci_set_power_state(pdev, PCI_D3hot);

View file

@ -337,8 +337,6 @@ struct igc_adapter {
struct igc_led_classdev *leds;
};
void igc_set_queue_napi(struct igc_adapter *adapter, int q_idx,
struct napi_struct *napi);
void igc_up(struct igc_adapter *adapter);
void igc_down(struct igc_adapter *adapter);
int igc_open(struct net_device *netdev);

View file

@ -3042,7 +3042,7 @@ static void igc_xdp_xmit_zc(struct igc_ring *ring)
* descriptors. Therefore, to be safe, we always ensure we have at least
* 4 descriptors available.
*/
while (xsk_tx_peek_desc(pool, &xdp_desc) && budget >= 4) {
while (budget >= 4 && xsk_tx_peek_desc(pool, &xdp_desc)) {
struct igc_metadata_request meta_req;
struct xsk_tx_metadata *meta = NULL;
struct igc_tx_buffer *bi;
@ -5022,8 +5022,8 @@ static int igc_sw_init(struct igc_adapter *adapter)
return 0;
}
void igc_set_queue_napi(struct igc_adapter *adapter, int vector,
struct napi_struct *napi)
static void igc_set_queue_napi(struct igc_adapter *adapter, int vector,
struct napi_struct *napi)
{
struct igc_q_vector *q_vector = adapter->q_vector[vector];

View file

@ -97,7 +97,6 @@ static int igc_xdp_enable_pool(struct igc_adapter *adapter,
napi_disable(napi);
}
igc_set_queue_napi(adapter, queue_id, NULL);
set_bit(IGC_RING_FLAG_AF_XDP_ZC, &rx_ring->flags);
set_bit(IGC_RING_FLAG_AF_XDP_ZC, &tx_ring->flags);
@ -147,7 +146,6 @@ static int igc_xdp_disable_pool(struct igc_adapter *adapter, u16 queue_id)
xsk_pool_dma_unmap(pool, IGC_RX_DMA_ATTR);
clear_bit(IGC_RING_FLAG_AF_XDP_ZC, &rx_ring->flags);
clear_bit(IGC_RING_FLAG_AF_XDP_ZC, &tx_ring->flags);
igc_set_queue_napi(adapter, queue_id, napi);
if (needs_reset) {
napi_enable(napi);

View file

@ -1453,9 +1453,11 @@ enum ixgbe_media_type ixgbe_get_media_type_e610(struct ixgbe_hw *hw)
hw->link.link_info.phy_type_low = 0;
} else {
highest_bit = fls64(le64_to_cpu(pcaps.phy_type_low));
if (highest_bit)
if (highest_bit) {
hw->link.link_info.phy_type_low =
BIT_ULL(highest_bit - 1);
hw->link.link_info.phy_type_high = 0;
}
}
}