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pinctrl: samsung: Add Exynos9610 pinctrl configuration
Add pinctrl configuration for Exynos9610. The bank types used are the same as on Exynos850 and gs101, so we can reuse the macros. Signed-off-by: Alexandru Chimac <alex@chimac.ro> Link: https://patch.msgid.link/20260102-exynos9610-pinctrl-v3-3-3f21f2cfb651@chimac.ro Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
This commit is contained in:
Alexandru Chimac
Krzysztof Kozlowski
parent
2efbc4cf87
commit
8c483209a6
3 changed files with 120 additions and 0 deletions
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@ -1770,6 +1770,123 @@ const struct samsung_pinctrl_of_match_data exynos8895_of_data __initconst = {
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.num_ctrl = ARRAY_SIZE(exynos8895_pin_ctrl),
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};
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/* pin banks of exynos9610 pin-controller 0 (ALIVE) */
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static const struct samsung_pin_bank_data exynos9610_pin_banks0[] __initconst = {
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EXYNOS850_PIN_BANK_EINTN(6, 0x000, "etc0"),
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GS101_PIN_BANK_EINTW(8, 0x020, "gpa0", 0x00, 0x00),
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GS101_PIN_BANK_EINTW(8, 0x040, "gpa1", 0x04, 0x08),
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GS101_PIN_BANK_EINTW(8, 0x060, "gpa2", 0x08, 0x0c),
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EXYNOS850_PIN_BANK_EINTN(5, 0x080, "gpq0"),
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};
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/* pin banks of exynos9610 pin-controller 1 (CMGP) */
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static const struct samsung_pin_bank_data exynos9610_pin_banks1[] __initconst = {
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EXYNOS850_PIN_BANK_EINTW(1, 0x000, "gpm0", 0x00),
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EXYNOS850_PIN_BANK_EINTW(1, 0x020, "gpm1", 0x04),
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EXYNOS850_PIN_BANK_EINTW(1, 0x040, "gpm2", 0x08),
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EXYNOS850_PIN_BANK_EINTW(1, 0x060, "gpm3", 0x0C),
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EXYNOS850_PIN_BANK_EINTW(1, 0x080, "gpm4", 0x10),
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EXYNOS850_PIN_BANK_EINTW(1, 0x0A0, "gpm5", 0x14),
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EXYNOS850_PIN_BANK_EINTW(1, 0x0C0, "gpm6", 0x18),
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EXYNOS850_PIN_BANK_EINTW(1, 0x0E0, "gpm7", 0x1C),
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EXYNOS850_PIN_BANK_EINTW(1, 0x100, "gpm8", 0x20),
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EXYNOS850_PIN_BANK_EINTW(1, 0x120, "gpm9", 0x24),
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EXYNOS850_PIN_BANK_EINTW(1, 0x140, "gpm10", 0x28),
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EXYNOS850_PIN_BANK_EINTW(1, 0x160, "gpm11", 0x2C),
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EXYNOS850_PIN_BANK_EINTW(1, 0x180, "gpm12", 0x30),
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EXYNOS850_PIN_BANK_EINTW(1, 0x1A0, "gpm13", 0x34),
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EXYNOS850_PIN_BANK_EINTW(1, 0x1C0, "gpm14", 0x38),
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EXYNOS850_PIN_BANK_EINTW(1, 0x1E0, "gpm15", 0x3C),
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EXYNOS850_PIN_BANK_EINTW(1, 0x200, "gpm16", 0x40),
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EXYNOS850_PIN_BANK_EINTW(1, 0x220, "gpm17", 0x44),
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EXYNOS850_PIN_BANK_EINTW(1, 0x240, "gpm18", 0x48),
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EXYNOS850_PIN_BANK_EINTW(1, 0x260, "gpm19", 0x4C),
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EXYNOS850_PIN_BANK_EINTW(1, 0x280, "gpm20", 0x50),
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EXYNOS850_PIN_BANK_EINTW(1, 0x2A0, "gpm21", 0x54),
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EXYNOS850_PIN_BANK_EINTW(1, 0x2C0, "gpm22", 0x58),
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EXYNOS850_PIN_BANK_EINTW(1, 0x2E0, "gpm23", 0x5C),
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EXYNOS850_PIN_BANK_EINTW(1, 0x300, "gpm24", 0x60),
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EXYNOS850_PIN_BANK_EINTW(1, 0x320, "gpm25", 0x64),
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};
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/* pin banks of exynos9610 pin-controller 2 (DISPAUD) */
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static const struct samsung_pin_bank_data exynos9610_pin_banks2[] __initconst = {
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GS101_PIN_BANK_EINTG(5, 0x000, "gpb0", 0x00, 0x00),
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GS101_PIN_BANK_EINTG(4, 0x020, "gpb1", 0x04, 0x08),
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GS101_PIN_BANK_EINTG(5, 0x040, "gpb2", 0x08, 0x0c),
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};
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/* pin banks of exynos9610 pin-controller 3 (FSYS) */
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static const struct samsung_pin_bank_data exynos9610_pin_banks3[] __initconst = {
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GS101_PIN_BANK_EINTG(4, 0x000, "gpf0", 0x00, 0x00),
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GS101_PIN_BANK_EINTG(8, 0x020, "gpf1", 0x04, 0x04),
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GS101_PIN_BANK_EINTG(6, 0x040, "gpf2", 0x08, 0x0c),
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};
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/* pin banks of exynos9610 pin-controller 4 (TOP) */
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static const struct samsung_pin_bank_data exynos9610_pin_banks4[] __initconst = {
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GS101_PIN_BANK_EINTG(8, 0x000, "gpp0", 0x00, 0x00),
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GS101_PIN_BANK_EINTG(6, 0x020, "gpp1", 0x04, 0x08),
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GS101_PIN_BANK_EINTG(8, 0x040, "gpp2", 0x08, 0x10),
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GS101_PIN_BANK_EINTG(8, 0x060, "gpc0", 0x0C, 0x18),
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GS101_PIN_BANK_EINTG(8, 0x080, "gpc1", 0x10, 0x20),
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GS101_PIN_BANK_EINTG(5, 0x0A0, "gpc2", 0x14, 0x28),
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GS101_PIN_BANK_EINTG(8, 0x0C0, "gpg0", 0x18, 0x30),
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GS101_PIN_BANK_EINTG(8, 0x0E0, "gpg1", 0x1C, 0x38),
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GS101_PIN_BANK_EINTG(8, 0x100, "gpg2", 0x20, 0x40),
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GS101_PIN_BANK_EINTG(6, 0x120, "gpg3", 0x24, 0x48),
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GS101_PIN_BANK_EINTG(3, 0x140, "gpg4", 0x28, 0x50),
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};
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/* pin banks of exynos9610 pin-controller 5 (SHUB) */
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static const struct samsung_pin_bank_data exynos9610_pin_banks5[] __initconst = {
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EXYNOS850_PIN_BANK_EINTG(4, 0x000, "gph0", 0x00),
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EXYNOS850_PIN_BANK_EINTG(3, 0x020, "gph1", 0x04),
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};
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static const struct samsung_pin_ctrl exynos9610_pin_ctrl[] __initconst = {
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{
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/* pin-controller instance 0 ALIVE data */
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.pin_banks = exynos9610_pin_banks0,
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.nr_banks = ARRAY_SIZE(exynos9610_pin_banks0),
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.eint_wkup_init = exynos_eint_wkup_init,
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.suspend = exynos_pinctrl_suspend,
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.resume = exynos_pinctrl_resume,
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}, {
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/* pin-controller instance 1 CMGP data */
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.pin_banks = exynos9610_pin_banks1,
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.nr_banks = ARRAY_SIZE(exynos9610_pin_banks1),
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.eint_wkup_init = exynos_eint_wkup_init,
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.suspend = exynos_pinctrl_suspend,
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.resume = exynos_pinctrl_resume,
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}, {
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/* pin-controller instance 2 DISPAUD data */
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.pin_banks = exynos9610_pin_banks2,
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.nr_banks = ARRAY_SIZE(exynos9610_pin_banks2),
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}, {
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/* pin-controller instance 3 FSYS data */
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.pin_banks = exynos9610_pin_banks3,
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.nr_banks = ARRAY_SIZE(exynos9610_pin_banks3),
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.suspend = exynos_pinctrl_suspend,
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.resume = exynos_pinctrl_resume,
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}, {
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/* pin-controller instance 4 TOP data */
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.pin_banks = exynos9610_pin_banks4,
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.nr_banks = ARRAY_SIZE(exynos9610_pin_banks4),
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.suspend = exynos_pinctrl_suspend,
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.resume = exynos_pinctrl_resume,
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}, {
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/* pin-controller instance 5 SHUB data */
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.pin_banks = exynos9610_pin_banks5,
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.nr_banks = ARRAY_SIZE(exynos9610_pin_banks5),
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},
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};
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const struct samsung_pinctrl_of_match_data exynos9610_of_data __initconst = {
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.ctrl = exynos9610_pin_ctrl,
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.num_ctrl = ARRAY_SIZE(exynos9610_pin_ctrl),
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};
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/*
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* Pinctrl driver data for Tesla FSD SoC. FSD SoC includes three
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* gpio/pin-mux/pinconfig controllers.
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@ -1504,6 +1504,8 @@ static const struct of_device_id samsung_pinctrl_dt_match[] = {
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.data = &exynos8890_of_data },
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{ .compatible = "samsung,exynos8895-pinctrl",
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.data = &exynos8895_of_data },
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{ .compatible = "samsung,exynos9610-pinctrl",
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.data = &exynos9610_of_data },
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{ .compatible = "samsung,exynos9810-pinctrl",
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.data = &exynos9810_of_data },
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{ .compatible = "samsung,exynos990-pinctrl",
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@ -398,6 +398,7 @@ extern const struct samsung_pinctrl_of_match_data exynos7885_of_data;
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extern const struct samsung_pinctrl_of_match_data exynos850_of_data;
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extern const struct samsung_pinctrl_of_match_data exynos8890_of_data;
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extern const struct samsung_pinctrl_of_match_data exynos8895_of_data;
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extern const struct samsung_pinctrl_of_match_data exynos9610_of_data;
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extern const struct samsung_pinctrl_of_match_data exynos9810_of_data;
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extern const struct samsung_pinctrl_of_match_data exynos990_of_data;
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extern const struct samsung_pinctrl_of_match_data exynosautov9_of_data;
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