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Samsung DTS ARM64 changes for v6.20
1. ExynosAutov920:
- Add MFD clock controller node.
2. Google GS101:
- Add True Random Number Generator (TRNG) and OTP nvmem nodes.
- Correct the PMU (Power Management Unit) compatibles by dropping
fallback to syscon. The PMU on Samsung devices serves the role of
syscon, however on GS101 it cannot be used via standard Linux syscon
interface, because register accesses require custom regmap. It was
simply never correctly working with "syscon" compatible fallback.
- Add phandles to System Registers SYSREG blocks in clock controllers,
necessary for enabling automatic clock control later.
-----BEGIN PGP SIGNATURE-----
iQJEBAABCgAuFiEE3dJiKD0RGyM7briowTdm5oaLg9cFAmlrzm8QHGtyemtAa2Vy
bmVsLm9yZwAKCRDBN2bmhouD13BJD/4s3Q75bedb7izJ3kvBYTE4Rj1WnfDokx0u
E8STJ5p6FrEB2AKxLSRJTW4/Ih0Bp52G+sBUMetKzUlEznXaJ9c8TdJ9hPRDUYh7
at9R2wpyyWWFOXLIAuNp0nohxUuCiNrJssZZZTsJzV1yFodCG3aPYn38/oNrKVTx
Uhl9zBxTtdGclpPi/npue34oEQRv824AXlu1DSjBbEJfuDYxX5uijcs8T97l2Dtj
rb6Mm2cjTvvU1pTR9sCzGrBxtHP92kl/72w8iSgfvi6OsXqvcHLDdNdhJYvAjdnl
eQNFe0XSFUZDT7pLv+gW/5PEGrO3J6sTKCk5xkic4yQczVr/pqdnxajSGvodOmQu
AQB5EcDwExFGhttiXUEAyG85MVOsLJv+i6sU+2VLQVDOc7+DCMidP0DMgfPh/B/S
dRb0dCTBKWGSnUL1iAnWLVUjxkmnbecA1EcE8/AxG++vn2bXo9t+w1J9LYcwkebU
lrZHj9DjJLvzg6ejBUbwMotzK+c1hYH9WqYGZOcdsw7jPd7ULEaJs1ycO0Oreny4
t8oae9wF85eD4aCZ9KLRnp3l9v2w/cIWzvOLwcqaIsANiVvTy2i3pxLyfkvwgQ2g
+gjms9FTH2IoJ36Y0+RmBklYABOodZiYF+e8eEoioo7xOS6FhMaYQRCcyfMgb9n2
gACUifUGAQ==
=xVlA
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAml3fXEACgkQmmx57+YA
GNlNdRAAvxo6wZ1vv1UsVUbGhZ3TmSlYEkYYBo73GMVzkaXRm7HyPA5zo5I+yJRJ
QtH5SPYqgdzfeZGMjnMFGG/IIO4ZB4g7SEWHMFROdz1IIzjTzv5ZBt1rK2tvj7Ok
9gQKWwOnjDPxIcXRHDFcMwAF1WXPvOqTlGbTWBz5PoYcsU6II47ifbLqvautAn24
S74tBfjGukn5kodrtytJOyZt/Vc7NjR6oAXSQ+M7c+Yff4UbHWxRSSHwfGPVFBVB
vdkfg0rY3tzdLs1PUWWgC8T9O/xhILeCnxhnlbgo7u0a+3CnAdQcbfWhmSPPNYzT
+xX/bo6f+FzBPTVeK08QGAvVPH+dHWxk0aktABjS3Hpk6/fOwpCum1oJUECF2SiM
43huYrJZCGLHW12CmEEAKg52rghkqPJkevn+lBXnF5l862/VSeQ/LZUuHIXKK6a1
2xqJqnbzvlHqdjdTrCFC/v9xyQvwJXZt3BH6I8l1oN1ppunZb7jCAlESMGDYjhVZ
NBYsU21eeYCG07+QtvDZ4TSipmtq6RQsvW7fDuvQKSSiNMOOTs6iP5VH0RC48al1
rLUKwiPmYvFSlFBEwt2AIVECtHA73W4MQJgp4s6gwpS2XDYsHTi8NiUx9LbTha7s
kuqrCuwRcY0IQs7dwdDYAggkeQBsYsTWhZi+SGfeHyNlb2y3ur0=
=pNN2
-----END PGP SIGNATURE-----
Merge tag 'samsung-dt64-6.20' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt
Samsung DTS ARM64 changes for v6.20
1. ExynosAutov920:
- Add MFD clock controller node.
2. Google GS101:
- Add True Random Number Generator (TRNG) and OTP nvmem nodes.
- Correct the PMU (Power Management Unit) compatibles by dropping
fallback to syscon. The PMU on Samsung devices serves the role of
syscon, however on GS101 it cannot be used via standard Linux syscon
interface, because register accesses require custom regmap. It was
simply never correctly working with "syscon" compatible fallback.
- Add phandles to System Registers SYSREG blocks in clock controllers,
necessary for enabling automatic clock control later.
* tag 'samsung-dt64-6.20' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos: gs101: add OTP node
arm64: dts: exynos: gs101: add samsung,sysreg property to CMU nodes
arm64: dts: exynosautov920: add CMU_MFD clock DT nodes
arm64: dts: exynos: gs101: remove syscon compatible from pmu node
dt-bindings: soc: samsung: exynos-pmu: remove syscon for google,gs101-pmu
arm64: dts: exynos: gs101: add TRNG node
dt-bindings: rng: add google,gs101-trng compatible
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
commit
896cc203af
4 changed files with 47 additions and 5 deletions
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@ -12,9 +12,13 @@ maintainers:
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properties:
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compatible:
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enum:
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- samsung,exynos5250-trng
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- samsung,exynos850-trng
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oneOf:
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- enum:
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- samsung,exynos5250-trng
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- samsung,exynos850-trng
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- items:
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- const: google,gs101-trng
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- const: samsung,exynos850-trng
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clocks:
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minItems: 1
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@ -24,6 +28,9 @@ properties:
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minItems: 1
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maxItems: 2
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power-domains:
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maxItems: 1
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reg:
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maxItems: 1
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@ -34,9 +34,10 @@ select:
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properties:
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compatible:
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oneOf:
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- enum:
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- google,gs101-pmu
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- items:
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- enum:
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- google,gs101-pmu
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- samsung,exynos3250-pmu
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- samsung,exynos4210-pmu
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- samsung,exynos4212-pmu
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@ -1462,6 +1462,17 @@
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"wfd";
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};
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cmu_mfd: clock-controller@19e00000 {
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compatible = "samsung,exynosautov920-cmu-mfd";
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reg = <0x19e00000 0x8000>;
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#clock-cells = <1>;
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clocks = <&xtcxo>,
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<&cmu_top DOUT_CLKCMU_MFD_NOC>;
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clock-names = "oscclk",
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"noc";
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};
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pinctrl_aud: pinctrl@1a460000 {
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compatible = "samsung,exynosautov920-pinctrl";
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reg = <0x1a460000 0x10000>;
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@ -571,6 +571,14 @@
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#size-cells = <1>;
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ranges = <0x0 0x0 0x0 0x40000000>;
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efuse@10000000 {
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compatible = "google,gs101-otp";
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reg = <0x10000000 0xf084>;
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clocks = <&cmu_misc CLK_GOUT_MISC_OTP_CON_TOP_PCLK>;
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clock-names = "pclk";
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interrupts = <GIC_SPI 752 IRQ_TYPE_LEVEL_HIGH 0>;
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};
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cmu_misc: clock-controller@10010000 {
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compatible = "google,gs101-cmu-misc";
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reg = <0x10010000 0x10000>;
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@ -578,6 +586,7 @@
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clocks = <&cmu_top CLK_DOUT_CMU_MISC_BUS>,
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<&cmu_top CLK_DOUT_CMU_MISC_SSS>;
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clock-names = "bus", "sss";
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samsung,sysreg = <&sysreg_misc>;
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};
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sysreg_misc: syscon@10030000 {
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@ -630,6 +639,15 @@
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status = "disabled";
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};
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trng: rng@10141400 {
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compatible = "google,gs101-trng",
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"samsung,exynos850-trng";
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reg = <0x10141400 0x100>;
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clocks = <&cmu_misc CLK_GOUT_MISC_SSS_I_ACLK>,
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<&cmu_misc CLK_GOUT_MISC_SSS_I_PCLK>;
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clock-names = "secss", "pclk";
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};
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gic: interrupt-controller@10400000 {
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compatible = "arm,gic-v3";
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#address-cells = <0>;
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@ -662,6 +680,7 @@
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<&cmu_top CLK_DOUT_CMU_PERIC0_BUS>,
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<&cmu_top CLK_DOUT_CMU_PERIC0_IP>;
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clock-names = "oscclk", "bus", "ip";
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samsung,sysreg = <&sysreg_peric0>;
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};
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sysreg_peric0: syscon@10820000 {
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@ -1208,6 +1227,7 @@
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<&cmu_top CLK_DOUT_CMU_PERIC1_BUS>,
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<&cmu_top CLK_DOUT_CMU_PERIC1_IP>;
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clock-names = "oscclk", "bus", "ip";
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samsung,sysreg = <&sysreg_peric1>;
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};
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sysreg_peric1: syscon@10c20000 {
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@ -1566,6 +1586,7 @@
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<&cmu_top CLK_DOUT_CMU_HSI0_USBDPDBG>;
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clock-names = "oscclk", "bus", "dpgtc", "usb31drd",
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"usbdpdbg";
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samsung,sysreg = <&sysreg_hsi0>;
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};
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sysreg_hsi0: syscon@11020000 {
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@ -1637,6 +1658,7 @@
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<&cmu_top CLK_DOUT_CMU_HSI2_UFS_EMBD>,
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<&cmu_top CLK_DOUT_CMU_HSI2_MMC_CARD>;
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clock-names = "oscclk", "bus", "pcie", "ufs", "mmc";
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samsung,sysreg = <&sysreg_hsi2>;
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};
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sysreg_hsi2: syscon@14420000 {
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@ -1697,6 +1719,7 @@
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clocks = <&ext_24_5m>;
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clock-names = "oscclk";
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samsung,sysreg = <&sysreg_apm>;
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};
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sysreg_apm: syscon@17420000 {
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@ -1705,7 +1728,7 @@
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};
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pmu_system_controller: system-controller@17460000 {
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compatible = "google,gs101-pmu", "syscon";
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compatible = "google,gs101-pmu";
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reg = <0x17460000 0x10000>;
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google,pmu-intr-gen-syscon = <&pmu_intr_gen>;
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