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clk: qcom: Add TCSR clock driver for SM8750

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The TCSR clock controller found on SM8750 provides refclks
for PCIE, USB and UFS. Add clock driver for it.

Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Link: https://lore.kernel.org/r/20241204-sm8750_master_clks-v3-8-1a8f31a53a86@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
This commit is contained in:
Taniya Das 2024-12-04 11:37:20 -08:00 • committed by Bjorn Andersson
parent 3267c774f3
commit 8067618526
3 changed files with 150 additions and 0 deletions
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8
drivers/clk/qcom/Kconfig
View file

@ -1274,6 +1274,14 @@ config SM_TCSRCC_8650
Support for the TCSR clock controller on SM8650 devices.
Say Y if you want to use peripheral devices such as SD/UFS.
config SM_TCSRCC_8750
tristate "SM8750 TCSR Clock Controller"
depends on ARM64 || COMPILE_TEST
select QCOM_GDSC
help
Support for the TCSR clock controller on SM8750 devices.
Say Y if you want to use peripheral devices such as UFS/USB/PCIe.
config SA_VIDEOCC_8775P
tristate "SA8775P Video Clock Controller"
depends on ARM64 || COMPILE_TEST

1
drivers/clk/qcom/Makefile
View file

@ -159,6 +159,7 @@ obj-$(CONFIG_SM_GPUCC_8550) += gpucc-sm8550.o
obj-$(CONFIG_SM_GPUCC_8650) += gpucc-sm8650.o
obj-$(CONFIG_SM_TCSRCC_8550) += tcsrcc-sm8550.o
obj-$(CONFIG_SM_TCSRCC_8650) += tcsrcc-sm8650.o
obj-$(CONFIG_SM_TCSRCC_8750) += tcsrcc-sm8750.o
obj-$(CONFIG_SM_VIDEOCC_7150) += videocc-sm7150.o
obj-$(CONFIG_SM_VIDEOCC_8150) += videocc-sm8150.o
obj-$(CONFIG_SM_VIDEOCC_8250) += videocc-sm8250.o

141
drivers/clk/qcom/tcsrcc-sm8750.c Normal file
View file

@ -0,0 +1,141 @@
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
/*
* Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <linux/clk-provider.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>
#include <dt-bindings/clock/qcom,sm8750-tcsr.h>
#include "clk-branch.h"
#include "clk-regmap.h"
#include "clk-regmap-divider.h"
#include "clk-regmap-mux.h"
#include "common.h"
enum {
DT_BI_TCXO_PAD,
};
static struct clk_branch tcsr_pcie_0_clkref_en = {
.halt_reg = 0x0,
.halt_check = BRANCH_HALT_DELAY,
.clkr = {
.enable_reg = 0x0,
.enable_mask = BIT(0),
.hw.init = &(const struct clk_init_data) {
.name = "tcsr_pcie_0_clkref_en",
.ops = &clk_branch2_ops,
},
},
};
static struct clk_branch tcsr_ufs_clkref_en = {
.halt_reg = 0x1000,
.halt_check = BRANCH_HALT_DELAY,
.clkr = {
.enable_reg = 0x1000,
.enable_mask = BIT(0),
.hw.init = &(const struct clk_init_data) {
.name = "tcsr_ufs_clkref_en",
.parent_data = &(const struct clk_parent_data){
.index = DT_BI_TCXO_PAD,
},
.num_parents = 1,
.ops = &clk_branch2_ops,
},
},
};
static struct clk_branch tcsr_usb2_clkref_en = {
.halt_reg = 0x2000,
.halt_check = BRANCH_HALT_DELAY,
.clkr = {
.enable_reg = 0x2000,
.enable_mask = BIT(0),
.hw.init = &(const struct clk_init_data) {
.name = "tcsr_usb2_clkref_en",
.parent_data = &(const struct clk_parent_data){
.index = DT_BI_TCXO_PAD,
},
.num_parents = 1,
.ops = &clk_branch2_ops,
},
},
};
static struct clk_branch tcsr_usb3_clkref_en = {
.halt_reg = 0x3000,
.halt_check = BRANCH_HALT_DELAY,
.clkr = {
.enable_reg = 0x3000,
.enable_mask = BIT(0),
.hw.init = &(const struct clk_init_data) {
.name = "tcsr_usb3_clkref_en",
.parent_data = &(const struct clk_parent_data){
.index = DT_BI_TCXO_PAD,
},
.num_parents = 1,
.ops = &clk_branch2_ops,
},
},
};
static struct clk_regmap *tcsr_cc_sm8750_clocks[] = {
[TCSR_PCIE_0_CLKREF_EN] = &tcsr_pcie_0_clkref_en.clkr,
[TCSR_UFS_CLKREF_EN] = &tcsr_ufs_clkref_en.clkr,
[TCSR_USB2_CLKREF_EN] = &tcsr_usb2_clkref_en.clkr,
[TCSR_USB3_CLKREF_EN] = &tcsr_usb3_clkref_en.clkr,
};
static const struct regmap_config tcsr_cc_sm8750_regmap_config = {
.reg_bits = 32,
.reg_stride = 4,
.val_bits = 32,
.max_register = 0x3000,
.fast_io = true,
};
static const struct qcom_cc_desc tcsr_cc_sm8750_desc = {
.config = &tcsr_cc_sm8750_regmap_config,
.clks = tcsr_cc_sm8750_clocks,
.num_clks = ARRAY_SIZE(tcsr_cc_sm8750_clocks),
};
static const struct of_device_id tcsr_cc_sm8750_match_table[] = {
{ .compatible = "qcom,sm8750-tcsr" },
{ }
};
MODULE_DEVICE_TABLE(of, tcsr_cc_sm8750_match_table);
static int tcsr_cc_sm8750_probe(struct platform_device *pdev)
{
return qcom_cc_probe(pdev, &tcsr_cc_sm8750_desc);
}
static struct platform_driver tcsr_cc_sm8750_driver = {
.probe = tcsr_cc_sm8750_probe,
.driver = {
.name = "tcsr_cc-sm8750",
.of_match_table = tcsr_cc_sm8750_match_table,
},
};
static int __init tcsr_cc_sm8750_init(void)
{
return platform_driver_register(&tcsr_cc_sm8750_driver);
}
subsys_initcall(tcsr_cc_sm8750_init);
static void __exit tcsr_cc_sm8750_exit(void)
{
platform_driver_unregister(&tcsr_cc_sm8750_driver);
}
module_exit(tcsr_cc_sm8750_exit);
MODULE_DESCRIPTION("QTI TCSR_CC SM8750 Driver");
MODULE_LICENSE("GPL");