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drm/i915/gt: use designated initializers for intel_gt_debugfs_file

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CONFIG_RANDSTRUCT may reorder structure fields, which makes positional
initializers unsafe. The i915 GT debugfs tables were using positional
initializers for `struct intel_gt_debugfs_file`, and on configs where
the layout differs (e.g., presence/absence of the `.eval` callback),
this can lead to fields being initialized incorrectly and trigger
randstruct warnings such as:

```
  drivers/gpu/drm/i915/gt/intel_gt_debugfs.c:75:51: note: randstruct:
  casting between randomized structure pointer types (constructor)
```

Switch all the GT debugfs file arrays to designated initializers. This
binds each value to the intended member regardless of structure
reordering or optional members and removes the warning while preserving
the intended initialization. Also drops the '&' from
intel_eval_slpc_support so .eval receives the function pointer directly.

No functional change, only initialization style is updated.

Signed-off-by: Sebastian Brzezinka <sebastian.brzezinka@intel.com>
Reviewed-by: Krzysztof Karas <krzysztof.karas@intel.com>
Reviewed-by: Andi Shyti <andi.shyti@linux.intel.com>
Signed-off-by: Andi Shyti <andi.shyti@linux.intel.com>
Link: https://lore.kernel.org/r/bae491e8098705a87304a7c94573b377e8c8fa37.1765897826.git.sebastian.brzezinka@intel.com
This commit is contained in:
Sebastian Brzezinka 2025-12-16 16:11:45 +01:00 • committed by Andi Shyti
parent 08889b706d
commit 78df43b958
No known key found for this signature in database
GPG key ID: DA78056626D32D6E
9 changed files with 27 additions and 25 deletions
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4
drivers/gpu/drm/i915/gt/intel_gt_debugfs.c
View file

@ -73,8 +73,8 @@ DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(steering);
static void gt_debugfs_register(struct intel_gt *gt, struct dentry *root)
{
static const struct intel_gt_debugfs_file files[] = {
{ "reset", &reset_fops, NULL },
{ "steering", &steering_fops },
{ .name = "reset", .fops = &reset_fops },
{ .name = "steering", .fops = &steering_fops },
};
intel_gt_debugfs_register_files(root, files, ARRAY_SIZE(files), gt);

2
drivers/gpu/drm/i915/gt/intel_gt_engines_debugfs.c
View file

@ -29,7 +29,7 @@ DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(engines);
void intel_gt_engines_debugfs_register(struct intel_gt *gt, struct dentry *root)
{
static const struct intel_gt_debugfs_file files[] = {
{ "engines", &engines_fops },
{ .name = "engines", .fops = &engines_fops },
};
intel_gt_debugfs_register_files(root, files, ARRAY_SIZE(files), gt);

15
drivers/gpu/drm/i915/gt/intel_gt_pm_debugfs.c
View file

@ -586,13 +586,14 @@ DEFINE_SIMPLE_ATTRIBUTE(perf_limit_reasons_fops, perf_limit_reasons_get,
void intel_gt_pm_debugfs_register(struct intel_gt *gt, struct dentry *root)
{
static const struct intel_gt_debugfs_file files[] = {
{ "drpc", &drpc_fops, NULL },
{ "frequency", &frequency_fops, NULL },
{ "forcewake", &fw_domains_fops, NULL },
{ "forcewake_user", &forcewake_user_fops, NULL},
{ "llc", &llc_fops, llc_eval },
{ "rps_boost", &rps_boost_fops, rps_eval },
{ "perf_limit_reasons", &perf_limit_reasons_fops, perf_limit_reasons_eval },
{ .name = "drpc", .fops = &drpc_fops },
{ .name = "frequency", .fops = &frequency_fops },
{ .name = "forcewake", .fops = &fw_domains_fops },
{ .name = "forcewake_user", .fops = &forcewake_user_fops},
{ .name = "llc", .fops = &llc_fops, .eval = llc_eval },
{ .name = "rps_boost", .fops = &rps_boost_fops, .eval = rps_eval },
{ .name = "perf_limit_reasons", .fops = &perf_limit_reasons_fops,
.eval = perf_limit_reasons_eval },
};
intel_gt_debugfs_register_files(root, files, ARRAY_SIZE(files), gt);

4
drivers/gpu/drm/i915/gt/intel_sseu_debugfs.c
View file

@ -291,8 +291,8 @@ DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(sseu_topology);
void intel_sseu_debugfs_register(struct intel_gt *gt, struct dentry *root)
{
static const struct intel_gt_debugfs_file files[] = {
{ "sseu_status", &sseu_status_fops, NULL },
{ "sseu_topology", &sseu_topology_fops, NULL },
{ .name = "sseu_status", .fops = &sseu_status_fops },
{ .name = "sseu_topology", .fops = &sseu_topology_fops },
};
intel_gt_debugfs_register_files(root, files, ARRAY_SIZE(files), gt);

2
drivers/gpu/drm/i915/gt/uc/intel_gsc_uc_debugfs.c
View file

@ -29,7 +29,7 @@ DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(gsc_info);
void intel_gsc_uc_debugfs_register(struct intel_gsc_uc *gsc_uc, struct dentry *root)
{
static const struct intel_gt_debugfs_file files[] = {
{ "gsc_info", &gsc_info_fops, NULL },
{ .name = "gsc_info", .fops = &gsc_info_fops },
};
if (!intel_gsc_uc_is_supported(gsc_uc))

13
drivers/gpu/drm/i915/gt/uc/intel_guc_debugfs.c
View file

@ -132,12 +132,13 @@ DEFINE_SIMPLE_ATTRIBUTE(guc_sched_disable_gucid_threshold_fops,
void intel_guc_debugfs_register(struct intel_guc *guc, struct dentry *root)
{
static const struct intel_gt_debugfs_file files[] = {
{ "guc_info", &guc_info_fops, NULL },
{ "guc_registered_contexts", &guc_registered_contexts_fops, NULL },
{ "guc_slpc_info", &guc_slpc_info_fops, &intel_eval_slpc_support},
{ "guc_sched_disable_delay_ms", &guc_sched_disable_delay_ms_fops, NULL },
{ "guc_sched_disable_gucid_threshold", &guc_sched_disable_gucid_threshold_fops,
NULL },
{ .name = "guc_info", .fops = &guc_info_fops },
{ .name = "guc_registered_contexts", .fops = &guc_registered_contexts_fops },
{ .name = "guc_slpc_info", .fops = &guc_slpc_info_fops,
.eval = intel_eval_slpc_support },
{ .name = "guc_sched_disable_delay_ms", .fops = &guc_sched_disable_delay_ms_fops },
{ .name = "guc_sched_disable_gucid_threshold",
.fops = &guc_sched_disable_gucid_threshold_fops },
};
if (!intel_guc_is_supported(guc))

8
drivers/gpu/drm/i915/gt/uc/intel_guc_log_debugfs.c
View file

@ -162,10 +162,10 @@ void intel_guc_log_debugfs_register(struct intel_guc_log *log,
struct dentry *root)
{
static const struct intel_gt_debugfs_file files[] = {
{ "guc_log_dump", &guc_log_dump_fops, NULL },
{ "guc_load_err_log_dump", &guc_load_err_log_dump_fops, NULL },
{ "guc_log_level", &guc_log_level_fops, NULL },
{ "guc_log_relay", &guc_log_relay_fops, NULL },
{ .name = "guc_log_dump", .fops = &guc_log_dump_fops },
{ .name = "guc_load_err_log_dump", .fops = &guc_load_err_log_dump_fops},
{ .name = "guc_log_level", .fops = &guc_log_level_fops },
{ .name = "guc_log_relay", .fops = &guc_log_relay_fops },
};
if (!intel_guc_is_supported(log_to_guc(log)))

2
drivers/gpu/drm/i915/gt/uc/intel_huc_debugfs.c
View file

@ -26,7 +26,7 @@ DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(huc_info);
void intel_huc_debugfs_register(struct intel_huc *huc, struct dentry *root)
{
static const struct intel_gt_debugfs_file files[] = {
{ "huc_info", &huc_info_fops, NULL },
{ .name = "huc_info", .fops = &huc_info_fops },
};
if (!intel_huc_is_supported(huc))

2
drivers/gpu/drm/i915/gt/uc/intel_uc_debugfs.c
View file

@ -40,7 +40,7 @@ DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(uc_usage);
void intel_uc_debugfs_register(struct intel_uc *uc, struct dentry *gt_root)
{
static const struct intel_gt_debugfs_file files[] = {
{ "usage", &uc_usage_fops, NULL },
{ .name = "usage", .fops = &uc_usage_fops },
};
struct dentry *root;