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drm/amd: Drop amdgpu prefix from message prints

Browse source 
Hardcoding the prefix isn't necessary when using drm_* or dev_*
message prints.

Signed-off-by: Mario Limonciello (AMD) <superm1@kernel.org>
Reviewed-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Mario Limonciello (AMD) 2025-12-14 19:12:26 -06:00 • committed by Alex Deucher
parent d4b8d132ce
commit 5fd4fef3f8
31 changed files with 77 additions and 75 deletions
Download patch file Download diff file Expand all files Collapse all files

2
drivers/gpu/drm/amd/amdgpu/amdgpu_benchmark.c
View file

@ -66,7 +66,7 @@ static void amdgpu_benchmark_log_results(struct amdgpu_device *adev,
throughput = div64_s64(throughput, time_ms);
dev_info(adev->dev, "amdgpu: %s %u bo moves of %u kB from"
dev_info(adev->dev, " %s %u bo moves of %u kB from"
" %d to %d in %lld ms, throughput: %lld Mb/s or %lld MB/s\n",
kind, n, size >> 10, sdomain, ddomain, time_ms,
throughput * 8, throughput);

2
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
View file

@ -4714,7 +4714,7 @@ static void amdgpu_device_unmap_mmio(struct amdgpu_device *adev)
*/
void amdgpu_device_fini_hw(struct amdgpu_device *adev)
{
dev_info(adev->dev, "amdgpu: finishing device.\n");
dev_info(adev->dev, "finishing device.\n");
flush_delayed_work(&adev->delayed_init_work);
if (adev->mman.initialized)

8
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
View file

@ -130,11 +130,11 @@ void amdgpu_gfx_parse_disable_cu(struct amdgpu_device *adev, unsigned int *mask,
}
if (se < max_se && sh < max_sh && cu < 16) {
DRM_INFO("amdgpu: disabling CU %u.%u.%u\n", se, sh, cu);
drm_info(adev_to_drm(adev), "Disabling CU %u.%u.%u\n", se, sh, cu);
mask[se * max_sh + sh] |= 1u << cu;
} else {
DRM_ERROR("amdgpu: disable_cu %u.%u.%u is out of range\n",
se, sh, cu);
drm_err(adev_to_drm(adev), "disable_cu %u.%u.%u is out of range\n",
se, sh, cu);
}
next = strchr(p, ',');
@ -152,7 +152,7 @@ static bool amdgpu_gfx_is_graphics_multipipe_capable(struct amdgpu_device *adev)
static bool amdgpu_gfx_is_compute_multipipe_capable(struct amdgpu_device *adev)
{
if (amdgpu_compute_multipipe != -1) {
dev_info(adev->dev, "amdgpu: forcing compute pipe policy %d\n",
dev_info(adev->dev, " forcing compute pipe policy %d\n",
amdgpu_compute_multipipe);
return amdgpu_compute_multipipe == 1;
}

2
drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
View file

@ -351,7 +351,7 @@ int amdgpu_irq_init(struct amdgpu_device *adev)
adev->irq.irq = irq;
adev_to_drm(adev)->max_vblank_count = 0x00ffffff;
dev_dbg(adev->dev, "amdgpu: irq initialized.\n");
dev_dbg(adev->dev, "irq initialized.\n");
return 0;
free_vectors:

2
drivers/gpu/drm/amd/amdgpu/amdgpu_ring.c
View file

@ -191,7 +191,7 @@ void amdgpu_ring_commit(struct amdgpu_ring *ring)
uint32_t count;
if (ring->count_dw < 0)
DRM_ERROR("amdgpu: writing more dwords to the ring than expected!\n");
drm_err(adev_to_drm(ring->adev), "writing more dwords to the ring than expected!\n");
/* We pad to match fetch size */
count = ring->funcs->align_mask + 1 -

6
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
View file

@ -2111,7 +2111,7 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
DRM_DEBUG_DRIVER("Skipped stolen memory reservation\n");
}
dev_info(adev->dev, "amdgpu: %uM of VRAM memory ready\n",
dev_info(adev->dev, " %uM of VRAM memory ready\n",
(unsigned int)(adev->gmc.real_vram_size / (1024 * 1024)));
/* Compute GTT size, either based on TTM limit
@ -2137,7 +2137,7 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
dev_err(adev->dev, "Failed initializing GTT heap.\n");
return r;
}
dev_info(adev->dev, "amdgpu: %uM of GTT memory ready.\n",
dev_info(adev->dev, " %uM of GTT memory ready.\n",
(unsigned int)(gtt_size / (1024 * 1024)));
if (adev->flags & AMD_IS_APU) {
@ -2260,7 +2260,7 @@ void amdgpu_ttm_fini(struct amdgpu_device *adev)
ttm_range_man_fini(&adev->mman.bdev, AMDGPU_PL_MMIO_REMAP);
ttm_device_fini(&adev->mman.bdev);
adev->mman.initialized = false;
dev_info(adev->dev, "amdgpu: ttm finalized\n");
dev_info(adev->dev, " ttm finalized\n");
}
/**

2
drivers/gpu/drm/amd/amdgpu/amdgpu_vpe.c
View file

@ -790,7 +790,7 @@ static int vpe_ring_test_ring(struct amdgpu_ring *ring)
ret = amdgpu_ring_alloc(ring, 4);
if (ret) {
dev_err(adev->dev, "amdgpu: dma failed to lock ring %d (%d).\n", ring->idx, ret);
dev_err(adev->dev, "dma failed to lock ring %d (%d).\n", ring->idx, ret);
goto out;
}

10
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
View file

@ -4041,8 +4041,8 @@ static int gfx_v10_0_ring_test_ring(struct amdgpu_ring *ring)
WREG32(scratch, 0xCAFEDEAD);
r = amdgpu_ring_alloc(ring, 3);
if (r) {
DRM_ERROR("amdgpu: cp failed to lock ring %d (%d).\n",
ring->idx, r);
drm_err(adev_to_drm(adev), "cp failed to lock ring %d (%d).\n",
ring->idx, r);
return r;
}
@ -4090,7 +4090,7 @@ static int gfx_v10_0_ring_test_ib(struct amdgpu_ring *ring, long timeout)
r = amdgpu_ib_get(adev, NULL, 20, AMDGPU_IB_POOL_DIRECT, &ib);
if (r) {
DRM_ERROR("amdgpu: failed to get ib (%ld).\n", r);
drm_err(adev_to_drm(adev), "failed to get ib (%ld).\n", r);
goto err1;
}
@ -6379,7 +6379,7 @@ static int gfx_v10_0_cp_gfx_start(struct amdgpu_device *adev)
ring = &adev->gfx.gfx_ring[0];
r = amdgpu_ring_alloc(ring, gfx_v10_0_get_csb_size(adev) + 4);
if (r) {
DRM_ERROR("amdgpu: cp failed to lock ring (%d).\n", r);
drm_err(adev_to_drm(adev), "cp failed to lock ring (%d).\n", r);
return r;
}
@ -6429,7 +6429,7 @@ static int gfx_v10_0_cp_gfx_start(struct amdgpu_device *adev)
ring = &adev->gfx.gfx_ring[1];
r = amdgpu_ring_alloc(ring, 2);
if (r) {
DRM_ERROR("amdgpu: cp failed to lock ring (%d).\n", r);
drm_err(adev_to_drm(adev), "cp failed to lock ring (%d).\n", r);
return r;
}

10
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
View file

@ -571,8 +571,8 @@ static int gfx_v11_0_ring_test_ring(struct amdgpu_ring *ring)
WREG32(scratch, 0xCAFEDEAD);
r = amdgpu_ring_alloc(ring, 5);
if (r) {
DRM_ERROR("amdgpu: cp failed to lock ring %d (%d).\n",
ring->idx, r);
drm_err(adev_to_drm(adev), "cp failed to lock ring %d (%d).\n",
ring->idx, r);
return r;
}
@ -628,7 +628,7 @@ static int gfx_v11_0_ring_test_ib(struct amdgpu_ring *ring, long timeout)
r = amdgpu_ib_get(adev, NULL, 20, AMDGPU_IB_POOL_DIRECT, &ib);
if (r) {
DRM_ERROR("amdgpu: failed to get ib (%ld).\n", r);
drm_err(adev_to_drm(adev), "failed to get ib (%ld).\n", r);
goto err1;
}
@ -3630,7 +3630,7 @@ static int gfx_v11_0_cp_gfx_start(struct amdgpu_device *adev)
ring = &adev->gfx.gfx_ring[0];
r = amdgpu_ring_alloc(ring, gfx_v11_0_get_csb_size(adev));
if (r) {
DRM_ERROR("amdgpu: cp failed to lock ring (%d).\n", r);
drm_err(&adev->ddev, "cp failed to lock ring (%d).\n", r);
return r;
}
@ -3675,7 +3675,7 @@ static int gfx_v11_0_cp_gfx_start(struct amdgpu_device *adev)
ring = &adev->gfx.gfx_ring[1];
r = amdgpu_ring_alloc(ring, 2);
if (r) {
DRM_ERROR("amdgpu: cp failed to lock ring (%d).\n", r);
drm_err(adev_to_drm(adev), "cp failed to lock ring (%d).\n", r);
return r;
}

6
drivers/gpu/drm/amd/amdgpu/gfx_v12_0.c
View file

@ -460,8 +460,8 @@ static int gfx_v12_0_ring_test_ring(struct amdgpu_ring *ring)
WREG32(scratch, 0xCAFEDEAD);
r = amdgpu_ring_alloc(ring, 5);
if (r) {
dev_err(adev->dev,
"amdgpu: cp failed to lock ring %d (%d).\n",
drm_err(adev_to_drm(adev),
"cp failed to lock ring %d (%d).\n",
ring->idx, r);
return r;
}
@ -518,7 +518,7 @@ static int gfx_v12_0_ring_test_ib(struct amdgpu_ring *ring, long timeout)
r = amdgpu_ib_get(adev, NULL, 16, AMDGPU_IB_POOL_DIRECT, &ib);
if (r) {
dev_err(adev->dev, "amdgpu: failed to get ib (%ld).\n", r);
drm_err(adev_to_drm(adev), "failed to get ib (%ld).\n", r);
goto err1;
}

4
drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
View file

@ -2010,7 +2010,7 @@ static int gfx_v6_0_cp_gfx_start(struct amdgpu_device *adev)
r = amdgpu_ring_alloc(ring, 7 + 4);
if (r) {
DRM_ERROR("amdgpu: cp failed to lock ring (%d).\n", r);
drm_err(adev_to_drm(adev), "cp failed to lock ring (%d).\n", r);
return r;
}
amdgpu_ring_write(ring, PACKET3(PACKET3_ME_INITIALIZE, 5));
@ -2031,7 +2031,7 @@ static int gfx_v6_0_cp_gfx_start(struct amdgpu_device *adev)
r = amdgpu_ring_alloc(ring, gfx_v6_0_get_csb_size(adev) + 10);
if (r) {
DRM_ERROR("amdgpu: cp failed to lock ring (%d).\n", r);
drm_err(adev_to_drm(adev), "cp failed to lock ring (%d).\n", r);
return r;
}

2
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
View file

@ -2465,7 +2465,7 @@ static int gfx_v7_0_cp_gfx_start(struct amdgpu_device *adev)
r = amdgpu_ring_alloc(ring, gfx_v7_0_get_csb_size(adev) + 8);
if (r) {
DRM_ERROR("amdgpu: cp failed to lock ring (%d).\n", r);
drm_err(adev_to_drm(adev), "cp failed to lock ring (%d).\n", r);
return r;
}

8
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
View file

@ -1509,7 +1509,7 @@ static int gfx_v8_0_do_edc_gpr_workarounds(struct amdgpu_device *adev)
r = amdgpu_ib_get(adev, NULL, total_size,
AMDGPU_IB_POOL_DIRECT, &ib);
if (r) {
DRM_ERROR("amdgpu: failed to get ib (%d).\n", r);
drm_err(adev_to_drm(adev), "failed to get ib (%d).\n", r);
return r;
}
@ -1604,14 +1604,14 @@ static int gfx_v8_0_do_edc_gpr_workarounds(struct amdgpu_device *adev)
/* shedule the ib on the ring */
r = amdgpu_ib_schedule(ring, 1, &ib, NULL, &f);
if (r) {
DRM_ERROR("amdgpu: ib submit failed (%d).\n", r);
drm_err(adev_to_drm(adev), "ib submit failed (%d).\n", r);
goto fail;
}
/* wait for the GPU to finish processing the IB */
r = dma_fence_wait(f, false);
if (r) {
DRM_ERROR("amdgpu: fence wait failed (%d).\n", r);
drm_err(adev_to_drm(adev), "fence wait failed (%d).\n", r);
goto fail;
}
@ -4143,7 +4143,7 @@ static int gfx_v8_0_cp_gfx_start(struct amdgpu_device *adev)
r = amdgpu_ring_alloc(ring, gfx_v8_0_get_csb_size(adev) + 4);
if (r) {
DRM_ERROR("amdgpu: cp failed to lock ring (%d).\n", r);
drm_err(adev_to_drm(adev), "cp failed to lock ring (%d).\n", r);
return r;
}

8
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
View file

@ -4582,7 +4582,7 @@ static int gfx_v9_0_do_edc_gds_workarounds(struct amdgpu_device *adev)
r = amdgpu_ring_alloc(ring, 7);
if (r) {
DRM_ERROR("amdgpu: GDS workarounds failed to lock ring %s (%d).\n",
drm_err(adev_to_drm(adev), "GDS workarounds failed to lock ring %s (%d).\n",
ring->name, r);
return r;
}
@ -4671,7 +4671,7 @@ static int gfx_v9_0_do_edc_gpr_workarounds(struct amdgpu_device *adev)
r = amdgpu_ib_get(adev, NULL, total_size,
AMDGPU_IB_POOL_DIRECT, &ib);
if (r) {
DRM_ERROR("amdgpu: failed to get ib (%d).\n", r);
drm_err(adev_to_drm(adev), "failed to get ib (%d).\n", r);
return r;
}
@ -4772,14 +4772,14 @@ static int gfx_v9_0_do_edc_gpr_workarounds(struct amdgpu_device *adev)
/* shedule the ib on the ring */
r = amdgpu_ib_schedule(ring, 1, &ib, NULL, &f);
if (r) {
DRM_ERROR("amdgpu: ib submit failed (%d).\n", r);
drm_err(adev_to_drm(adev), "ib schedule failed (%d).\n", r);
goto fail;
}
/* wait for the GPU to finish processing the IB */
r = dma_fence_wait(f, false);
if (r) {
DRM_ERROR("amdgpu: fence wait failed (%d).\n", r);
drm_err(adev_to_drm(adev), "fence wait failed (%d).\n", r);
goto fail;
}

2
drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
View file

@ -850,7 +850,7 @@ static int gmc_v10_0_sw_init(struct amdgpu_ip_block *ip_block)
r = dma_set_mask_and_coherent(adev->dev, DMA_BIT_MASK(44));
if (r) {
dev_warn(adev->dev, "amdgpu: No suitable DMA available.\n");
drm_warn(adev_to_drm(adev), "No suitable DMA available.\n");
return r;
}

2
drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
View file

@ -824,7 +824,7 @@ static int gmc_v11_0_sw_init(struct amdgpu_ip_block *ip_block)
r = dma_set_mask_and_coherent(adev->dev, DMA_BIT_MASK(44));
if (r) {
dev_warn(adev->dev, "amdgpu: No suitable DMA available.\n");
drm_warn(adev_to_drm(adev), "No suitable DMA available.\n");
return r;
}

2
drivers/gpu/drm/amd/amdgpu/gmc_v12_0.c
View file

@ -869,7 +869,7 @@ static int gmc_v12_0_sw_init(struct amdgpu_ip_block *ip_block)
r = dma_set_mask_and_coherent(adev->dev, DMA_BIT_MASK(44));
if (r) {
printk(KERN_WARNING "amdgpu: No suitable DMA available.\n");
drm_warn(adev_to_drm(adev), "No suitable DMA available.\n");
return r;
}

2
drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
View file

@ -1975,7 +1975,7 @@ static int gmc_v9_0_sw_init(struct amdgpu_ip_block *ip_block)
44;
r = dma_set_mask_and_coherent(adev->dev, DMA_BIT_MASK(dma_addr_bits));
if (r) {
dev_warn(adev->dev, "amdgpu: No suitable DMA available.\n");
drm_warn(adev_to_drm(adev), "No suitable DMA available.\n");
return r;
}
adev->need_swiotlb = drm_need_swiotlb(dma_addr_bits);

2
drivers/gpu/drm/amd/amdgpu/jpeg_v2_0.c
View file

@ -271,7 +271,7 @@ static int jpeg_v2_0_enable_power_gating(struct amdgpu_device *adev)
UVD_PGFSM_STATUS__UVDJ_PWR_STATUS_MASK);
if (r) {
DRM_ERROR("amdgpu: JPEG enable power gating failed\n");
drm_err(adev_to_drm(adev), "failed to enable JPEG power gating\n");
return r;
}
}

4
drivers/gpu/drm/amd/amdgpu/jpeg_v3_0.c
View file

@ -298,7 +298,7 @@ static int jpeg_v3_0_disable_static_power_gating(struct amdgpu_device *adev)
UVD_PGFSM_STATUS__UVDJ_PWR_STATUS_MASK);
if (r) {
DRM_ERROR("amdgpu: JPEG disable power gating failed\n");
drm_err(adev_to_drm(adev), "failed to disable JPEG power gating\n");
return r;
}
}
@ -333,7 +333,7 @@ static int jpeg_v3_0_enable_static_power_gating(struct amdgpu_device *adev)
UVD_PGFSM_STATUS__UVDJ_PWR_STATUS_MASK);
if (r) {
DRM_ERROR("amdgpu: JPEG enable power gating failed\n");
drm_err(adev_to_drm(adev), "failed to enable JPEG power gating\n");
return r;
}
}

4
drivers/gpu/drm/amd/amdgpu/jpeg_v4_0.c
View file

@ -335,7 +335,7 @@ static int jpeg_v4_0_disable_static_power_gating(struct amdgpu_device *adev)
UVD_PGFSM_STATUS__UVDJ_PWR_STATUS_MASK);
if (r) {
DRM_DEV_ERROR(adev->dev, "amdgpu: JPEG disable power gating failed\n");
drm_err(adev_to_drm(adev), "failed to disable JPEG power gating\n");
return r;
}
}
@ -370,7 +370,7 @@ static int jpeg_v4_0_enable_static_power_gating(struct amdgpu_device *adev)
UVD_PGFSM_STATUS__UVDJ_PWR_STATUS_MASK);
if (r) {
DRM_DEV_ERROR(adev->dev, "amdgpu: JPEG enable power gating failed\n");
drm_err(adev_to_drm(adev), "failed to enable JPEG power gating\n");
return r;
}
}

8
drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c
View file

@ -1031,7 +1031,7 @@ static int sdma_v5_0_ring_test_ring(struct amdgpu_ring *ring)
r = amdgpu_ring_alloc(ring, 20);
if (r) {
DRM_ERROR("amdgpu: dma failed to lock ring %d (%d).\n", ring->idx, r);
drm_err(adev_to_drm(adev), "dma failed to lock ring %d (%d).\n", ring->idx, r);
amdgpu_device_wb_free(adev, index);
return r;
}
@ -1096,7 +1096,7 @@ static int sdma_v5_0_ring_test_ib(struct amdgpu_ring *ring, long timeout)
r = amdgpu_ib_get(adev, NULL, 256,
AMDGPU_IB_POOL_DIRECT, &ib);
if (r) {
DRM_ERROR("amdgpu: failed to get ib (%ld).\n", r);
drm_err(adev_to_drm(adev), "failed to get ib (%ld).\n", r);
goto err0;
}
@ -1117,11 +1117,11 @@ static int sdma_v5_0_ring_test_ib(struct amdgpu_ring *ring, long timeout)
r = dma_fence_wait_timeout(f, false, timeout);
if (r == 0) {
DRM_ERROR("amdgpu: IB test timed out\n");
drm_err(adev_to_drm(adev), "IB test timed out\n");
r = -ETIMEDOUT;
goto err1;
} else if (r < 0) {
DRM_ERROR("amdgpu: fence wait failed (%ld).\n", r);
drm_err(adev_to_drm(adev), "fence wait failed (%ld).\n", r);
goto err1;
}

12
drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c
View file

@ -931,7 +931,7 @@ static int sdma_v5_2_ring_test_ring(struct amdgpu_ring *ring)
r = amdgpu_ring_alloc(ring, 20);
if (r) {
DRM_ERROR("amdgpu: dma failed to lock ring %d (%d).\n", ring->idx, r);
drm_err(adev_to_drm(adev), "dma failed to lock ring %d (%d).\n", ring->idx, r);
amdgpu_device_wb_free(adev, index);
return r;
}
@ -995,7 +995,7 @@ static int sdma_v5_2_ring_test_ib(struct amdgpu_ring *ring, long timeout)
r = amdgpu_ib_get(adev, NULL, 256, AMDGPU_IB_POOL_DIRECT, &ib);
if (r) {
DRM_ERROR("amdgpu: failed to get ib (%ld).\n", r);
drm_err(adev_to_drm(adev), "failed to get ib (%ld).\n", r);
goto err0;
}
@ -1016,11 +1016,11 @@ static int sdma_v5_2_ring_test_ib(struct amdgpu_ring *ring, long timeout)
r = dma_fence_wait_timeout(f, false, timeout);
if (r == 0) {
DRM_ERROR("amdgpu: IB test timed out\n");
drm_err(adev_to_drm(adev), "IB test timed out\n");
r = -ETIMEDOUT;
goto err1;
} else if (r < 0) {
DRM_ERROR("amdgpu: fence wait failed (%ld).\n", r);
drm_err(adev_to_drm(adev), "fence wait failed (%ld).\n", r);
goto err1;
}
@ -1325,8 +1325,8 @@ static int sdma_v5_2_sw_init(struct amdgpu_ip_block *ip_block)
ring->use_doorbell = true;
ring->me = i;
DRM_INFO("use_doorbell being set to: [%s]\n",
ring->use_doorbell?"true":"false");
drm_info(adev_to_drm(adev), "use_doorbell being set to: [%s]\n",
ring->use_doorbell?"true":"false");
ring->doorbell_index =
(adev->doorbell_index.sdma_engine[i] << 1); //get DWORD offset

8
drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c
View file

@ -938,7 +938,7 @@ static int sdma_v6_0_ring_test_ring(struct amdgpu_ring *ring)
r = amdgpu_ring_alloc(ring, 5);
if (r) {
DRM_ERROR("amdgpu: dma failed to lock ring %d (%d).\n", ring->idx, r);
drm_err(adev_to_drm(adev), "dma failed to lock ring %d (%d).\n", ring->idx, r);
amdgpu_device_wb_free(adev, index);
return r;
}
@ -1002,7 +1002,7 @@ static int sdma_v6_0_ring_test_ib(struct amdgpu_ring *ring, long timeout)
r = amdgpu_ib_get(adev, NULL, 256, AMDGPU_IB_POOL_DIRECT, &ib);
if (r) {
DRM_ERROR("amdgpu: failed to get ib (%ld).\n", r);
drm_err(adev_to_drm(adev), "failed to get ib (%ld).\n", r);
goto err0;
}
@ -1023,11 +1023,11 @@ static int sdma_v6_0_ring_test_ib(struct amdgpu_ring *ring, long timeout)
r = dma_fence_wait_timeout(f, false, timeout);
if (r == 0) {
DRM_ERROR("amdgpu: IB test timed out\n");
drm_err(adev_to_drm(adev), "IB test timed out\n");
r = -ETIMEDOUT;
goto err1;
} else if (r < 0) {
DRM_ERROR("amdgpu: fence wait failed (%ld).\n", r);
drm_err(adev_to_drm(adev), "fence wait failed (%ld).\n", r);
goto err1;
}

10
drivers/gpu/drm/amd/amdgpu/sdma_v7_0.c
View file

@ -954,7 +954,7 @@ static int sdma_v7_0_ring_test_ring(struct amdgpu_ring *ring)
r = amdgpu_ring_alloc(ring, 5);
if (r) {
DRM_ERROR("amdgpu: dma failed to lock ring %d (%d).\n", ring->idx, r);
drm_err(adev_to_drm(adev), "dma failed to lock ring %d (%d).\n", ring->idx, r);
amdgpu_device_wb_free(adev, index);
return r;
}
@ -1018,7 +1018,7 @@ static int sdma_v7_0_ring_test_ib(struct amdgpu_ring *ring, long timeout)
r = amdgpu_ib_get(adev, NULL, 256, AMDGPU_IB_POOL_DIRECT, &ib);
if (r) {
DRM_ERROR("amdgpu: failed to get ib (%ld).\n", r);
drm_err(adev_to_drm(adev), "failed to get ib (%ld).\n", r);
goto err0;
}
@ -1039,11 +1039,11 @@ static int sdma_v7_0_ring_test_ib(struct amdgpu_ring *ring, long timeout)
r = dma_fence_wait_timeout(f, false, timeout);
if (r == 0) {
DRM_ERROR("amdgpu: IB test timed out\n");
drm_err(adev_to_drm(adev), "IB test timed out\n");
r = -ETIMEDOUT;
goto err1;
} else if (r < 0) {
DRM_ERROR("amdgpu: fence wait failed (%ld).\n", r);
drm_err(adev_to_drm(adev), "fence wait failed (%ld).\n", r);
goto err1;
}
@ -1504,7 +1504,7 @@ static int sdma_v7_0_ring_preempt_ib(struct amdgpu_ring *ring)
ring->trail_seq += 1;
r = amdgpu_ring_alloc(ring, 10);
if (r) {
DRM_ERROR("ring %d failed to be allocated \n", ring->idx);
DRM_ERROR("ring %d failed to be allocated\n", ring->idx);
return r;
}
sdma_v7_0_ring_emit_fence(ring, ring->trail_fence_gpu_addr,

8
drivers/gpu/drm/amd/amdgpu/uvd_v3_1.c
View file

@ -660,7 +660,7 @@ static int uvd_v3_1_hw_init(struct amdgpu_ip_block *ip_block)
r = uvd_v3_1_fw_validate(adev);
if (r) {
DRM_ERROR("amdgpu: UVD Firmware validate fail (%d).\n", r);
drm_err(adev_to_drm(adev), "UVD Firmware validate fail (%d).\n", r);
return r;
}
@ -668,13 +668,13 @@ static int uvd_v3_1_hw_init(struct amdgpu_ip_block *ip_block)
r = amdgpu_ring_test_helper(ring);
if (r) {
DRM_ERROR("amdgpu: UVD ring test fail (%d).\n", r);
drm_err(adev_to_drm(adev), "UVD ring test failed (%d).\n", r);
goto done;
}
r = amdgpu_ring_alloc(ring, 10);
if (r) {
DRM_ERROR("amdgpu: ring failed to lock UVD ring (%d).\n", r);
drm_err(adev_to_drm(adev), "ring alloc failed (%d).\n", r);
goto done;
}
@ -701,7 +701,7 @@ static int uvd_v3_1_hw_init(struct amdgpu_ip_block *ip_block)
done:
if (!r)
DRM_INFO("UVD initialized successfully.\n");
drm_info(adev_to_drm(adev), "UVD initialized successfully.\n");
return r;
}

4
drivers/gpu/drm/amd/amdgpu/uvd_v4_2.c
View file

@ -167,7 +167,7 @@ static int uvd_v4_2_hw_init(struct amdgpu_ip_block *ip_block)
r = amdgpu_ring_alloc(ring, 10);
if (r) {
DRM_ERROR("amdgpu: ring failed to lock UVD ring (%d).\n", r);
drm_err(adev_to_drm(adev), "ring alloc failed (%d).\n", r);
goto done;
}
@ -194,7 +194,7 @@ static int uvd_v4_2_hw_init(struct amdgpu_ip_block *ip_block)
done:
if (!r)
DRM_INFO("UVD initialized successfully.\n");
drm_info(adev_to_drm(adev), "UVD initialized successfully.\n");
return r;
}

2
drivers/gpu/drm/amd/amdgpu/uvd_v5_0.c
View file

@ -164,7 +164,7 @@ static int uvd_v5_0_hw_init(struct amdgpu_ip_block *ip_block)
r = amdgpu_ring_alloc(ring, 10);
if (r) {
DRM_ERROR("amdgpu: ring failed to lock UVD ring (%d).\n", r);
drm_err(adev_to_drm(adev), "ring alloc failed (%d).\n", r);
goto done;
}

2
drivers/gpu/drm/amd/amdgpu/uvd_v6_0.c
View file

@ -478,7 +478,7 @@ static int uvd_v6_0_hw_init(struct amdgpu_ip_block *ip_block)
r = amdgpu_ring_alloc(ring, 10);
if (r) {
DRM_ERROR("amdgpu: ring failed to lock UVD ring (%d).\n", r);
drm_err(adev_to_drm(adev), "ring alloc failed (%d).\n", r);
goto done;
}

2
drivers/gpu/drm/amd/amdgpu/uvd_v7_0.c
View file

@ -542,7 +542,7 @@ static int uvd_v7_0_hw_init(struct amdgpu_ip_block *ip_block)
r = amdgpu_ring_alloc(ring, 10);
if (r) {
DRM_ERROR("amdgpu: (%d)ring failed to lock UVD ring (%d).\n", j, r);
drm_err(adev_to_drm(adev), "ring alloc failed (%d).\n", r);
goto done;
}

6
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
View file

@ -2098,7 +2098,7 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)
drm_err(adev_to_drm(adev),
"failed to initialize freesync_module.\n");
} else
drm_dbg_driver(adev_to_drm(adev), "amdgpu: freesync_module init done %p.\n",
drm_dbg_driver(adev_to_drm(adev), "freesync_module init done %p.\n",
adev->dm.freesync_module);
amdgpu_dm_init_color_mod();
@ -2120,7 +2120,9 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)
if (!adev->dm.hdcp_workqueue)
drm_err(adev_to_drm(adev), "failed to initialize hdcp_workqueue.\n");
else
drm_dbg_driver(adev_to_drm(adev), "amdgpu: hdcp_workqueue init done %p.\n", adev->dm.hdcp_workqueue);
drm_dbg_driver(adev_to_drm(adev),
"hdcp_workqueue init done %p.\n",
adev->dm.hdcp_workqueue);
dc_init_callbacks(adev->dm.dc, &init_params);
}