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s390 updates for 7.0-rc3
- Fix stackleak and xor lib inline asm, constraints and clobbers to prevent miscompilations and incomplete stack poisoning -----BEGIN PGP SIGNATURE----- iQEzBAABCgAdFiEE3QHqV+H2a8xAv27vjYWKoQLXFBgFAmmrahkACgkQjYWKoQLX FBjrwQgAjN8E5Qqt7vuFqYw4HLwyWfQ/O6QRhHGcpeQdh1zlHhKbxLcytl6rrpwJ Dzp5G1aalHcIaefCJnePpLasf64YO30cnDhLtOS6n9n+2CZEz8v7kb44CeZJD/r7 ytCu/PQjQr2LabfMtxjB3TfzuUfPxn65xmlHcx8LW+WjNyXKn0/gPRaBOmHxBxk7 wx8NpYVApdqHhZO7K32KDxPF2TAmUjMNd8dnof2BMH0vz6qPM8Ib/kt+uOPMPTmd D1yPrwJdoVeAHsbAVA0sgUCZmrx5ERs3ZYAjvzgaRSsUygX0KtS/2Fyghul2SKMh JtUP905RIIGugIZ8naKdQO9iAZfLPA== =jkZC -----END PGP SIGNATURE----- Merge tag 's390-7.0-4' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux Pull s390 fixes from Vasily Gorbik: - Fix stackleak and xor lib inline asm, constraints and clobbers to prevent miscompilations and incomplete stack poisoning * tag 's390-7.0-4' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux: s390/stackleak: Fix __stackleak_poison() inline assembly constraint s390/xor: Improve inline assembly constraints s390/xor: Fix xor_xc_2() inline assembly constraints s390/xor: Fix xor_xc_5() inline assembly
This commit is contained in:
commit
591d8796b2
2 changed files with 6 additions and 7 deletions
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@ -159,7 +159,7 @@ static __always_inline void __stackleak_poison(unsigned long erase_low,
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" j 4f\n"
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"3: mvc 8(1,%[addr]),0(%[addr])\n"
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"4:"
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: [addr] "+&a" (erase_low), [count] "+&d" (count), [tmp] "=&a" (tmp)
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: [addr] "+&a" (erase_low), [count] "+&a" (count), [tmp] "=&a" (tmp)
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: [poison] "d" (poison)
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: "memory", "cc"
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);
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@ -28,8 +28,8 @@ static void xor_xc_2(unsigned long bytes, unsigned long * __restrict p1,
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" j 3f\n"
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"2: xc 0(1,%1),0(%2)\n"
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"3:"
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: : "d" (bytes), "a" (p1), "a" (p2)
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: "0", "cc", "memory");
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: "+a" (bytes), "+a" (p1), "+a" (p2)
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: : "0", "cc", "memory");
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}
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static void xor_xc_3(unsigned long bytes, unsigned long * __restrict p1,
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@ -54,7 +54,7 @@ static void xor_xc_3(unsigned long bytes, unsigned long * __restrict p1,
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"2: xc 0(1,%1),0(%2)\n"
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"3: xc 0(1,%1),0(%3)\n"
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"4:"
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: "+d" (bytes), "+a" (p1), "+a" (p2), "+a" (p3)
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: "+a" (bytes), "+a" (p1), "+a" (p2), "+a" (p3)
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: : "0", "cc", "memory");
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}
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@ -85,7 +85,7 @@ static void xor_xc_4(unsigned long bytes, unsigned long * __restrict p1,
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"3: xc 0(1,%1),0(%3)\n"
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"4: xc 0(1,%1),0(%4)\n"
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"5:"
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: "+d" (bytes), "+a" (p1), "+a" (p2), "+a" (p3), "+a" (p4)
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: "+a" (bytes), "+a" (p1), "+a" (p2), "+a" (p3), "+a" (p4)
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: : "0", "cc", "memory");
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}
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@ -96,7 +96,6 @@ static void xor_xc_5(unsigned long bytes, unsigned long * __restrict p1,
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const unsigned long * __restrict p5)
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{
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asm volatile(
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" larl 1,2f\n"
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" aghi %0,-1\n"
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" jm 6f\n"
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" srlg 0,%0,8\n"
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@ -122,7 +121,7 @@ static void xor_xc_5(unsigned long bytes, unsigned long * __restrict p1,
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"4: xc 0(1,%1),0(%4)\n"
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"5: xc 0(1,%1),0(%5)\n"
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"6:"
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: "+d" (bytes), "+a" (p1), "+a" (p2), "+a" (p3), "+a" (p4),
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: "+a" (bytes), "+a" (p1), "+a" (p2), "+a" (p3), "+a" (p4),
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"+a" (p5)
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: : "0", "cc", "memory");
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}
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