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drm/amd/ras: Compatible with legacy sriov host

Browse source 
If sriov host is legacy, the guest uniras will
be disabled.

Signed-off-by: YiPeng Chai <YiPeng.Chai@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
YiPeng Chai 2025-11-03 16:32:18 +08:00 • committed by Alex Deucher
parent 73c6c22694
commit 54c2d9739b
5 changed files with 42 additions and 1 deletions
Download patch file Download diff file Expand all files Collapse all files

4
drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
View file

@ -37,6 +37,7 @@
#include "vi.h"
#include "soc15.h"
#include "nv.h"
#include "amdgpu_virt_ras_cmd.h"
#define POPULATE_UCODE_INFO(vf2pf_info, ucode, ver) \
do { \
@ -1533,6 +1534,9 @@ bool amdgpu_virt_get_ras_capability(struct amdgpu_device *adev)
if (adev->virt.ras_en_caps.bits.poison_propogation_mode)
con->poison_supported = true; /* Poison is handled by host */
if (adev->virt.ras_en_caps.bits.uniras_supported)
amdgpu_virt_ras_set_remote_uniras(adev, true);
return true;
}

3
drivers/gpu/drm/amd/amdgpu/amdgv_sriovmsg.h
View file

@ -201,7 +201,8 @@ union amd_sriov_ras_caps {
uint64_t block_mpio : 1;
uint64_t block_mmsch : 1;
uint64_t poison_propogation_mode : 1;
uint64_t reserved : 43;
uint64_t uniras_supported : 1;
uint64_t reserved : 42;
} bits;
uint64_t all;
};

3
drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_ras_mgr.c
View file

@ -452,6 +452,9 @@ bool amdgpu_uniras_enabled(struct amdgpu_device *adev)
{
struct amdgpu_ras_mgr *ras_mgr = amdgpu_ras_mgr_get_context(adev);
if (amdgpu_sriov_vf(adev))
return amdgpu_virt_ras_remote_uniras_enabled(adev);
if (!ras_mgr || !ras_mgr->ras_core)
return false;

30
drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_virt_ras_cmd.c
View file

@ -380,6 +380,8 @@ int amdgpu_virt_ras_hw_init(struct amdgpu_device *adev)
(struct amdgpu_virt_ras_cmd *)ras_mgr->virt_ras_cmd;
struct vram_blocks_ecc *blks_ecc = &virt_ras->blocks_ecc;
amdgpu_virt_get_ras_capability(adev);
memset(blks_ecc, 0, sizeof(*blks_ecc));
blks_ecc->size = PAGE_SIZE;
if (amdgpu_bo_create_kernel(adev, blks_ecc->size,
@ -428,3 +430,31 @@ int amdgpu_virt_ras_post_reset(struct amdgpu_device *adev)
{
return 0;
}
void amdgpu_virt_ras_set_remote_uniras(struct amdgpu_device *adev, bool en)
{
struct amdgpu_ras_mgr *ras_mgr = amdgpu_ras_mgr_get_context(adev);
struct amdgpu_virt_ras_cmd *virt_ras;
if (!ras_mgr || !ras_mgr->virt_ras_cmd)
return;
virt_ras = (struct amdgpu_virt_ras_cmd *)ras_mgr->virt_ras_cmd;
virt_ras->remote_uniras_supported = en;
}
bool amdgpu_virt_ras_remote_uniras_enabled(struct amdgpu_device *adev)
{
struct amdgpu_ras_mgr *ras_mgr = amdgpu_ras_mgr_get_context(adev);
struct amdgpu_virt_ras_cmd *virt_ras;
if (amdgpu_in_reset(adev))
return false;
if (!ras_mgr || !ras_mgr->virt_ras_cmd)
return false;
virt_ras = (struct amdgpu_virt_ras_cmd *)ras_mgr->virt_ras_cmd;
return virt_ras->remote_uniras_supported;
}

3
drivers/gpu/drm/amd/ras/ras_mgr/amdgpu_virt_ras_cmd.h
View file

@ -39,6 +39,7 @@ struct vram_blocks_ecc {
};
struct amdgpu_virt_ras_cmd {
bool remote_uniras_supported;
struct remote_batch_trace_mgr batch_mgr;
struct vram_blocks_ecc blocks_ecc;
};
@ -51,4 +52,6 @@ int amdgpu_virt_ras_handle_cmd(struct ras_core_context *ras_core,
struct ras_cmd_ctx *cmd);
int amdgpu_virt_ras_pre_reset(struct amdgpu_device *adev);
int amdgpu_virt_ras_post_reset(struct amdgpu_device *adev);
void amdgpu_virt_ras_set_remote_uniras(struct amdgpu_device *adev, bool en);
bool amdgpu_virt_ras_remote_uniras_enabled(struct amdgpu_device *adev);
#endif