arm64 fixes for -rc2

- Fix cpufreq warning due to attempting a cross-call with interrupts
   masked when reading local AMU counters.
 
 - Fix DEBUG_PREEMPT warning from the delay loop when it tries to access
   per-cpu errata workaround state for the virtual counter.
 
 - Re-jig and optimise our TLB invalidation errata workarounds in
   preparation for more hardware brokenness.
 
 - Fix GCS mappings to interact properly with PROT_NONE and to avoid
   corrupting the pte on CPUs with FEAT_LPA2.
 
 - Fix ioremap_prot() to extract only the memory attributes from the
   user pte and ignore all the other 'prot' bits.
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Merge tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux

Pull arm64 fixes from Will Deacon:
 "The diffstat is dominated by changes to our TLB invalidation errata
  handling and the introduction of a new GCS selftest to catch one of
  the issues that is fixed here relating to PROT_NONE mappings.

   - Fix cpufreq warning due to attempting a cross-call with interrupts
     masked when reading local AMU counters

   - Fix DEBUG_PREEMPT warning from the delay loop when it tries to
     access per-cpu errata workaround state for the virtual counter

   - Re-jig and optimise our TLB invalidation errata workarounds in
     preparation for more hardware brokenness

   - Fix GCS mappings to interact properly with PROT_NONE and to avoid
     corrupting the pte on CPUs with FEAT_LPA2

   - Fix ioremap_prot() to extract only the memory attributes from the
     user pte and ignore all the other 'prot' bits"

* tag 'arm64-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux:
  arm64: topology: Fix false warning in counters_read_on_cpu() for same-CPU reads
  arm64: Fix sampling the "stable" virtual counter in preemptible section
  arm64: tlb: Optimize ARM64_WORKAROUND_REPEAT_TLBI
  arm64: tlb: Allow XZR argument to TLBI ops
  kselftest: arm64: Check access to GCS after mprotect(PROT_NONE)
  arm64: gcs: Honour mprotect(PROT_NONE) on shadow stack mappings
  arm64: gcs: Do not set PTE_SHARED on GCS mappings if FEAT_LPA2 is enabled
  arm64: io: Extract user memory type in ioremap_prot()
  arm64: io: Rename ioremap_prot() to __ioremap_prot()
This commit is contained in:
Linus Torvalds 2026-02-27 13:40:30 -08:00
commit 4d349ee5c7
14 changed files with 179 additions and 60 deletions

View file

@ -0,0 +1,76 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2026 ARM Limited
*/
#include <errno.h>
#include <signal.h>
#include <unistd.h>
#include <sys/mman.h>
#include <sys/prctl.h>
#include "test_signals_utils.h"
#include "testcases.h"
static uint64_t *gcs_page;
static bool post_mprotect;
#ifndef __NR_map_shadow_stack
#define __NR_map_shadow_stack 453
#endif
static bool alloc_gcs(struct tdescr *td)
{
long page_size = sysconf(_SC_PAGE_SIZE);
gcs_page = (void *)syscall(__NR_map_shadow_stack, 0,
page_size, 0);
if (gcs_page == MAP_FAILED) {
fprintf(stderr, "Failed to map %ld byte GCS: %d\n",
page_size, errno);
return false;
}
return true;
}
static int gcs_prot_none_fault_trigger(struct tdescr *td)
{
/* Verify that the page is readable (ie, not completely unmapped) */
fprintf(stderr, "Read value 0x%lx\n", gcs_page[0]);
if (mprotect(gcs_page, sysconf(_SC_PAGE_SIZE), PROT_NONE) != 0) {
fprintf(stderr, "mprotect(PROT_NONE) failed: %d\n", errno);
return 0;
}
post_mprotect = true;
/* This should trigger a fault if PROT_NONE is honoured for the GCS page */
fprintf(stderr, "Read value after mprotect(PROT_NONE) 0x%lx\n", gcs_page[0]);
return 0;
}
static int gcs_prot_none_fault_signal(struct tdescr *td, siginfo_t *si,
ucontext_t *uc)
{
ASSERT_GOOD_CONTEXT(uc);
/* A fault before mprotect(PROT_NONE) is unexpected. */
if (!post_mprotect)
return 0;
return 1;
}
struct tdescr tde = {
.name = "GCS PROT_NONE fault",
.descr = "Read from GCS after mprotect(PROT_NONE) segfaults",
.feats_required = FEAT_GCS,
.timeout = 3,
.sig_ok = SIGSEGV,
.sanity_disabled = true,
.init = alloc_gcs,
.trigger = gcs_prot_none_fault_trigger,
.run = gcs_prot_none_fault_signal,
};