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MIPS: SMP: Move the AP sync point before the non-parallel aware functions
When CONFIG_HOTPLUG_PARALLEL is enabled, the code executing before
cpuhp_ap_sync_alive() is executed in parallel, while after it is
serialized. The functions set_cpu_sibling_map() and set_cpu_core_map()
were not designed to be executed in parallel, so by moving the
cpuhp_ap_sync_alive() before cpuhp_ap_sync_alive(), we then ensure
they will be called serialized.
The measurement done on EyeQ5 did not show any relevant boot time
increase after applying this patch.
Fixes: 76c43eb507 ("MIPS: SMP: Implement parallel CPU bring up for EyeQ")
Reported-by: Huacai Chen <chenhuacai@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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1 changed files with 3 additions and 3 deletions
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@ -374,13 +374,13 @@ asmlinkage void start_secondary(void)
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calibrate_delay();
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cpu_data[cpu].udelay_val = loops_per_jiffy;
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#ifdef CONFIG_HOTPLUG_PARALLEL
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cpuhp_ap_sync_alive();
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#endif
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set_cpu_sibling_map(cpu);
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set_cpu_core_map(cpu);
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cpumask_set_cpu(cpu, &cpu_coherent_mask);
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#ifdef CONFIG_HOTPLUG_PARALLEL
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cpuhp_ap_sync_alive();
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#endif
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notify_cpu_starting(cpu);
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#ifndef CONFIG_HOTPLUG_PARALLEL
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