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PCI/MSI: Convert the boolean no_64bit_msi flag to a DMA address mask
Some PCI devices have PCI_MSI_FLAGS_64BIT in the MSI capability, but implement less than 64 address bits. This breaks on platforms where such a device is assigned an MSI address higher than what's supported. Currently, no_64bit_msi bit is set for these devices, meaning that only 32-bit MSI addresses are allowed for them. However, on some platforms the MSI doorbell address is above the 32-bit limit but within the addressable range of the device. As a first step to enable MSI on those combinations of devices and platforms, convert the boolean no_64bit_msi flag to a DMA mask and fixup the affected usage sites: - no_64bit_msi = 1 -> msi_addr_mask = DMA_BIT_MASK(32) - no_64bit_msi = 0 -> msi_addr_mask = DMA_BIT_MASK(64) - if (no_64bit_msi) -> if (msi_addr_mask < DMA_BIT_MASK(64)) Since no values other than DMA_BIT_MASK(32) and DMA_BIT_MASK(64) are used, this is functionally equivalent. This prepares for changing the binary decision between 32 and 64 bit to a DMA mask based decision which allows to support systems which have a DMA address space less than 64bit but a MSI doorbell address above the 32-bit limit. [ tglx: Massaged changelog ] Signed-off-by: Vivian Wang <wangruikang@iscas.ac.cn> Signed-off-by: Thomas Gleixner <tglx@kernel.org> Reviewed-by: Brett Creeley <brett.creeley@amd.com> # ionic Reviewed-by: Thomas Gleixner <tglx@kernel.org> Acked-by: Takashi Iwai <tiwai@suse.de> # sound Link: https://patch.msgid.link/20260129-pci-msi-addr-mask-v4-1-70da998f2750@iscas.ac.cn
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37f9d5026c
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386ced19e9
9 changed files with 22 additions and 9 deletions
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@ -1666,7 +1666,7 @@ static int __pnv_pci_ioda_msi_setup(struct pnv_phb *phb, struct pci_dev *dev,
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return -ENXIO;
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return -ENXIO;
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/* Force 32-bit MSI on some broken devices */
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/* Force 32-bit MSI on some broken devices */
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if (dev->no_64bit_msi)
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if (dev->msi_addr_mask < DMA_BIT_MASK(64))
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is_64 = 0;
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is_64 = 0;
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/* Assign XIVE to PE */
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/* Assign XIVE to PE */
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@ -383,7 +383,7 @@ static int rtas_prepare_msi_irqs(struct pci_dev *pdev, int nvec_in, int type,
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*/
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*/
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again:
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again:
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if (type == PCI_CAP_ID_MSI) {
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if (type == PCI_CAP_ID_MSI) {
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if (pdev->no_64bit_msi) {
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if (pdev->msi_addr_mask < DMA_BIT_MASK(64)) {
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rc = rtas_change_msi(pdn, RTAS_CHANGE_32MSI_FN, nvec);
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rc = rtas_change_msi(pdn, RTAS_CHANGE_32MSI_FN, nvec);
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if (rc < 0) {
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if (rc < 0) {
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/*
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/*
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@ -409,7 +409,7 @@ again:
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if (use_32bit_msi_hack && rc > 0)
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if (use_32bit_msi_hack && rc > 0)
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rtas_hack_32bit_msi_gen2(pdev);
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rtas_hack_32bit_msi_gen2(pdev);
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} else {
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} else {
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if (pdev->no_64bit_msi)
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if (pdev->msi_addr_mask < DMA_BIT_MASK(64))
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rc = rtas_change_msi(pdn, RTAS_CHANGE_32MSIX_FN, nvec);
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rc = rtas_change_msi(pdn, RTAS_CHANGE_32MSIX_FN, nvec);
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else
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else
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rc = rtas_change_msi(pdn, RTAS_CHANGE_MSIX_FN, nvec);
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rc = rtas_change_msi(pdn, RTAS_CHANGE_MSIX_FN, nvec);
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@ -252,7 +252,7 @@ static bool radeon_msi_ok(struct radeon_device *rdev)
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*/
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*/
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if (rdev->family < CHIP_BONAIRE) {
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if (rdev->family < CHIP_BONAIRE) {
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dev_info(rdev->dev, "radeon: MSI limited to 32-bit\n");
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dev_info(rdev->dev, "radeon: MSI limited to 32-bit\n");
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rdev->pdev->no_64bit_msi = 1;
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rdev->pdev->msi_addr_mask = DMA_BIT_MASK(32);
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}
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}
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/* force MSI on */
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/* force MSI on */
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@ -331,7 +331,7 @@ static int ionic_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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#ifdef CONFIG_PPC64
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#ifdef CONFIG_PPC64
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/* Ensure MSI/MSI-X interrupts lie within addressable physical memory */
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/* Ensure MSI/MSI-X interrupts lie within addressable physical memory */
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pdev->no_64bit_msi = 1;
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pdev->msi_addr_mask = DMA_BIT_MASK(32);
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#endif
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#endif
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err = ionic_setup_one(ionic);
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err = ionic_setup_one(ionic);
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@ -322,7 +322,7 @@ static int msi_verify_entries(struct pci_dev *dev)
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{
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{
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struct msi_desc *entry;
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struct msi_desc *entry;
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if (!dev->no_64bit_msi)
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if (dev->msi_addr_mask == DMA_BIT_MASK(64))
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return 0;
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return 0;
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msi_for_each_desc(entry, &dev->dev, MSI_DESC_ALL) {
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msi_for_each_desc(entry, &dev->dev, MSI_DESC_ALL) {
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@ -24,7 +24,7 @@ void pci_msi_init(struct pci_dev *dev)
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}
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}
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if (!(ctrl & PCI_MSI_FLAGS_64BIT))
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if (!(ctrl & PCI_MSI_FLAGS_64BIT))
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dev->no_64bit_msi = 1;
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dev->msi_addr_mask = DMA_BIT_MASK(32);
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}
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}
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void pci_msix_init(struct pci_dev *dev)
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void pci_msix_init(struct pci_dev *dev)
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@ -2047,6 +2047,13 @@ int pci_setup_device(struct pci_dev *dev)
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*/
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*/
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dev->dma_mask = 0xffffffff;
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dev->dma_mask = 0xffffffff;
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/*
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* Assume 64-bit addresses for MSI initially. Will be changed to 32-bit
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* if MSI (rather than MSI-X) capability does not have
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* PCI_MSI_FLAGS_64BIT. Can also be overridden by driver.
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*/
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dev->msi_addr_mask = DMA_BIT_MASK(64);
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dev_set_name(&dev->dev, "%04x:%02x:%02x.%d", pci_domain_nr(dev->bus),
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dev_set_name(&dev->dev, "%04x:%02x:%02x.%d", pci_domain_nr(dev->bus),
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dev->bus->number, PCI_SLOT(dev->devfn),
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dev->bus->number, PCI_SLOT(dev->devfn),
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PCI_FUNC(dev->devfn));
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PCI_FUNC(dev->devfn));
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@ -377,6 +377,13 @@ struct pci_dev {
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0xffffffff. You only need to change
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0xffffffff. You only need to change
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this if your device has broken DMA
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this if your device has broken DMA
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or supports 64-bit transfers. */
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or supports 64-bit transfers. */
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u64 msi_addr_mask; /* Mask of the bits of bus address for
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MSI that this device implements.
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Normally set based on device
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capabilities. You only need to
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change this if your device claims
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to support 64-bit MSI but implements
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fewer than 64 address bits. */
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struct device_dma_parameters dma_parms;
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struct device_dma_parameters dma_parms;
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@ -441,7 +448,6 @@ struct pci_dev {
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unsigned int is_busmaster:1; /* Is busmaster */
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unsigned int is_busmaster:1; /* Is busmaster */
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unsigned int no_msi:1; /* May not use MSI */
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unsigned int no_msi:1; /* May not use MSI */
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unsigned int no_64bit_msi:1; /* May only use 32-bit MSIs */
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unsigned int block_cfg_access:1; /* Config space access blocked */
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unsigned int block_cfg_access:1; /* Config space access blocked */
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unsigned int broken_parity_status:1; /* Generates false positive parity */
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unsigned int broken_parity_status:1; /* Generates false positive parity */
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unsigned int irq_reroute_variant:2; /* Needs IRQ rerouting variant */
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unsigned int irq_reroute_variant:2; /* Needs IRQ rerouting variant */
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@ -1905,7 +1905,7 @@ static int azx_first_init(struct azx *chip)
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if (chip->msi && chip->driver_caps & AZX_DCAPS_NO_MSI64) {
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if (chip->msi && chip->driver_caps & AZX_DCAPS_NO_MSI64) {
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dev_dbg(card->dev, "Disabling 64bit MSI\n");
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dev_dbg(card->dev, "Disabling 64bit MSI\n");
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pci->no_64bit_msi = true;
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pci->msi_addr_mask = DMA_BIT_MASK(32);
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}
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}
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pci_set_master(pci);
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pci_set_master(pci);
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