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accel/amdxdna: Enable hardware context priority

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Newer firmware supports hardware context priority. Set the priority based
on application input.

Reviewed-by: Mario Limonciello (AMD) <superm1@kernel.org>
Signed-off-by: Lizhi Hou <lizhi.hou@amd.com>
Link: https://patch.msgid.link/20251217171719.2139025-1-lizhi.hou@amd.com
This commit is contained in:
Lizhi Hou 2025-12-17 09:17:19 -08:00
parent 7818618a09
commit 332070795b
3 changed files with 35 additions and 1 deletions
Download patch file Download diff file Expand all files Collapse all files

23
drivers/accel/amdxdna/aie2_message.c
View file

@ -205,6 +205,27 @@ static int aie2_destroy_context_req(struct amdxdna_dev_hdl *ndev, u32 id)
return ret;
}
static u32 aie2_get_context_priority(struct amdxdna_dev_hdl *ndev,
struct amdxdna_hwctx *hwctx)
{
if (!AIE2_FEATURE_ON(ndev, AIE2_PREEMPT))
return PRIORITY_HIGH;
switch (hwctx->qos.priority) {
case AMDXDNA_QOS_REALTIME_PRIORITY:
return PRIORITY_REALTIME;
case AMDXDNA_QOS_HIGH_PRIORITY:
return PRIORITY_HIGH;
case AMDXDNA_QOS_NORMAL_PRIORITY:
return PRIORITY_NORMAL;
case AMDXDNA_QOS_LOW_PRIORITY:
return PRIORITY_LOW;
default:
return PRIORITY_HIGH;
}
}
int aie2_create_context(struct amdxdna_dev_hdl *ndev, struct amdxdna_hwctx *hwctx)
{
DECLARE_AIE2_MSG(create_ctx, MSG_OP_CREATE_CONTEXT);
@ -221,7 +242,7 @@ int aie2_create_context(struct amdxdna_dev_hdl *ndev, struct amdxdna_hwctx *hwct
req.num_unused_col = hwctx->num_unused_col;
req.num_cq_pairs_requested = 1;
req.pasid = hwctx->client->pasid;
req.context_priority = 2;
req.context_priority = aie2_get_context_priority(ndev, hwctx);
ret = aie2_send_mgmt_msg_wait(ndev, &msg);
if (ret)

5
drivers/accel/amdxdna/aie2_msg_priv.h
View file

@ -108,6 +108,11 @@ struct cq_pair {
struct cq_info i2x_q;
};
#define PRIORITY_REALTIME 1
#define PRIORITY_HIGH 2
#define PRIORITY_NORMAL 3
#define PRIORITY_LOW 4
struct create_ctx_req {
__u32 aie_type;
__u8 start_col;

8
include/uapi/drm/amdxdna_accel.h
View file

@ -19,6 +19,14 @@ extern "C" {
#define AMDXDNA_INVALID_BO_HANDLE 0
#define AMDXDNA_INVALID_FENCE_HANDLE 0
/*
* Define hardware context priority
*/
#define AMDXDNA_QOS_REALTIME_PRIORITY 0x100
#define AMDXDNA_QOS_HIGH_PRIORITY 0x180
#define AMDXDNA_QOS_NORMAL_PRIORITY 0x200
#define AMDXDNA_QOS_LOW_PRIORITY 0x280
enum amdxdna_device_type {
AMDXDNA_DEV_TYPE_UNKNOWN = -1,
AMDXDNA_DEV_TYPE_KMQ,